Register USPTO Patent
Application Number 17483195
Status Pending
Filing Date 2021-09-23
First Publication Date 2023-03-23
Publication Date 2023-03-23
Owner Intel Corporation (USA)
  • Dugast, Francois
  • Srivastava, Durgesh
  • Sen, Sujoy
  • Warnes, Lidia
  • Willis, Thomas E.
  • Coury, Bassam N.


Methods and apparatus to minimize hot/cold page detection overhead on running workloads. A page meta data structure is populated with meta data associated with memory pages in one or more far memory tier. In conjunction with one or more processes accessing memory pages to perform workloads, the page meta data structure is updated to reflect accesses to the memory pages. The page meta data, which reflects the current state of memory, is used to determine which pages are “hot” pages and which pages are “cold” pages, wherein hot pages are memory pages with relatively higher access frequencies and cold pages are memory pages with relatively lower access frequencies. Variations on the approach including filtering meta data updates on pages in memory regions of interest and applying a filter(s) to trigger meta data updates based on (a) condition(s). A callback function may also be triggered to be executed synchronously with memory page accesses.

IPC Classes  ?

  • G06F 12/0882 - Page mode
  • G06F 12/0811 - Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
  • G06F 12/123 - Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
  • G06F 13/16 - Handling requests for interconnection or transfer for access to memory bus
  • G06F 13/42 - Bus transfer protocol, e.g. handshake; Synchronisation
  • G06F 15/78 - Architectures of general purpose stored program computers comprising a single central processing unit