BLOCK LIST MANAGEMENT FOR WORDLINE START VOLTAGE
Register | USPTO Patent |
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Application Number | 17483279 |
Status | Pending |
Filing Date | 2021-09-23 |
First Publication Date | 2023-03-23 |
Publication Date | 2023-03-23 |
Owner | Intel Corporation (USA) |
Inventor |
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Abstract
Systems, apparatuses, and methods provide for technology that stores a sampled dynamic start voltage value based on a fast to program plane. A current multi-plane program operation is received corresponding to a current cell block and wordline pair associated with a current enabled plane of a plurality of enabled planes. A block list is scanned based on the current cell block and wordline pair. The block list includes a plurality of entries including a reference start voltage corresponding to a reference cell block and wordline pair associated with a reference enabled plane. Additionally, the reference start voltage is reused as a dynamic start voltage in response to finding a match between the current cell block and wordline pair as compared to the reference cell block and wordline pair. Such a match is performed only for a least enabled plane of the plurality of enabled planes.IPC Classes ?
- G11C 16/10 - Programming or data input circuits
- G11C 16/16 - Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
- G11C 16/28 - Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
- G11C 16/30 - Power supply circuits
- G11C 16/08 - Address circuits; Decoders; Word-line control circuits