APPARATUS AND METHOD FOR DETECTING AND RECOVERING FROM DATA FETCH ERRORS
| Register | USPTO Patent |
|---|---|
| Application Number | 17993591 |
| Status | Pending |
| Filing Date | 2022-11-23 |
| First Publication Date | 2023-03-23 |
| Publication Date | 2023-03-23 |
| Owner | Intel Corporation (USA) |
| Inventor |
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Abstract
An apparatus and method are described for detecting and correcting data fetch errors within a processor core. For example, one embodiment of an instruction processing apparatus for detecting and recovering from data fetch errors comprises: at least one processor core having a plurality of instruction processing stages including a data fetch stage and a retirement stage; and error processing logic in communication with the processing stages to perform the operations of: detecting an error associated with data in response to a data fetch operation performed by the data fetch stage; and responsively performing one or more operations to ensure that the error does not corrupt an architectural state of the processor core within the retirement stage.IPC Classes ?
- G06F 11/14 - Error detection or correction of the data by redundancy in operation, e.g. by using different operation sequences leading to the same result
- G06F 11/10 - Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens