Abstract

A host device (2) is configured to read and write information from and into a card (1) and to supply a supply voltage that belongs to a first voltage range or a second voltage range which is lower than the first voltage range, and issues a voltage identification command (CMDA) to the card. The voltage identification command includes a voltage range identification section (VOLS), an error detection section (ED), and a check pattern section (CPS). The voltage range identification section includes information indicating which one of the first voltage range and the second voltage range the supply voltage belongs. The error detection section has a pattern configured to enable the card which has received the voltage identification command to detect errors in the voltage identification command. The check pattern section has a preset pattern.

IPC Classes  ?

• G06K 17/00 - Methods or arrangements for effecting co-operative working between equipments covered by two or more of main groups , e.g. automatic card files incorporating conveying and reading operations
• G06F 1/26 - Power supply means, e.g. regulation thereof
• G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips

Abstract

A storage device includes a semiconductor memory storing data. A controller instructs to write data to the semiconductor memory in accordance with a request the controller receives. A register holds performance class information showing one performance class required to allow the storage device to demonstrate best performance which the storage device supports, of performance classes specified in accordance with performance.

IPC Classes  ?

• G06F 3/06 - Digital input from, or digital output to, record carriers
• G06F 13/38 - Information transfer, e.g. on bus
• G11C 16/20 - Initialising; Data preset; Chip identification

Abstract

A storage device includes a semiconductor memory storing data. A controller instructs to write data to the semiconductor memory in accordance with a request the controller receives. A register holds performance class information showing one performance class required to allow the storage device to demonstrate best performance which the storage device supports, of performance classes specified in accordance with performance.

IPC Classes  ?

• G06F 3/06 - Digital input from, or digital output to, record carriers
• G11C 16/20 - Initialising; Data preset; Chip identification