Hewlett-Packard Development Company, L.P.

United States of America

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2022 1
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IPC Class
B41J 2/175 - Ink supply systems 33
B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers 29
B41J 2/14 - Structure thereof 11
G06F 3/12 - Digital output to print unit 7
B41J 29/38 - Drives, motors, controls, or automatic cut-off devices for the entire printing mechanism 6
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Status
Pending 17
Registered / In Force 58
Found results for  patents

1.

COLOR MAP WRAPPERS AND PACKETS

      
Document Number 03195372
Status Pending
Filing Date 2020-10-29
Open to Public Date 2022-05-05
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Nichols, Stephen J.
  • Kerby, George Henry

Abstract

A memory structure stores a plurality of color maps, the entity, when decompressed by a printer controller, comprising a plurality of first level wrappers, each first level wrapper including at least one characteristic to identify a corresponding color map, and a recipe to define and locate packets for constructing the color map, the recipe having at least one locator for each second level wrapper; and a plurality of second level wrappers of different types, each second level wrapper wrapping a corresponding packet.

IPC Classes  ?

  • B41J 2/175 - Ink supply systems
  • G03G 15/08 - Apparatus for electrographic processes using a charge pattern for developing using a solid developer, e.g. powder developer
  • H04N 1/00 - PICTORIAL COMMUNICATION, e.g. TELEVISION - Details thereof
  • H04N 1/60 - Colour correction or control

2.

FLUID EJECTION DEVICES INCLUDING A FIRST MEMORY AND A SECOND MEMORY

      
Document Number 03127581
Status In Force
Filing Date 2019-04-19
Open to Public Date 2020-10-22
Grant Date 2023-11-07
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor Ng, Boon Bing

Abstract

An integrated circuit to drive a plurality of fluid actuation devices includes a plurality of first data lines, a second data line, a first memory element, and a second memory element. The first memory element is enabled in response to first data on the plurality of first data lines. The second memory element is enabled in response to second data on the second data line.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/14 - Structure thereof

3.

FLUID EJECTION DEVICES INCLUDING A MEMORY

      
Document Number 03127423
Status In Force
Filing Date 2019-04-19
Open to Public Date 2020-10-22
Grant Date 2023-11-14
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor Ng, Boon Bing

Abstract

An integrated circuit to drive a plurality of fluid actuation devices includes a fire line, a plurality of memory elements, a first switch, and a plurality of second switches. The first switch is electrically coupled between the fire line and a first side of each memory element of the plurality of memory elements. Each second switch is electrically coupled to a second side of a respective memory element of the plurality of memory elements.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

4.

DIE FOR A PRINTHEAD

      
Document Number 03126053
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-11-07
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Cumbie, Michael W.
  • Linn, Scott A.
  • Fuller, Anthony M.
  • Gardner, James Michael

Abstract

A die for a printhead comprises a plurality of fluid feed holes disposed in a line parallel to a longitudinal axis of the die, wherein the fluid feed holes are formed through a substrate of the die; a plurality of fluidic actuators proximate to the plurality of fluid feed holes, each of the plurality of fluidic actuators comprising a fluid chamber to receive fluid from the plurality of fluid feed holes, a nozzle, and a driver to eject fluid from the chamber through the nozzle; and circuitry to operate the fluidic actuators, wherein traces are provided in layers between adjacent fluid feed holes of the plurality of fluid feed holes, connecting circuitry on each side of the plurality of fluid feed holes.

IPC Classes  ?

5.

DIE FOR A PRINTHEAD

      
Document Number 03126054
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-08-22
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gardner, James Michael
  • Fuller, Anthony M.
  • Cumbie, Michael W.

Abstract

A die for a printhead is described herein. The die includes a number of fluid feed holes disposed in a line parallel to a longitudinal axis of the die, wherein the fluid feed holes are formed through a substrate of the die. A number of fluidic actuators are proximate to the fluid feed holes, to eject fluid received from the fluid feed holes A number of field-effect transistors are parallel to the fluid feed holes, where each of the fluidic actuators is powered by an associated field effect transistor. Logic circuitry to actuate the plurality of field-effect transistors is disposed on the die on an opposite side of the fluid feed holes from the field-effect transistors, wherein traces, disposed between the fluid feed holes, electrically couple the logic circuitry to the field-effect transistors. The die has a repeating structure comprising one fluid feed hole, two fluidic actuators, and two field-effect transistors placed at an interval of two times a dot pitch in a line along the die.

IPC Classes  ?

6.

DIE FOR A PRINTHEAD

      
Document Number 03126056
Status Pending
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Linn, Scott A.
  • Gardner, James Michael
  • Cumbie, Michael W.

Abstract

A die for a printhead is provided in examples. The die includes a number of fluidic actuator arrays. A data block is associated with each of the plurality of fluidic actuator arrays. The die includes an interface comprising a data pad and a clock pad, wherein a data bit value present at the data pad is loaded into a first data block corresponding to a first fluidic actuator array on a rising clock edge and loaded into a second data block corresponding to a second fluidic actuator array on a falling clock edge.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/14 - Structure thereof

7.

ACCESSING REGISTERS OF FLUID EJECTION DEVICES

      
Document Number 03126132
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-11-07
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Linn, Scott A.
  • Gardner, James Michael
  • Cumbie, Michael W.

Abstract

An integrated circuit to drive a plurality of fluid actuation devices includes a configuration register, a plurality of interfaces, and control logic. The plurality of interfaces include a mode interface and a data interface. The control logic enables writing to the configuration register in response to a signal on the mode interface transitioning to logic high with a logic high signal on the data interface.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

8.

MULTIPLE CIRCUITS COUPLED TO AN INTERFACE

      
Document Number 03126596
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-11-07
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gardner, James
  • Linn, Scott
  • Cumbie, Michael

Abstract

An integrated circuit to drive a plurality of fluid actuation devices includes an interface, a first sensor, a second sensor, and control logic. The interface is to connect to a single contact pad of a host print apparatus. The first sensor is of a first type and is coupled to the interface. The second sensor is of a second type and is coupled to the interface. The second type is different from the first type. The control logic enables the first sensor or the second sensor to provide an enabled sensor. A voltage bias or a current bias applied to the interface generates a sensed current or a sensed voltage, respectively, on the interface indicating the state of the enabled sensor.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/14 - Structure thereof

9.

RESET MONITOR

      
Document Number 03126597
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-11-07
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Linn, Scott A.
  • Gardner, James M.

Abstract

An integrated circuit to drive a plurality of actuators during a non-reset operating condition is disclosed. The integrated circuit includes a reset input to receive a reset signal activated for a duration. The reset signal generates a reset condition in the integrated circuit during which the non-reset operating condition is blocked. The integrated circuit also includes a monitor circuit operably coupled to the reset input to indicate if the duration of the reset signal meets or exceeds a selected duration.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

10.

COMMUNICATING PRINT COMPONENT

      
Document Number 03126691
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-08-15
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Linn, Scott A.
  • Gardner, James Michael

Abstract

An integrated circuit for a print component including a number of memory bits. The integrated circuit may include a selection circuit to select at least one memory bit of the number of memory bits and fire actuators of a fire pulse group. The integrated circuit may include a memory voltage regulator to provide a write voltage to the at least one memory bit of the number of memory bits.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

11.

COMMUNICATING PRINT COMPONENT

      
Document Number 03126692
Status Pending
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Linn, Scott A.
  • Gardner, James Michael
  • Cumbie, Michael W.

Abstract

An integrated circuit to drive a number of fluid actuation devices, comprising a circuit configured to have a memory access state which can be set to one of an enabled state and disabled state. The integrated circuit to include a fluid actuation circuit to transmit selection information for a fluid actuation device, the selection information comprising a data state bit. The integrated circuit to include a memory cell array, configured so that each memory cell is accessible by the memory access state being enabled, and the data state bit being set.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

12.

COMMUNICATING PRINT COMPONENT

      
Document Number 03126693
Status Pending
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gardner, James Michael
  • Linn, Scott A.
  • Rossi, John
  • Ness, Erik D.

Abstract

A communicating print component a print head comprising a number of memory bits and a single lane analog bus conductively coupling the number of memory bits to a pad located on the exterior of the print head. The pad is to transmit an electrical signal from the number of memory bits, wherein the electrical signal indicates a combination of all selected bits of the number of memory bits.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/175 - Ink supply systems
  • B41J 2/21 - Ink jet for multi-colour printing
  • G11C 13/00 - Digital stores characterised by the use of storage elements not covered by groups , , or

13.

PRINT COMPONENT HAVING FLUIDIC ACTUATING STRUCTURES WITH DIFFERENT FLUIDIC ARCHITECTURES

      
Document Number 03126694
Status Pending
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Linn, Scott A.
  • Gardner, James Michael
  • Rossi, John

Abstract

A print component includes an array of fluidic actuation structures including a first column of fluidic actuating structures addressable by a set of actuation addresses, each fluidic actuating structure having a different one of the actuation addresses and having a fluidic architecture type, and a second column of fluidic actuating structures addressable by the set of actuation addresses. Each fluidic actuating structure of the second column has a different one of the actuation addresses and has a same fluidic architecture type as the fluidic actuating structure of the first column having the same address. An address bus communicates the set of addresses to the array of fluidic actuating structures, and a fire signal line communicates a plurality of fire pulse signal types to the array of fluidic actuating structures, the fire pulse signal type depending on the actuation address on the address bus.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

14.

FLUID EJECTION DEVICES INCLUDING ELECTRICAL INTERCONNECT ELEMENTS FOR FLUID EJECTION DIES

      
Document Number 03126726
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-12-05
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Fuller, Anthony M.
  • Forrest, Daren L.
  • Cumbie, Michael W.
  • Groom, Michael
  • Jenssen, Conrad

Abstract

A device includes a plurality of fluid ejection dies, wherein each of the fluid ejection dies includes a contact pad and a plurality of fluid actuation devices. The device includes an electrical interconnect element in contact with the contact pad of each of the fluid ejection dies to electrically interconnect the plurality of fluid ejection dies.

IPC Classes  ?

15.

MULTIPLE CIRCUITS COUPLED TO AN INTERFACE

      
Document Number 03126737
Status Pending
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Linn, Scott A.
  • Gardner, James Michael

Abstract

An integrated circuit to drive a plurality of fluid actuation devices includes an interface, a digital circuit, an analog circuit, and control logic. The digital circuit outputs a digital signal to the interface. The analog circuit outputs an analog signal to the interface. The control logic activates the digital circuit or the analog circuit.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/175 - Ink supply systems

16.

PRINT COMPONENT WITH MEMORY CIRCUIT

      
Document Number 03126914
Status Pending
Filing Date 2019-07-31
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Ng, Boon Bing
  • Gardner, James Michael
  • Linn, Scott A.

Abstract

A memory circuit for a print component including a plurality of I/O pads, including an analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component. The memory circuit includes a controllable selector connected in line with one of the signal paths via the I/O pads, the selector controllable to disconnect the corresponding signal path to the print component, and a memory component to store memory values associated with the print component. A control circuit, in response to a sequence of operating signals received by the I/O pads representing a memory read, to operate the controllable selector to disconnect the signal path to the print component to block the memory read of the print component, and provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.

IPC Classes  ?

  • G11C 7/16 - Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
  • B41J 2/01 - Ink jet
  • B41J 29/38 - Drives, motors, controls, or automatic cut-off devices for the entire printing mechanism
  • G06F 3/12 - Digital output to print unit
  • G06F 12/06 - Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication
  • G11C 16/06 - Auxiliary circuits, e.g. for writing into memory

17.

DATA PACKETS COMPRISING RANDOM NUMBERS FOR CONTROLLING FLUID DISPENSING DEVICES

      
Document Number 03126919
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-10-24
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Rossi, John
  • Ness, Erik D.

Abstract

In some examples, a fluid dispensing device includes a reservoir containing a fluid, fluidic actuators, and an interface to receive a data packet comprising information to control activation of the fluidic actuators, the data packet comprising a random number generated by a random number generator.

IPC Classes  ?

  • B41J 2/135 - Nozzles
  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/175 - Ink supply systems
  • G06F 3/12 - Digital output to print unit

18.

PRINT COMPONENT WITH MEMORY ARRAY USING INTERMITTENT CLOCK SIGNAL

      
Document Number 03126050
Status Pending
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gardner, James Michael
  • Linn, Scott A.
  • Cumbie, Michael W.

Abstract

A print component includes a plurality of data pads, a clock pad to receive an intermittent clock signal, and a plurality of actuator groups each corresponding to a different liquid type and to a different one of the data pads. Each actuator group includes a plurality of configuration functions, an array of fluid actuators, and an array of memory elements including a first portion corresponding to the plurality of configuration functions and a second portion corresponding to the array of fluid actuators. Each time the intermittent clock signal is present on the clock pad, the array of memory elements to serially load a segment of data bits from the corresponding data pad, including loading a first portion of data bits into the first portion of memory elements, and loading a second portion of data bits into the second portion of memory elements.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

19.

DIE FOR A PRINTHEAD

      
Document Number 03126051
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-08-22
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Martin, Eric
  • Linn, Scott A.
  • Gardner, James Michael

Abstract

A die for a printhead is provided in examples. The die includes a number of fluidic actuator arrays, proximate to a number of fluid feed holes. A number of address lines are disposed proximate to a number of logic circuits on a low-voltage side of the fluid feed holes. An address decoder circuit is coupled to at least a portion of the address lines to select a fluidic actuator in a fluidic actuator array for firing. The address decoder circuit is customized to select a different address for each fluidic actuator in the fluidic actuator array. A logic circuit triggers a driver circuit located in a high-voltage side of the plurality of fluid feed holes opposite the low-voltage side, based, at least in part, on a bit value for the fluidic actuator array, the fluidic actuator selected by the address decoder circuit, and a firing signal.

IPC Classes  ?

  • B41J 2/14 - Structure thereof
  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

20.

DIE FOR A PRINTHEAD

      
Document Number 03126057
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-08-22
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gardner, James Michael
  • Fuller, Anthony M.
  • Cumbie, Michael W.
  • Linn, Scott A.

Abstract

A die for a printhead is described herein. The die includes a number of fluid feed holes disposed in a line parallel to a longitudinal axis of the die, wherein the fluid feed holes are formed through a substrate of the die. A number of fluidic actuators are proximate to the fluid feed holes to eject fluid received from the plurality of fluid feed holes. The die includes logic circuitry to operate the fluidic actuators, wherein the logic circuitry is disposed on a first side of the plurality of fluid feed holes. Power circuitry to power the plurality of fluidic actuators is disposed on an opposite side of the fluid feed holes from the logic circuitry. Activation traces are disposed between each of the fluid feed holes to couple the logic circuitry to the power circuitry.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/14 - Structure thereof

21.

FLUID EJECTION DEVICES INCLUDING CONTACT PADS

      
Document Number 03126131
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-11-07
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gardner, James Michael
  • Linn, Scott A.
  • Cumbie, Michael W.
  • Fuller, Anthony M.

Abstract

A device includes a first column of contact pads. The device also includes a column of fluid actuation devices disposed longitudinally to the first column of contact pads.

IPC Classes  ?

22.

PULLDOWN DEVICES

      
Document Number 03126270
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-10-24
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gardner, James
  • Rossi, John
  • Linn, Scott A.

Abstract

An integrated circuit to drive a plurality of fluid actuation devices includes a plurality of contact pads, a plurality of pulldown devices, and control logic. The plurality of contact pads include a first contact pad and a second contact pad. Each of the pulldown devices is electrically coupled to a corresponding contact pad. The control logic enables at least a portion of the pulldown devices in response to both a logic low signal on the first contact pad and a logic low signal on the second contact pad.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/175 - Ink supply systems

23.

INTEGRATED CIRCUITS INCLUDING MEMORY CELLS

      
Document Number 03126271
Status Pending
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Linn, Scott A.
  • Gardner, James Michael
  • Cumbie, Michael W.

Abstract

An integrated circuit to drive a plurality of fluid actuation devices includes a plurality of memory cells, a select circuit, configuration logic, and control logic. Each memory cell corresponds to a fluid actuation device. The select circuit selects fluid actuation devices and memory cells corresponding to the selected fluid actuation devices. The configuration logic enables or disables access to the plurality of memory cells. The control logic either activates the selected fluid actuation devices or accesses the memory cells corresponding to the selected fluid actuation devices based on a state of the configuration logic.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/14 - Structure thereof

24.

TEMPERATURE DETECTION AND CONTROL

      
Document Number 03126272
Status Pending
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Cumbie, Michael W.
  • Gardner, James Michael
  • Linn, Scott A.
  • Corrigan, George H., Iii.

Abstract

A print component integrated circuitry package includes a number of temperature sensors where each of the plurality of the temperature sensors is disposed in a corresponding temperature region of an integrated circuitry. In an example, an analog sense bus conductively connects to all of the plurality of temperature sensors and an external sensor pad that is to connect to a corresponding print controller contact.

IPC Classes  ?

  • H01L 23/34 - Arrangements for cooling, heating, ventilating or temperature compensation
  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/175 - Ink supply systems
  • B41J 29/377 - Cooling or ventilating arrangements
  • B41J 29/38 - Drives, motors, controls, or automatic cut-off devices for the entire printing mechanism

25.

INTEGRATED CIRCUIT WITH ADDRESS DRIVERS FOR FLUIDIC DIE

      
Document Number 03126273
Status Pending
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Linn, Scott A.
  • Gardner, James Michael
  • Cumbie, Michael W.

Abstract

An integrated circuit for a fluidic die including an address bus to communicate a set of addresses, a first group of die configuration functions including a first address driver to drive a first portion of an address of the set of addresses on the address bus, a second group of die configuration functions including a second address driver to drive a second portion of the address of the set of addresses on the address bus, and an array of fluid actuating devices addressable by the set of addresses communicated via the address bus.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

26.

DIE FOR A PRINTHEAD

      
Document Number 03126598
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-08-15
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gardner, James Michael
  • Linn, Scott A.

Abstract

A die for a printhead is provided in examples. The die includes a memory voltage regulator disposed on the die, and a high-voltage protection switch disposed on the die in a path of a conductive connection between the memory voltage regulator and a sense bus.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

27.

INTEGRATED CIRCUITS INCLUDING CUSTOMIZATION BITS

      
Document Number 03126606
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-08-29
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Linn, Scott A.
  • Gardner, James Michael
  • Cumbie, Michael W.

Abstract

An integrated circuit to drive a plurality of fluid actuation devices includes a plurality of first memory cells, a plurality of first storage elements, and control logic. Each first memory cell stores a customization bit. Each first storage element is coupled to a corresponding first memory cell. The control logic, in response to a reset signal, reads the customization bit stored in each first memory cell and latches each customization bit in a corresponding first storage element.

IPC Classes  ?

28.

INTEGRATED CIRCUITS INCLUDING CUSTOMIZATION BITS

      
Document Number 03126754
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-09-05
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Linn, Scott A.
  • Gardner, James Michael
  • Ness, Erik D.

Abstract

An integrated circuit to drive a plurality of fluid actuation devices includes a plurality of first non-volatile memory cells and control logic. Each first non-volatile memory cell stores a customization bit. The control logic configures an operation of the integrated circuit based on the customization bits.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/175 - Ink supply systems

29.

MEMORIES OF FLUIDIC DIES

      
Document Number 03126912
Status In Force
Filing Date 2019-02-06
Open to Public Date 2020-08-13
Grant Date 2023-12-19
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Ng, Boon Bing
  • Ness, Erik D.
  • Gardner, James Michael

Abstract

In some examples, a fluid dispensing device component includes a plurality of fluidic dies each comprising a memory, a plurality of control inputs to provide respective control information to respective fluidic dies of the plurality of fluidic dies, and a data bus connected to the plurality of fluidic dies, the data bus to provide data of the memories of the plurality of fluidic dies to an output of the fluid dispensing device component.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

30.

PRINT COMPONENT WITH MEMORY CIRCUIT

      
Document Number 03126913
Status In Force
Filing Date 2019-07-31
Open to Public Date 2020-08-13
Grant Date 2023-11-07
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gardner, James Michael
  • Ng, Boon Bing

Abstract

A memory circuit for a print component including a plurality of I/O pads, including an analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component. A memory component stores memory values associated with the print component, and a control circuit, in response to a sequence of operating signals on the I/O pads representing a memory read, provides an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/175 - Ink supply systems
  • B41J 2/21 - Ink jet for multi-colour printing
  • G06F 12/06 - Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication
  • G11C 7/16 - Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
  • G11C 13/00 - Digital stores characterised by the use of storage elements not covered by groups , , or

31.

PRINT COMPONENT WITH MEMORY CIRCUIT

      
Document Number 03126915
Status Pending
Filing Date 2019-07-31
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gardner, James Michael
  • Ng, Boon Bing

Abstract

A memory circuit for a print component including plurality of I/O pads, including a first analog pad and a second analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component, including an analog signal path connected to the first analog pad and the second analog pad, the first analog pad electrically isolated from the second analog pad to interrupt the analog signal path to the print component. The memory circuit further includes a memory component to store memory values associated with the print component, and a control circuit to, in response to a sequence of operating signals received by the I/O pads representing a memory read, provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/175 - Ink supply systems
  • B41J 2/21 - Ink jet for multi-colour printing
  • G11C 13/00 - Digital stores characterised by the use of storage elements not covered by groups , , or

32.

PRINT COMPONENT WITH MEMORY CIRCUIT

      
Document Number 03126920
Status Pending
Filing Date 2019-07-31
Open to Public Date 2020-08-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Ng, Boon Bing
  • Gardner, James Michael

Abstract

A memory circuit for a print component including a plurality of I/O pads, including an analog pad, to connect to a plurality of signals paths which communicate operating signals to the print component, and a memory component to store memory values associated with the print component. A control circuit to, in response to identifying a sequence of operating signals representing a memory read, provide a first analog signal on the analog pad in parallel with a second analog signal from the print component to provide an analog electrical value on the analog pad representing stored memory values selected by the memory read.

IPC Classes  ?

  • G11C 7/16 - Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
  • B41J 2/01 - Ink jet
  • B41J 29/38 - Drives, motors, controls, or automatic cut-off devices for the entire printing mechanism
  • G06F 3/12 - Digital output to print unit
  • G06F 12/06 - Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication
  • G11C 16/06 - Auxiliary circuits, e.g. for writing into memory

33.

LOGIC CIRCUITRY

      
Document Number 03153045
Status Pending
Filing Date 2019-02-11
Open to Public Date 2020-06-11
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Panshin, Stephen D.
  • Linn, Scott A.

Abstract

A logic circuitry package for association with a replaceable print apparatus component comprises: logic and a serial data bus interface, wherein the serial data bus interface is to interface with a serial data bus of a print apparatus, and, wherein the logic is, in response to a first command sent to the logic circuitry package via the serial data bus connected to the serial data bus interface, the first command including a time period, to generate a low voltage condition on the serial data bus for a duration based on the time period, and, after the duration, return to a default voltage condition on the serial data bus.

IPC Classes  ?

  • G06F 13/42 - Bus transfer protocol, e.g. handshake; Synchronisation
  • B41J 2/175 - Ink supply systems

34.

LOGIC CIRCUITRY

      
Document Number 03113998
Status In Force
Filing Date 2018-12-03
Open to Public Date 2020-06-11
Grant Date 2023-06-20
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Panshin, Stephen D.
  • Ward, Jefferson P.
  • Linn, Scott A.
  • Gardner, James Michael

Abstract

In an example, a logic circuitry package is configured to communicate with a print apparatus logic circuit. The logic circuitry package may be configured to respond to communications sent to a first address and to at least one second address. The logic circuitry package may comprise a first logic circuit, wherein the first address is an address for the first logic circuit. The package may be configured such that, in response to a first command indicative of a task and a first time period sent to the first address, the package is accessible via at least one second address for a duration of the time period.

IPC Classes  ?

  • B41J 2/175 - Ink supply systems
  • G06F 21/44 - Program or device authentication
  • G06F 21/84 - Protecting input, output or interconnection devices output devices, e.g. displays or monitors
  • G06F 13/00 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06K 15/00 - Arrangements for producing a permanent visual presentation of the output data
  • G11C 8/00 - Arrangements for selecting an address in a digital store
  • H04N 1/32 - Circuits or arrangements for control or supervision between transmitter and receiver

35.

LOGIC CIRCUITRY

      
Document Number 03114001
Status In Force
Filing Date 2018-12-03
Open to Public Date 2020-06-11
Grant Date 2023-06-20
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Panshin, Stephen D.
  • Linn, Scott A.

Abstract

In an example, a method includes, in response to a first command sent to an address of logic circuitry associated with a replaceable print apparatus component via a serial data bus, generating, by the logic circuitry, a low voltage condition on the serial data bus. The method may further include monitoring a duration of the low voltage condition using a timer of the logic circuitry.

IPC Classes  ?

  • G06F 13/42 - Bus transfer protocol, e.g. handshake; Synchronisation
  • B41J 2/175 - Ink supply systems

36.

LOGIC CIRCUITRY PACKAGE FOR CONTROLLING IC2 TRAFFIC

      
Document Number 03121146
Status Pending
Filing Date 2018-12-03
Open to Public Date 2020-06-11
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Panshin, Stephen D.
  • Ward, Jefferson P.
  • Linn, Scott A.
  • Gardner, James Michael

Abstract

In an example, a logic circuitry package has a first address and comprises a first logic circuit. In some examples, the first address is an I2C address for the first logic circuit, and the package is configured such that, in response to a first command indicative of a task and a first time period sent to the first address, the first logic circuit is to, for a duration of the time period, perform a task, and disregard I2C traffic sent to the first address.

IPC Classes  ?

  • G06F 21/44 - Program or device authentication
  • G06F 21/74 - Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
  • G06F 21/85 - Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
  • B41J 2/175 - Ink supply systems
  • G06F 13/42 - Bus transfer protocol, e.g. handshake; Synchronisation
  • G06K 15/00 - Arrangements for producing a permanent visual presentation of the output data

37.

LOGIC CIRCUITRY

      
Document Number 03121462
Status Pending
Filing Date 2018-12-03
Open to Public Date 2020-06-11
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gardner, James Michael
  • Linn, Scott A.
  • Panshin, Stephen D.
  • Ward, Jefferson P.
  • Roethig, David Owen

Abstract

In an example, a method comprises, by logic circuitry associated with a replaceable print apparatus component, responding to a first validation request sent via an I2C bus to a first address associated with the logic circuitry with a first validation response; and responding to a second validation request sent via the I2C bus to a second address associated with the logic circuitry with a second validation response.

IPC Classes  ?

38.

PRINTABLE LIQUID SUPPLY CARTRIDGES

      
Document Number 03120979
Status Pending
Filing Date 2018-12-03
Open to Public Date 2020-06-11
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Studer, Anthony D.
  • Olsen, David

Abstract

A printable liquid supply cartridge comprises a housing enclosing an internal volume. The housing has a front end to connect to a printer and first and second sides extending from the front end to a rear end. The front end has a printable liquid outlet closer to the bottom than to the top and has a gas inlet above the printable liquid outlet, each of the printable liquid outlet and the gas inlet to facilitate insertion of a respective fluid pen therein. There is a recess in the front end above the gas inlet, the recess being delimited by a first wall having an internal side and an external side that is part of the first side. An I2C data interface comprising at least three electrical connection pads are exposed on the internal side of the first wall facing towards the recess, the connection pads arranged in a top to bottom direction.

IPC Classes  ?

39.

LOGIC CIRCUITRY

      
Document Number 03121147
Status In Force
Filing Date 2018-12-03
Open to Public Date 2020-06-11
Grant Date 2023-08-22
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Panshin, Stephen D.
  • Ward, Jefferson P.
  • Linn, Scott A.
  • Gardner, James Michael

Abstract

In an example, a logic circuitry package is configured to be addressable via a first address and at least one second address and comprises a first logic circuit. The first address may be an address for the first logic circuit, and the package may be configured such that, in response to a first command indicative of a first command time period sent to the first address, the package is accessible via at least one second address for a duration of the first command time period; and in response to a second command indicative of a second command time period sent to the first address, the first logic circuit is to, for a duration of the second command time period, disregard traffic sent to the first address.

IPC Classes  ?

  • B41J 2/175 - Ink supply systems
  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • G06F 12/06 - Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication
  • G06F 12/14 - Protection against unauthorised use of memory
  • G06F 13/42 - Bus transfer protocol, e.g. handshake; Synchronisation
  • G06K 15/00 - Arrangements for producing a permanent visual presentation of the output data
  • H04L 12/40 - Bus networks

40.

PRINT LIQUID SUPPLY APPARATUS

      
Document Number 03095104
Status In Force
Filing Date 2018-07-13
Open to Public Date 2020-01-16
Grant Date 2023-02-14
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Leiser, Judson M.
  • Boleda Busquets, Miquel
  • Karlsboeck, Bernd
  • Olsen, David
  • Peterschmidt, Michael E.
  • Collie, Lynn A.
  • Osborne, Paul Allan
  • Schalk, Wesley R.
  • Ender, Ronald J.
  • Haines, Paul Mark
  • Kolodziej, Roger J.
  • O'Hara, Steve A.

Abstract

A print liquid supply apparatus for connection to a print system comprises a container having perpendicular first, second and third dimensions, and an interface structure to fluidically connect the container to a receiving station. The interface structure has first, second and third dimensions parallel to respective dimensions of the container and comprises a liquid interface having a seal to fluidically connect to a liquid needle of the receiving station, and a liquid channel fluidically connecting the container and liquid interface. The liquid channel and liquid interface define a needle insertion direction approximately parallel to the second dimension of the interface structure. A key pen extends next to a needle receiving portion of the liquid channel approximately parallel to a central axis of the needle receiving portion. A recess houses a contact pad array for connection to a data connector of the print system. Pad contact surfaces of the contact pad array extend in a second virtual reference plane parallel to the second and third dimensions of the interface structure and face the container. The contact pad array extends along a line parallel to the third dimension of the interface structure. The second virtual reference plane extends at a distance from a first virtual reference plane parallel to the interface structure second and third dimensions. The first virtual reference plane intersects the liquid channel and liquid interface so that on connection with the print system, the data connector extends into the recess and between the contact surfaces and the container.

IPC Classes  ?

41.

PRINT LIQUID SUPPLY APPARATUS FOR LIQUID SUPPLY TO A RECEIVING STATION LIQUID NEEDLE

      
Document Number 03095145
Status In Force
Filing Date 2018-07-13
Open to Public Date 2020-01-16
Grant Date 2022-12-13
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Leiser, Judson M.
  • Boleda Busquets, Miquel
  • Karlsboeck, Bernd
  • Olsen, David
  • Peterschmidt, Michael E.

Abstract

A print liquid supply apparatus configured to supply liquid to a liquid needle of a receiving station comprises a liquid container including an at least partially collapsible liquid reservoir and an interface structure at a side of the container. The interface structure includes a liquid channel that includes a reservoir connecting portion and a needle receiving portion. A liquid interface of the liquid channel adjacent the needle receiving portion is at a distance from the reservoir connecting portion. At least one of the needle receiving portion and a seal configured to receive the liquid needle define a needle insertion direction. At least one key pen base and key pen protrude from the key pen base in a direction parallel and opposite to the needle insertion direction, and extend next and parallel to the needle receiving portion. The key pen has a respective actuating surface area, to pass through a key slot and actuate upon an actuator of the receiving station. A contact pad array is next to the needle receiving portion with contact surfaces of the contact pads facing the container. The contact pad array is arranged along a line extending in a lateral direction perpendicular to the needle insertion direction. The key pen, needle receiving portion and liquid interface are intersected by a first virtual reference plane parallel to, and at a distance from, a second virtual reference plane that intersects the contact pad array.

IPC Classes  ?

42.

SELECTORS FOR NOZZLES AND MEMORY ELEMENTS

      
Document Number 03050240
Status In Force
Filing Date 2017-07-06
Open to Public Date 2019-01-10
Grant Date 2021-05-04
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Ng, Boon Bing
  • Pan, Rui
  • Sudhakar, Mohan Kumar
  • Hall, Brendan

Abstract

In some examples, a circuit for use with a memory element and a nozzle for outputting fluid, includes a data line, a fire line, and a selector responsive to the data line to select the memory element or the nozzle. The selector is to select the memory element responsive to the data line having a first value, and to select the nozzle responsive to the data line having a second value different from the first value. The fire line is to control activation of the nozzle in response to the nozzle being selected by the selector, and to communicate data of the memory element in response to the memory element being selected by the selector.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

43.

REPLACEABLE ITEM AUTHENTICATION

      
Document Number 02961941
Status In Force
Filing Date 2016-10-27
Open to Public Date 2018-04-27
Grant Date 2020-08-25
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Panshin, Stephen D.
  • Ward, Jefferson P.
  • Ness, Erik D.

Abstract

A replaceable item for a host device, such as a print substance cartridge for a printing device, stores multiple identities. For each identity, the replaceable item stores multiple authentication values, or passwords. The replaceable item selects an identity, and in response to a request for an authentication value from the host device, sends the requested authentication value for the selected identity.

IPC Classes  ?

  • B41J 2/175 - Ink supply systems
  • G03G 21/14 - Electronic sequencing control
  • H04N 1/034 - PICTORIAL COMMUNICATION, e.g. TELEVISION - Details thereof - Details of scanning heads for picture-information reproduction using ink, e.g. ink-jet heads

44.

REPLACEABLE ITEM AUTHENTICATION

      
Document Number 02961946
Status In Force
Filing Date 2016-10-27
Open to Public Date 2018-04-27
Grant Date 2020-03-24
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Panshin, Stephen D.
  • Ward, Jefferson P.
  • Ness, Erik D.

Abstract

A replaceable item for a host device includes a non-volatile memory and logic. The non-volatile memory stores passwords or authentication values, and/or a cryptographic key. The logic satisfactorily responds to requests for passwords a maximum permitted number of times to authenticate the replaceable item within the host device.

IPC Classes  ?

  • G06F 21/30 - Authentication, i.e. establishing the identity or authorisation of security principals
  • G06F 21/44 - Program or device authentication

45.

INPUT CONTROL SIGNALS PROPAGATED OVER SIGNAL PATHS

      
Document Number 03038650
Status In Force
Filing Date 2016-10-06
Open to Public Date 2018-04-12
Grant Date 2021-03-09
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Ng, Boon Bing
  • Goy, Hang Ru

Abstract

In some examples, a control apparatus for a fluid ejection device includes a plurality of selectors controllable by an input control signal to produce signals for selecting respective nozzles of the fluid ejection device, where a first selector is responsive to the input control signal propagated over a first signal path to turn on a device in the first selector, and a second selector is responsive to the input control signal to perform a different task. A memory encoder is to select a memory location in the memory, the memory encoder responsive to the input control signal propagated over a second signal path to turn on a device in the memory encoder, where signal loading of the second signal path is isolated from signal loading of the first signal path.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 2/175 - Ink supply systems

46.

PRINTING DEVICE SUPPLY COMPONENT

      
Document Number 03027349
Status In Force
Filing Date 2016-11-07
Open to Public Date 2018-01-11
Grant Date 2022-03-22
Owner
  • HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
  • PURDUE RESEARCH FOUNDATION (USA)
Inventor
  • Shaw, Mark Q.
  • Jeran, Paul
  • Collison, Sean Michael
  • Nelson, Terry M.
  • Tang, Chuohao
  • Reibman, Amy Ruth
  • Allebach, Jan P.

Abstract

A memory device for use with a printing device is supply component disclosed. The memory device includes corrective data corresponding with nodes of a reference color table for the printing device. The printing device accepts a set of media types for printing. The corrective data includes residual values to transform the nodes of the reference color table to a customized color table for use with a selected media type of the plurality of media types.

IPC Classes  ?

  • H04N 1/60 - Colour correction or control
  • H04N 1/00 - PICTORIAL COMMUNICATION, e.g. TELEVISION - Details thereof

47.

COLOR LOOK UP TABLE COMPRESSION

      
Document Number 03027338
Status In Force
Filing Date 2016-07-08
Open to Public Date 2018-01-11
Grant Date 2019-10-22
Owner
  • HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
  • PURDUE RESEARCH FOUNDATION (USA)
Inventor
  • Tang, Chuohao
  • Reibman, Amy Ruth
  • Allebach, Jan P.
  • Collison, Sean Michael
  • Shaw, Mark Q.
  • Gondek, Jay S.

Abstract

A memory device includes a compressed color table and corrective information. The compressed color table includes a first set of nodes of the color table compressed with a lossy compression at a selected compression ratio. The first set of nodes include a color difference within an error threshold at the selected compression ratio. Corrective information is included for a second set of nodes of the color table. The second set of nodes have a color difference outside the error threshold.

IPC Classes  ?

  • H04N 1/60 - Colour correction or control
  • H04N 1/00 - PICTORIAL COMMUNICATION, e.g. TELEVISION - Details thereof
  • H04N 1/41 - Bandwidth or redundancy reduction

48.

COLOR LOOK UP TABLE COMPRESSION

      
Document Number 03027358
Status In Force
Filing Date 2016-11-07
Open to Public Date 2018-01-11
Grant Date 2020-09-15
Owner
  • HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
  • PURDUE RESEARCH FOUNDATION (USA)
Inventor
  • Hu, Zhenhua
  • Tang, Chuohao
  • Nelson, Terry M.
  • Shaw, Mark Q.
  • Allebach, Jan P.
  • Reibman, Amy Ruth

Abstract

A memory device includes a compressed color table having a compressed difference table and a residue table. The difference table includes difference nodes in which each difference node represents a value that is a difference of a value of a node of an original color table and a value of a corresponding node of a reference color table. The residue table includes residue nodes in which each residue node represents a value that is a difference of a value of a node of the original color table and a value of a corresponding node of a reconstructed compressed difference table.

IPC Classes  ?

  • H04N 1/60 - Colour correction or control
  • H04N 1/00 - PICTORIAL COMMUNICATION, e.g. TELEVISION - Details thereof
  • H04N 1/41 - Bandwidth or redundancy reduction

49.

REPLACEABLE ITEM AUTHENTICATION

      
Document Number 02961947
Status In Force
Filing Date 2016-06-17
Open to Public Date 2017-12-17
Grant Date 2020-01-14
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Ness, Erik D.
  • Panshin, Stephen D.
  • Ward, Jefferson P.

Abstract

A replaceable item for a host device includes a non-volatile memory and logic. The non-volatile memory stores passwords or authentication values, and/or a cryptographic key. The logic permits retrieval of a predetermined maximum number of the passwords from the non-volatile memory to authenticate the replaceable item within the host device. The predetermined maximum number of the passwords is less than the total number of the passwords.

IPC Classes  ?

  • G06F 21/30 - Authentication, i.e. establishing the identity or authorisation of security principals
  • G06F 21/44 - Program or device authentication
  • B41J 2/175 - Ink supply systems
  • G03G 21/14 - Electronic sequencing control

50.

XML FILE CONDENSING

      
Document Number 03002669
Status In Force
Filing Date 2015-11-20
Open to Public Date 2017-05-26
Grant Date 2022-05-17
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Sanchez Ribes, Salvador
  • Castano Aspas, Jorge

Abstract

Examples associated with extensible markup language (XML) file condensing are described. On example includes generating a set of indexes from an XML file. The set of indexes may include a tag index that indexes tag terms used in the XML file, an attribute indexes attribute terms in the XML file, and a value index that indexes value terms in the XML file. The example also includes condensing the XML file into a condensed version of the XML file by translating the XML file according to the indexes. The example also includes generating a translated file. The translated file may be made from the set of indexes and the condensed version of the XML file.

IPC Classes  ?

  • G06F 16/81 - Indexing, e.g. XML tags; Data structures therefor; Storage structures
  • G06F 3/12 - Digital output to print unit

51.

IMAGING SUPPLIES

      
Document Number 02983810
Status In Force
Filing Date 2015-07-31
Open to Public Date 2017-02-09
Grant Date 2020-12-22
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor Jeran, Paul

Abstract

Imaging supplies are disclosed in some examples. An apparatus includes an imaging supply including a first memory and a second memory, the first memory storing an indication of at least one of unsigned data, signed data, and limited or no data being stored at the second memory, when at least one of unsigned and signed data is present on the second memory, the second memory storing consumables management data, when the imaging supply is coupled to a printer and consumables management data are stored on the second memory, the consumables management data to cause the printer to dynamically define at least one of a yield, a low point, and an out point of the imaging supply.

IPC Classes  ?

52.

PRINTER CARTRIDGES AND MEMORY DEVICES CONTAINING COMPRESSED MULTI-DIMENSIONAL COLOR TABLES

      
Document Number 02961348
Status In Force
Filing Date 2015-05-15
Open to Public Date 2016-11-24
Grant Date 2020-07-07
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Gondek, Jay S.
  • Nichols, Stephen J.
  • Ward, Jefferson P.

Abstract

In one example in accordance with the present disclosure a printer cartridge and memory device containing a representation of a compressed multi-dimensional color table is described. The color table includes at least one low dimensional portion of the multi-dimensional color table storing color transformation information at a first resolution and a number of remaining portions of the multi-dimensional color table storing color transformation information at a second resolution. In the color table, the first resolution is greater than the second resolution and the at least one compressed multi-dimensional color table is to generate a high resolution uncompressed multi-dimensional color table the high resolution being at least as great as the first resolution.

IPC Classes  ?

53.

PRINTING MATERIAL CARTRIDGE

      
Document Number 02974804
Status In Force
Filing Date 2015-04-23
Open to Public Date 2016-10-27
Grant Date 2018-07-24
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor Jeran, Paul

Abstract

In one example, a printing material cartridge includes a container to contain a printing material and a memory to prompt a printer in which the cartridge is installed to write a printer identifier to the memory.

IPC Classes  ?

  • B41J 2/175 - Ink supply systems
  • G03G 15/06 - Apparatus for electrographic processes using a charge pattern for developing

54.

PRINTING MATERIAL CARTRIDGE

      
Document Number 02975440
Status In Force
Filing Date 2015-04-23
Open to Public Date 2016-10-27
Grant Date 2019-06-04
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor Jeran, Paul

Abstract

In one example, a printing material cartridge includes a container to contain a printing material and a memory including a memory address to store a single identifier identifying a fleet of printers.

IPC Classes  ?

  • B41J 2/175 - Ink supply systems
  • G03G 15/06 - Apparatus for electrographic processes using a charge pattern for developing

55.

PRINTHEAD EMPLOYING DATA PACKETS INCLUDING ADDRESS DATA

      
Document Number 02975825
Status In Force
Filing Date 2015-02-13
Open to Public Date 2016-08-18
Grant Date 2020-08-25
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Bakker, Chris
  • Martin, Eric T.
  • Ghozeil, Adam L.

Abstract

A printhead including an address line for communicating a set of addresses and a number of primitives, each primitive including a plurality of controllable activation devices coupled to the address line, each switch corresponding to at least one address of the set of addresses, each address corresponding to one of a number of primitive functions. A buffer receives a series of data packets, each data packet including address bits representative of one address of the set of addresses. Address logic receives the address bits from the buffer, wherein for each data packet the address logic encodes the address represented by the address bits onto the address line, and wherein the at least one switch corresponding to the address activates the primitive function corresponding to address.

IPC Classes  ?

  • B41J 29/38 - Drives, motors, controls, or automatic cut-off devices for the entire printing mechanism
  • B41J 2/07 - Ink jet characterised by jet control

56.

ENCRYPTION OF FLUID CARTRIDGES FOR USE WITH IMAGING DEVICES

      
Document Number 02965856
Status In Force
Filing Date 2014-10-31
Open to Public Date 2016-05-06
Grant Date 2020-08-18
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Ness, Erik D.
  • Rice, Huston W.
  • Hall, Brendan

Abstract

Encryption of fluid cartridges for use with imaging devices is disclosed herein. One disclosed apparatus includes a memory of a fluid cartridge comprising a plurality of sequential bits, where the plurality of sequential bits are written to the memory after the plurality of sequential bits are transformed based on scrambling bits of the plurality of sequential bits, and a memory interface of the fluid cartridge to enable access to the memory to authenticate the fluid cartridge.

IPC Classes  ?

57.

TRANSFORM MAP AT PRINTER CARTRIDGE

      
Document Number 02958426
Status In Force
Filing Date 2014-08-19
Open to Public Date 2016-02-25
Grant Date 2021-03-23
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Nichols, Stephen J.
  • Gondek, Jay S.
  • Ward, Jefferson P

Abstract

A transform wrapper is stored on a memory device and the memory device may be included in a printer cartridge. The transform wrapper may dynamically build a transform map for a printer based on metadata stored at the memory device. The metadata may indicate at least one of a type of depositing material, transform map, print media and printer.

IPC Classes  ?

58.

SYSTEM FOR SUGGESTING NETWORK RESOURCE FOR USE BY A NETWORK TERMINAL BASED ON NETWORK RESOURCE RANKING

      
Document Number 02883057
Status In Force
Filing Date 2015-02-26
Open to Public Date 2015-09-07
Grant Date 2022-04-19
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Burns, Mark
  • St. Laurent, Michael
  • Krishnammagaru, Dharmesh

Abstract

A network resource access system providing access by a user to network resources over a communications network, the system comprising: a resource registry including stored resource records associated with each of the network resources and a stored user profile containing a list of network resources such that the network resources have a ranking relative to each other based on user behaviour with respect to usage of each of the network resources, the user profile associated with the user such that the list of network resources contains the network resources previously accessed by the user; and a resource service for receiving an access query, the resource service further configured for accessing the user profile to identify a suggested network resource from the list in view of the relative ranking and for sending identification of the suggested network resource to the network terminal in response to the access query.

IPC Classes  ?

  • H04L 12/16 - Arrangements for providing special services to substations

59.

THREE-DIMENSIONAL ADDRESSING FOR ERASABLE PROGRAMMABLE READ ONLY MEMORY

      
Document Number 02938125
Status In Force
Filing Date 2014-01-31
Open to Public Date 2015-08-06
Grant Date 2018-10-23
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Ng, Boon Bing
  • Goy, Hang Ru

Abstract

A print head memory device comprises a number of erasable programmable read only memory (EPROM) banks, each comprising an EPROM memory array, on an integrated print head; and a number of shift registers, each connected to the number of EPROM banks, to generate a three-dimensional EPROM address comprising: a row select data signal specifying a row portion of the EPROM address, a column select data signal specifying a column portion of the EPROM address, and a bank select data signal generated by a shift register of the number of shift registers to specify an EPROM bank of the number of EPROM banks associated with the row and column select data signals. The print head memory device provides for more information to be stored on an integrated print head (IPH) and/or uses a smaller space than conventional memory on IPHs.

IPC Classes  ?

  • G11C 16/08 - Address circuits; Decoders; Word-line control circuits

60.

FLUID EJECTION APPARATUS WITH SINGLE POWER SUPPLY CONNECTOR

      
Document Number 02932092
Status In Force
Filing Date 2013-11-27
Open to Public Date 2015-06-04
Grant Date 2018-05-01
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, LP (USA)
Inventor
  • Ghozeil, Adam L.
  • Maxfield, David
  • Fricke, Peter James

Abstract

An example provides a fluid ejection apparatus including a fluid feed slot along a length of a print head die of the fluid ejection apparatus to supply a fluid to a plurality of drop ejectors, control circuitry adjacent to at least one side of the fluid feed slot to control ejection of drops of fluid from the plurality of drop ejectors, and a single power supply connector at an end of the print head die to supply power to the control circuitry.

IPC Classes  ?

  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
  • B41J 29/38 - Drives, motors, controls, or automatic cut-off devices for the entire printing mechanism

61.

CRUM UNIT MOUNTABLE AND DISMOUNTABLE IN CONSUMABLE UNIT OF IMAGE FORMING APPARATUS AND IMAGE FORMING APPARATUS USING THE SAME

      
Document Number 02908664
Status In Force
Filing Date 2014-10-31
Open to Public Date 2015-05-07
Grant Date 2017-07-11
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor Kim, Youn-Jae

Abstract

A CRUM unit which is mountable/dismountable on an image forming apparatus is disclosed. The CRUM unit includes a power extracting circuit configured to, when a clock signal is received from an image forming apparatus, extract power from a high value of the clock signal and store in a capacitive element and a controller configured to operate using the extracted power, wherein the clock signal has a first pulse width in a data section where a data signal is received and transmitted, and has a second pulse width which is different from the first pulse width in an pause section where a data signal is not received.

IPC Classes  ?

  • G03G 15/14 - Apparatus for electrographic processes using a charge pattern for transferring a pattern to a second base
  • G03G 21/16 - Mechanical means for facilitating the maintenance of the apparatus, e.g. modular arrangements

62.

SUPPLY AUTHENTICATION VIA TIMING CHALLENGE RESPONSE

      
Document Number 02920802
Status In Force
Filing Date 2013-08-30
Open to Public Date 2015-03-05
Grant Date 2019-05-07
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Ward, Jefferson P
  • Panshin, Stephen D

Abstract

In an example implementation, a print supply cartridge comprises a microcontroller to receive a timing challenge and enable authentication of the cartridge by providing a challenge response. The challenge response is provided in a challenge response time that falls within an expected time window.

IPC Classes  ?

63.

CRUM CHIP AND IMAGE FORMING DEVICE FOR AUTHENTICATION AND COMMUNICATION, AND METHODS THEREOF

      
Document Number 02896345
Status In Force
Filing Date 2013-07-18
Open to Public Date 2014-07-03
Grant Date 2019-04-30
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Lee, Jae-Yoon
  • Woo, Hong-Rok

Abstract

A Customer Replaceable Unit Monitoring (CRUM) chip, an image forming apparatus, and a method of authenticating are provided. The apparatus includes a main body that includes a main controller controlling operations of the apparatus, a consumable unit mounted on the main body to communicate with the main controller, and a CRUM chip that is provided in the consumable unit and stores information regarding the consumable unit. The main controller and the CRUM chip transmit and receive signals that include data and integrity detection data between each other. The integrity detection data is generated by accumulating and examining integrity detection data included in a previous signal.

IPC Classes  ?

  • G06F 21/50 - Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
  • G06F 21/30 - Authentication, i.e. establishing the identity or authorisation of security principals
  • G06F 3/12 - Digital output to print unit
  • G06F 13/14 - Handling requests for interconnection or transfer

64.

IMAGE FORMING APPARATUS AND METHOD FOR CONTROLLING THE SAME

      
Document Number 02834842
Status In Force
Filing Date 2012-05-04
Open to Public Date 2012-11-08
Grant Date 2022-09-27
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor Park, Ho-Beom

Abstract

An image forming apparatus includes first and second memories, and a main controller and a sub-controller. The main controller performs a control operation using the first memory in a normal mode state, the sub-controller is mounted on an engine unit provided in the image forming apparatus to perform an image forming job by driving the engine unit in a normal mode state under the control of the main controller, the main controller transmits a low-power mode change request to the sub-controller if a condition for changing a mode state from the normal mode state to a low-power mode state is satisfied, and the sub-controller copies a low-power service program stored in the first memory into the second memory if the low-power mode change request is received, and performs a low-power service by executing the low-power service program through accessing of the second memory.

IPC Classes  ?

  • G06F 1/3234 - Power saving characterised by the action undertaken
  • G06F 3/12 - Digital output to print unit

65.

FLUID CARTRIDGE

      
Document Number 02813381
Status In Force
Filing Date 2010-10-22
Open to Public Date 2012-04-26
Grant Date 2014-12-16
Owner HEWLETT PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Harvey, David C.
  • Gonzales, Curt
  • Stathem, Ralph
  • Olsen, David
  • Welter, Dave

Abstract

Fluid cartridge (3), including interfaces, arranged to be guided a straight line for connecting the interfaces.

IPC Classes  ?

  • B41J 2/175 - Ink supply systems
  • B41J 2/045 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers

66.

MULTI-MODE PRINTING

      
Document Number 02798981
Status In Force
Filing Date 2010-05-11
Open to Public Date 2011-11-17
Grant Date 2015-06-23
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Rice, Huston W.
  • Quintana, Jason M.

Abstract

A printing system configured for multi-mode printing, the printing system comprising a print head, the print head including a number of nozzle pairs (600), each nozzle pair (600) comprising a primary ink nozzle (602) and a secondary ink nozzle (604); and switching circuitry (606) for selectively firing either or both of the nozzles in a selected pair (600) within one of a number of time slots (518) based on a current print mode.

IPC Classes  ?

  • B41J 2/07 - Ink jet characterised by jet control
  • B41J 2/175 - Ink supply systems
  • B41J 29/38 - Drives, motors, controls, or automatic cut-off devices for the entire printing mechanism

67.

FLUID EJECTION DEVICE

      
Document Number 02746043
Status In Force
Filing Date 2008-12-08
Open to Public Date 2010-06-17
Grant Date 2016-08-30
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Benjamin, Trudy
  • Torgerson, Joseph M.

Abstract

A fluid ejection device includes a plurality of address lines and a fire line for communicating a fire signal. The de-vice also includes a plurality of nozzle circuits coupled to the fire line and the plurality of address lines. Each nozzle circuit is con-figured, when enabled, to eject fluid via a different one of a plurality of nozzles in response to the fire signal. A subset of the plu-rality of address lines is coupled to each pair of the plurality of nozzle circuits. Each subset that is coupled to one of the pairs of nozzle circuits is selected so that simultaneous activation of every address line of that subset simultaneously enables each nozzle circuit in the pair or pairs of nozzle circuits coupled to that triad and none of the other nozzle circuits of the plurality of nozzle cir-cuits.

IPC Classes  ?

68.

FLUID EJECTION DEVICE WITH DATA SIGNAL LATCH CIRCUITRY

      
Document Number 02671448
Status In Force
Filing Date 2006-11-30
Open to Public Date 2008-06-05
Grant Date 2014-01-21
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Benjamin, Trudy
  • Axtell, James P.

Abstract

A fluid ejection device (22/40) includes a first fire line (110a-110n/214a-214f), a second fire line (110a-110n/214a-214f), data lines (108a-108m/208a-208h), latch circuitry (152,404/162/184,186), first drop generators (60), and second drop generators (60). The first fire line is adapted to conduct a first energy signal including first energy pulses and the second fire line is adapted to conduct a second energy signal including second energy pulses. The data lines are adapted to conduct data signals that represent an image and the latch circuitry is configured to latch the data signals to provide latched data signals based on at least one clock signal. The first drop generators are configured to respond to the first energy signal to eject fluid based on the latched data signals and the second drop generators are configured to respond to the second energy signal to eject fluid based on the latched data signals.

IPC Classes  ?

  • B41J 2/05 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers produced by the application of heat

69.

RECORDING SHEET WITH IMPROVED IMAGE DRY TIME

      
Document Number 02666699
Status In Force
Filing Date 2006-10-19
Open to Public Date 2008-04-24
Grant Date 2013-10-15
Owner
  • HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
  • GLOBAL HOLDINGS II, INC. (USA)
Inventor
  • Schultz, Steven D.
  • Koenig, Michael F.
  • Yang, Sen
  • Hartman, Richard R.
  • Tran, Hai
  • Askeland, Ronald
  • Sperry, William R.
  • Gibson, Lawrence
  • Stoffel, John

Abstract

This invention is directed to an recording sheet having improved image dry- time for use in printing comprising a substrate having in contact with at least one surface thereof one or more water soluble divalent metal salts, preferably admixed with one or more starches, to process of forming such recording sheet, to a method of generating one or more image(s) on said recording sheet in an printing process and to a recording sheet having one or more images on a surface thereof.

IPC Classes  ?

  • B41M 5/50 - Recording sheets characterised by the coating used to improve ink, dye or pigment receptivity, e.g. for ink-jet or thermal dye transfer recording

70.

GATE-COUPLED EPROM CELL FOR PRINTHEAD

      
Document Number 02641471
Status In Force
Filing Date 2007-02-23
Open to Public Date 2007-10-25
Grant Date 2015-08-18
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor Benjamin, Trudy L.

Abstract

An EPROM cell (270) in a printhead control circuit for an inkjet printer, having exactly one polysilicon layer (256) and a conductive layer (260) disposed above the polysilicon layer, includes a control transistor (272) and an EPROM transistor (274). The control and EPROM transistors each have floating gates (280, 282) comprising a portion of the polysilicon layer (256), and an electrical interconnection, comprising a portion of the conductive layer (260), interconnects the floating gate (280) of the control transistor (272) and the floating gate (282) of the EPROM transistor (274).

IPC Classes  ?

  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • B41J 2/05 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers produced by the application of heat
  • G11C 16/04 - Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

71.

METHODS AND APPARATUSES FOR USE IN INKJET PENS

      
Document Number 02605911
Status In Force
Filing Date 2006-04-05
Open to Public Date 2006-11-02
Grant Date 2013-06-18
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Studer, Anthony D.
  • Almen, Kevin D.
  • Hagen, David M.

Abstract

Methods and apparatuses are provided for use in inkjet pens (200, 300, 400). One method includes, during an initial stage of pen life (604), drawing ink (108) from an ink reservoir (106) though a standpipe (100), and, during an extended stage of pen life (606), allowing external air (204) to enter into the standpipe (110) through a standpipe bubbler (202,404) and drawing ink from within the standpipe (110) and, if at all, only insubstantially from the ink reservoir (106).

IPC Classes  ?

72.

INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING

      
Document Number 02581938
Status In Force
Filing Date 2005-09-21
Open to Public Date 2006-04-06
Grant Date 2014-02-11
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Dodd, Simon
  • Wang, S. Jonathan
  • Tom, Dennis W.
  • Bryant, Frank R.
  • Mcmahon, Terry E.
  • Miller, Richard Todd
  • Hindman, Gregory T.

Abstract

A semiconductor structure (5), fluid ejection device, and methods for manufacturing the same are provided, such that a contact to a substrate (10) is formed from a conductive layer (30).

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • B41J 2/14 - Structure thereof
  • H01L 21/31 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers

73.

FLUID EJECTION DEVICE WITH IDENTIFICATION CELLS

      
Document Number 02563730
Status In Force
Filing Date 2005-04-06
Open to Public Date 2005-11-10
Grant Date 2011-01-04
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Benjamin, Trudy
  • Torgerson, Joseph M.
  • Eaton, William S.

Abstract

A fluid ejection device comprising an identification line (402) adapted to receive a program signal and a read signal and identification cells (400) electrically coupled to the identification line (402). Each of the identification cells (400) comprises a memory circuit and a memory element. The memory circuit is adapted to receive and respond to signals in order to selectively store a value in the memory circuit, which determines whether the identificaiton cell is responsive to signals reciewved on the identifcation line.

IPC Classes  ?

74.

FLUID EJECTION DEVICE

      
Document Number 02563728
Status In Force
Filing Date 2005-04-06
Open to Public Date 2005-11-10
Grant Date 2012-09-25
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor
  • Benjamin, Trudy L.
  • Axtell, James P.
  • Torgerson, Joseph M.
  • Miller, Michael D.

Abstract

A fluid ejection device comprises a first fire line adapted to conduct a first energy signal comprising energy pulses, a second fire line adapted to conduct a second energy signal comprising energy pulses, a first address generator (1000, 1200) configured to provide first address signals, a second address generator (1002, 1202) configured to provide second address signals, first drop generators (1004a-c, 1004d-f) and second drop generators (1204a-c, 1204d- f). The first drop generators (1004a-c, 1004d-f) are electrically coupled to the first fire line and configured to respond to the first energy signal to eject fluid based on the first address signals. The second drop generators (1204a-c, 1204d-f) are electrically coupled to the second fire line and configured to respond to the second energy signal to eject fluid based on the second address signals.

IPC Classes  ?

  • B41J 2/05 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers produced by the application of heat
  • G06K 15/10 - Arrangements for producing a permanent visual presentation of the output data using printers by matrix printers

75.

FLUID EJECTION DEVICE

      
Document Number 02564111
Status In Force
Filing Date 2005-04-06
Open to Public Date 2005-11-10
Grant Date 2012-08-14
Owner HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (USA)
Inventor Benjamin, Trudy L.

Abstract

A fluid ejection device comprising firing cells including a first group of firing cells (1704a-c) and a second group of firing cells (1704d-e) and control circuitry (1700). The control circuitry (1700) is configured to respond to the control signal to selectively initiate a first sequence adapted to enable the first group of firing cells (1704a-c) for activation and a second sequence adapted to enable the second group of firing cells (1704d-e) for activation.

IPC Classes  ?

  • B41J 2/05 - Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers produced by the application of heat
  • G06K 15/10 - Arrangements for producing a permanent visual presentation of the output data using printers by matrix printers