Integrated Silicon Solutions, (Cayman) Inc.

Cayman Islands

 
Total IP 220
Total IP incl. subs 260 (+ 40 for subs)
Total IP Rank # 5,720
IP Activity Score 3.1/5.0    230
IP Activity Rank # 3,067

Patents

Trademarks

220 0
0 0
0 0
0
 
Last Patent 2023 - Monolithic serial nor flash with...
First Patent 2014 - Method for manufacturing mtj mem...

Subsidiaries

1 subsidiaries with IP (40 patents, 0 trademarks)

 Register for free to unlock the subsidiary list

Latest Inventions, Goods, Services

2023 Invention Multi terminal device stack systems and methods. Embodiments of the present invention include mu...
2022 Invention System and method for classifying data using neural networks with errors. A computing device incl...
Invention Monolithic serial nor flash with wide input-output bus. A monolithic serial NOR Flash memory dev...
Invention Three-dimensional (3d) magnetic memory devices comprising a magnetic tunnel junction (mtj) having...
Invention Arbitration control for pseudostatic random access memory device. An arbitration control circuit ...
Invention Three dimensional perpendicular magnetic tunnel junction with thin film transistor array. A meth...
Invention Mram access coordination systems and methods via pipeline in parallel. Embodiments of the present...
Invention Method for manufacturing a magnetic random-access memory device using post pillar formation annea...
Invention Magnetic tunnel junction element with ru hard mask for use in magnetic random-access memory. A ma...
Invention Dram with selective epitaxial cell transistor. A method for manufacturing a dynamic random access...
Invention Compact and efficient cmos inverter. A method for manufacturing an inverter circuit includes prov...
Invention Precessional spin current structure with non-magnetic insertion layer for mram. A magnetoresisti...
Invention High retention storage layer using ultra-low ra mgo process in perpendicular magnetic tunnel junc...
2021 Invention Error cache system with coarse and fine segments for power optimization. A memory device for stor...
Invention Heuristics for selecting subsegments for entry in and entry out operations in an error cache syst...
Invention Methods of manufacturing three-dimensional arrays with mtj devices including a free magnetic tren...
Invention Patterned silicide structures and methods of manufacture. Aspects of the present technology are d...
Invention Magnetic tunnel junction devices including a free magnetic trench layer and a planar reference ma...
Invention Multi terminal device stack formation methods. Embodiments of the present invention include multi...
Invention High density spin orbit torque magnetic random access memory. A spin orbit torque memory device h...
Invention Mram architecture with multiplexed sense amplifiers and direct write through buffers. A magnetic ...
Invention Sense amplifier circuit for preventing read disturb. A sense amplifier circuit implements a sense...
2020 Invention Spi nor memory with optimized read and program operation. A serial NOR memory device receives ser...
Invention Circuit engine for managing memory meta-stability. A memory device for storing data comprises a m...
Invention Methods of manufacture precessional spin current magnetic tunnel junction devices. A Magnetic Tun...
Invention Selector transistor with metal replacement gate wordline. A vertical transistor structure having ...
Invention Compact and efficient cmos inverter. A structure for providing an inverter circuit employing two ...
Invention Dram with selective epitaxial transistor and buried bitline. A DRAM memory cell and memory cell a...
Invention Dram with selective epitaxial cell transistor. A dynamic random access memory element that includ...
Invention Selector transistor with continuously variable current drive. A magnetic memory structure that in...
2019 Invention Non-volatile memory with source line resistance compensation. A non-volatile memory device determ...
Invention Wide range output driver circuit for semiconductor device. An output circuit receives a data sign...
Invention Vertical selector stt-mram architecture. A magnetic memory array having a source-plane electrical...
Invention Integration of epitaxially grown channel selector with two terminal resistive switching memory el...
Invention Measurement of mtj in a compact memory array. A system and method for testing a magnetic memory c...
Invention Integration of epitaxially grown channel selector with mram device. A magnetic memory array havin...
Invention Fabricating sub-lithographic devices. A sub-lithographic device, and a method of fabricating the...
Invention Fabricating devices with reduced isolation regions. A system and method of fabricating a plurali...
Invention Method for manufacturing magnetic memory element with post pillar formation annealing. A method f...
Invention Method for manufacturing a magnetic memory element using ru and diamond like carbon hard masks. A...
Invention Method for manufacturing a self-aligned magnetic memory element with ru hard mask. A method for ...
Invention System and method for training neural networks with errors. A computing device includes one or mo...
Invention Error recovery in magnetic random access memory after reflow soldering. A method is performed at ...
Invention Mram array having reference cell structure and circuitry that reinforces reference states by indu...
Invention Master slave level shift latch for word line decoder memory architecture. A clocked driver circui...