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2023
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Invention
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Heterojunction bipolar transistor with buried trap rich isolation region.
The present disclosure... |
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Invention
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Single fin structures.
The present disclosure generally relates to semiconductor structures and,... |
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Invention
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Stress layout optimization for device performance.
The present disclosure relates to semiconduct... |
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Invention
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Slotted shields for use with an electro-optical phase shifter.
Structures including an electro-o... |
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Invention
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Structure providing poly-resistor under shallow trench isolation and above high resistivity polys... |
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Invention
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Transistor with multi-level self-aligned gate and source/drain terminals and methods.
Disclosed ... |
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2022
|
Invention
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Forksheet semiconductor structure including at least one bipolar junction transistor and method. ... |
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Invention
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Bipolar transistor structures with base having varying horizontal width and methods to form same.... |
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Invention
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Bipolar transistor with self-aligned asymmetric spacer.
The present disclosure relates to semico... |
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Invention
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Level shifter with reduced static power consumption. Embodiments of the present disclosure provid... |
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Invention
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Bipolar transistor with thermal conductor.
The present disclosure relates to semiconductor struc... |
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Invention
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Lateral bipolar junction transistors including a graded silicon-germanium intrinsic base.
Struct... |
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Invention
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Bipolar transistor structure on semiconductor fin and methods to form same.
Embodiments of the d... |
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Invention
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Method and system for testing of memory.
Embodiments of the present disclosure provide a level-s... |
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Invention
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High voltage mosfet device with improved breakdown voltage.
According to various embodiments, th... |
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Invention
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Optical ring resonator-based microfluidic sensor.
Disclosed is a structure (e.g., a lab-on-chip ... |
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Invention
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Deep nwell contact structures.
Integrated structures include (among other components) a deep wel... |
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Invention
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Metamaterial layers for use with optical components.
Structures including an optical component, ... |
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Invention
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Photonics structures having a locally-thickened dielectric layer.
Photonics structures including... |
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Invention
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Vertical bipolar junction transistor and method.
Disclosed are a structure including a transisto... |
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Invention
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Thermally-conductive features positioned adjacent to an optical component.
Structures including ... |
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Invention
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System and method employing power-optimized timing closure.
Disclosed are embodiments of a compu... |
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Invention
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Physical unclonable functions based on a circuit including resistive memory elements.
Circuits t... |
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Invention
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Optical components with enhanced heat dissipation.
Structures including an optical component and... |
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Invention
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Thermal management of an optical component for temperature control.
Structures including an opti... |
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Invention
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Cell layouts.
The present disclosure relates to semiconductor structures and, more particularly,... |
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Invention
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Spot-size converters with angled facets. Structures including an edge coupler, and methods of fab... |
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Invention
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Optical waveguide with stacked cladding material layers.
Disclosed is an optical waveguide inclu... |
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Invention
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Isolation regions for charge collection and removal.
Structures with an isolation region and fab... |
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Invention
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Threshold voltage-programmable field effect transistor-based memory cells and look-up table imple... |
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Invention
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Transistors with multiple silicide layers.
Structures for a transistor and methods of forming a ... |
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Invention
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Bias voltage generation circuit for memory devices.
The present disclosure relates to memory dev... |
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Invention
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Multiple-core heterogeneous waveguide structures including multiple slots.
Waveguide structures ... |
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Invention
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Edge couplers integrated with dual ring resonators.
Structures including an edge coupler and met... |
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Invention
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Bipolar transistor.
The present disclosure relates to semiconductor structures and, more particu... |
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Invention
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Fin on silicon on insulator and integration schemes.
A structure is provided, the structure may ... |
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Invention
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Photonic devices integrated with thermally conductive layers.
The disclosed subject matter relat... |
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Invention
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Trench isolation having three portions with different materials, and ldmos fet including same.
A... |
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Invention
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Vertical bipolar transistors.
The present disclosure relates to semiconductor structures and, mo... |
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Invention
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Bipolar transistor structure with emitter/collector contact to doped semiconductor well and relat... |
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Invention
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Photonics chips including cavities with non-right-angle internal corners.
Structures for a cavit... |
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Invention
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Bipolar transistor structure with collector on polycrystalline isolation layer and methods to for... |
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Invention
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Middle of the line heater and methods.
A semiconductor structure includes a semiconductor device... |
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Invention
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Integration of compound-semiconductor-based devices and silicon-based devices.
Structures includ... |
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Invention
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Extended drain field effect transistor with trench gate(s) and method.
Disclosed are a semicondu... |
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Invention
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Transistor structure with gate over well boundary and related methods to form same.
A transistor... |
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Invention
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Device with vertical nanowire channel region.
The present disclosure relates to semiconductor st... |
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Invention
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Ic structure including porous semiconductor layer in bulk substrate adjacent trench isolation.
A... |
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2021
|
Invention
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Sram bit cells.
The present disclosure relates to semiconductor structures and, more particularl... |
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Invention
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Silicon germanium fins and integration methods.
A structure is provided, the structure comprisin... |
