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2021
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Invention
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3d-interconnect with electromagnetic interference ("emi") shield and/or antenna.
A method of man... |
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Invention
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Region shielding within a package of a microelectronic device. A microelectronic device may inclu... |
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Invention
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Region shielding within a package of a microelectronic device.
A microelectronic device may incl... |
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Invention
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Techniques for manufacturing split-cell 3d-nand memory devices. Techniques for manufacturing memo... |
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Invention
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Active bridging apparatus. Techniques and mechanisms for coupling chiplets to microchips utilizin... |
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2020
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Invention
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Connecting multiple chips using an interconnect device. Techniques are disclosed herein for conne... |
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Invention
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Network on layer enabled architectures. The technology relates to a system on chip (SoC). The SoC... |
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Invention
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Symbiotic network on layers. The technology relates to a system on chip (SoC). The SoC may includ... |
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Invention
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Nanowire bonding interconnect for fine-pitch microelectronics. A nanowire bonding interconnect fo... |
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2019
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Invention
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Contact structures with porous networks for solder connections, and methods of fabricating same. ... |
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Invention
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Capacitive coupling in a direct-bonded interface for microelectronic devices. Capacitive coupling... |
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Invention
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Interconnections for a substrate associated with a backside reveal. An apparatus relating general... |
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Invention
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High yield substrate assembly. High yield substrate assembly. In accordance with a first method e... |
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Invention
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Ultra high performance interposer. An interconnection component includes a semiconductor material... |
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Invention
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Systems and methods for flash stacking. A three-dimensional stacking technique performed in a waf... |
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Invention
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Multi-die module with low power operation. A module for multiple dies is disclosed. The module ca... |
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Invention
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Bonding of laminates with electrical interconnects. A microelectronic assembly including first an... |
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Invention
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Integrated interposer solutions for 2d and 3d ic packaging. An integrated circuit (IC) package in... |
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Invention
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Making electrical components in handle wafers of integrated circuit packages. Each of a first and... |
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Invention
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Multiple plated via arrays of different wire heights on same substrate. Apparatus(es) and method(... |
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Invention
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Microelectronic components with features wrapping around protrusions of conductive vias protrudin... |
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2018
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Invention
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Vertical capacitors for microelectronics. Vertical capacitors for microelectronics are provided. ... |
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Invention
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Hd color imaging using monochromatic cmos image sensors integrated in 3d package. HD color video ... |
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Invention
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Substrate-less stackable package with wire-bond interconnect. A method for making a microelectron... |
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Invention
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Microelectronic package for wafer-level chip scale packaging with fan-out.
Apparatuses and metho... |
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Invention
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Hybrid 3d/2.5d interposer. Representative implementations of devices and techniques provide a hyb... |
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Invention
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Laminated interposers and packages with embedded trace interconnects. Laminated interposers and p... |
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Invention
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Method and apparatus for stacking devices in an integrated circuit assembly. Methods and apparatu... |
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Invention
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Method and structures for heat dissipating interposers. An interconnect element includes a semico... |
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Invention
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Microelectronic package including microelectronic elements having stub minimization for wirebond ... |
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Invention
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Interconnect structures and methods for forming same. A method for forming an interconnect struct... |
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Invention
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Methods of forming flipped rf filter components. Methods of forming flipped radio frequency (RF) ... |
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Invention
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Enhanced memory reliability in stacked memory devices. The invention pertains to semiconductor me... |
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Invention
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Tall and fine pitch interconnects. Representative implementations of devices and techniques provi... |
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Invention
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Low cte component with wire bond interconnects. A component such as an interposer or microelectro... |
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Invention
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Microelectronic package having stub minimization using symmetrically-positioned duplicate sets of... |
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Invention
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Multiple bond via arrays of different wire heights on a same substrate. Apparatuses relating gene... |
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Invention
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Cavities containing multi-wiring structures and devices. A method for making an interconnection c... |
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Invention
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Flat metal features for microelectronics applications. Advanced flat metals for microelectronics ... |
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Invention
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Formation of a light-emitting diode display. Apparatus and method relating generally to an LED di... |
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Invention
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Chip-size, double side connection package and method for manufacturing the same. A low resistance... |
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Invention
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Deformable electrical contacts with conformable target pads. Deformable electrical contacts with ... |
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Invention
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Preferred state encoding in non-volatile memories. The invention pertains to non-volatile memory ... |
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Invention
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Fan-out wafer level package with resist vias. Fan-out wafer level packages with resist vias are p... |
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Invention
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Direct-bonded led arrays and applications. Direct- bonded LED arrays and applications are provide... |
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Invention
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Stackable microelectronic package structures. A microelectronic assembly includes a first microel... |
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2017
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Invention
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High performance light emitting diode with vias.
High performance light emitting diode with vias... |
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2011
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G/S
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Intellectual property licensing of semiconductor and related technologies to the semiconductor an... |
