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2023
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Invention
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Pre-scaler for orthogonal differential vector signalling.
Orthogonal differential vector signall... |
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Invention
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Line driver impedance calibration for multi-wire data bus. Methods and systems are described for ... |
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Invention
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Vector signaling code with improved noise margin.
Methods are described allowing a vector signal... |
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Invention
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Method and apparatus for low power chip-to-chip communications with constrained isi ratio.
An ef... |
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Invention
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Dynamically weighted exclusive or gate having weighted output segments for phase detection and ph... |
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Invention
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Clock data recovery with decision feedback equalization.
Methods and systems are described for g... |
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Invention
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Error-tolerant forward error correction ordered set message decoder.
Methods are described for i... |
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Invention
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Variable gain amplifier biased with a fixed current to improve low-gain linearity. Obtaining a bi... |
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Invention
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Continuous time linear equalization and bandwidth adaptation using asynchronous sampling. Methods... |
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Invention
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Horizontal centering of sampling point using multiple vertical voltage measurements.
Methods and... |
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Invention
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Method for measuring and correcting multi-wire skew. Generating, during a first and second signal... |
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2022
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Invention
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Horizontal centering of sampling point using vertical vernier. Methods and systems are described ... |
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Invention
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High speed communications system. Transmission of baseband and carrier-modulated vector codewords... |
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Invention
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Low power chip-to-chip bidirectional communications.
Methods and systems are described for recei... |
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Invention
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Synchronously-switched multi-input demodulating comparator. Methods and systems are described for... |
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Invention
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Clock and data recovery lock detection circuit for verifying lock condition in presence of imbala... |
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Invention
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Reference generation circuit for maintaining temperature-tracked linearity in amplifier with adju... |
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Invention
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Pre-scaler for orthogonal differential vector signalling. Pre-scaled orthogonal differential vect... |
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Invention
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Line driver impedance calibration for multi-wire data bus.
Methods and systems are described for... |
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Invention
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Dynamic voltage scaling in hierarchical multitier regulator supply. Obtaining a periodic test sig... |
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Invention
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Continuous time linear equalization and bandwidth adaptation using peak detector. Methods and sys... |
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Invention
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Methods and systems for high bandwidth communications interface.
A pair of ground planes arrange... |
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Invention
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Interleaved forward error correction over multiple transport channels. Interleaved Forward Error ... |
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Invention
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Skew detection and correction for orthogonal differential vector signaling codes. Methods and sys... |
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Invention
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Error-tolerant forward error correction ordered set message decoder. Methods are described for id... |
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Invention
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Multiple adjacent slicewise layout of voltage-controlled oscillator. Methods and systems are desc... |
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Invention
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Pipelined forward error correction for vector signaling code channel. Decoding sequentially recei... |
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Invention
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Low latency combined clock data recovery logic network and charge pump circuit.
Methods and syst... |
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Invention
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Variable gain amplifier biased with a fixed current to improve low-gain linearity.
Obtaining a b... |
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Invention
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Variable gain amplifier with cross-coupled common mode reduction.
Methods and systems for receiv... |
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Invention
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Multilevel driver for high speed chip-to-chip communications. A plurality of driver slice circuit... |
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Invention
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Multi-modal data-driven clock recovery circuit. Multi-mode non-return-to-zero (NRZ) and orthogona... |
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Invention
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Variable gain amplifier and sampler offset calibration without clock recovery. Methods and system... |
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Invention
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High performance phase locked loop. Methods and systems are described for receiving N phases of a... |
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Invention
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Vector signaling code with improved noise margin. Methods are described allowing a vector signali... |
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2021
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Invention
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Horizontal centering of sampling point using multiple vertical voltage measurements. Methods and ... |
