Tessera LLC

United States of America

 
Total IP 245
Total IP Rank # 5,104
IP Activity Score 3/5.0    163
IP Activity Rank # 4,246

Patents

Trademarks

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Last Patent 2024 - Self aligned pattern formation p...
First Patent 2010 - Stackable molded microelectronic...

Latest Inventions, Goods, Services

2023 Invention Two-color self-aligned double patterning (sadp) to yield static random access memory (sram) and d...
Invention Self aligned pattern formation post spacer etchback in tight pitch configurations. A method of f...
Invention Selective ild deposition for fully aligned via with airgap. A method is presented forming a full...
Invention Minimizing shorting between finfet epitaxial regions. The present invention relates generally to...
Invention Nanosheet channel-to-source and drain isolation. A method and structures are used to fabricate a...
Invention Air gap spacer formation for nano-scale semiconductor devices. Semiconductor devices having air ...
Invention Finfet devices. FinFET devices and processes to prevent fin or gate collapse (e.g., flopover) in...
Invention Alternating hardmasks for tight-pitch line formation. A method for forming fins includes forming...
2022 Invention Gate cut with integrated etch stop layer. A method of forming a power rail to semiconductor devic...
Invention Air gap spacer for metal gates. A method of forming a semiconductor device that includes forming...
Invention Self-forming barrier for use in air gap formation. An etch back air gap (EBAG) process is provid...
Invention Semiconductor structures including middle-of-line (mol) capacitance reduction for self-aligned co...
Invention Semiconductor device with reduced via resistance. A semiconductor interconnect structure having ...
Invention Stable work function for narrow-pitch devices. A work function setting metal stack includes a co...
Invention Bulk nanosheet with dielectric isolation. Techniques for dielectric isolation in bulk nanosheet ...
Invention Package-on-package assembly with wire bonds to encapsulation surface. Apparatuses relating to a m...
Invention Two dimension material fin sidewall. A semiconductor structure includes fins that have a 2D mater...
Invention Punch through stopper in bulk finfet device. A method of forming a semiconductor device that inc...
Invention Forming self-aligned vias and air-gaps in semiconductor fabrication. A semiconductor device incl...
Invention Selective removal of semiconductor fins. An array of semiconductor fins is formed on a top surfa...
Invention Nanosheet field effect transistors with partial inside spacers. A method of forming a nanosheet ...
Invention Selective gas etching for self-aligned pattern transfer. Selective gas etching for self-aligned ...
Invention Hybrid-channel nano-sheet fets. Semiconductor devices and methods of forming a first layer cap at...
Invention Selective recessing to form a fully aligned via. A method of forming a semiconductor device havin...
2021 Invention Method of forming copper interconnect structure with manganese barrier layer. Low capacitance and...
Invention Advanced copper interconnects with hybrid microstructure. A device relates to a semiconductor dev...
Invention Finfet devices. FinFET devices and processes to prevent fin or gate collapse (e.g., flopover) in ...
Invention Forming nanosheet transistor using sacrificial spacer and inner spacers. Fabricating a nanosheet ...
Invention Nanosheet channel-to-source and drain isolation. A method and structures are used to fabricate a ...
Invention Alternating hardmasks for tight-pitch line formation. A method for forming fins includes forming ...
Invention Semiconductor device including a porous dielectric layer, and method of forming the semiconductor...
Invention Self aligned pattern formation post spacer etchback in tight pitch configurations. A method of fo...
Invention Field effect transistor structures. Field effect transistors include a stack of nanowires of ver...
Invention Fabrication of a vertical fin field effect transistor with reduced dimensional variations. A meth...
Invention Selective ild deposition for fully aligned via with airgap. A method is presented forming a fully...
Invention Structure and method to improve fav rie process margin and electromigration. A method of forming ...
Invention Semiconductor device with reduced via resistance. A semiconductor interconnect structure having a...
Invention Forming self-aligned vias and air-gaps in semiconductor fabrication. A semiconductor device inclu...
Invention Selective gas etching for self-aligned pattern transfer. Selective gas etching for self-aligned p...
Invention Minimizing shorting between finfet epitaxial regions. The present invention relates generally to ...
2020 Invention Method and structure for forming dielectric isolated finfet with improved source/drain epitaxy. D...
Invention Method of fabricating semiconductor fins by differentially oxidizing mandrel sidewalls. A method ...
Invention Self aligned replacement metal source/drain finfet. A fin-shaped field effect transistor (finFET...
Invention Semiconductor interconnect structure with double conductors. Embodiments are directed to a semic...
Invention Self-forming barrier for use in air gap formation. An etch back air gap (EBAG) process is provide...