WRITE COMBINE BUFFER (WCB) FOR DEEP NEURAL NETWORK (DNN) ACCELERATOR
| Registre | Brevet USPTO |
|---|---|
| Numéro d'application | 17946311 |
| Statut | En instance |
| Date de dépôt | 2022-09-16 |
| Date de la première publication | 2023-01-19 |
| Date de publication | 2023-01-19 |
| Propriétaire | INTEL CORPORATION (USA) |
| Inventeur(s) |
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Abrégé
A compute tile includes a WCB that receives a workload of writing an output tensor of a convolution into a local memory of the compute tile. The local memory may be a SRAM. The WCB receives write transactions. A write transaction includes a data block, which is a part of the output tensor, and metadata describing one or more attributes of the data block. The WCB may store write transactions in its internal buffers. The WCB may determine whether to combine two write transactions, e.g., based on an operation mode or metadata in the write transactions. In embodiments where the WCB determines to combine the two write transactions, the WCB may combine the two write transactions into a new write transaction and write the new write transaction into the local memory or an internal memory of the WCB. The total number of write transactions for the workload can be reduced.