SYSTEM, METHOD AND APPARATUS FOR REDUCING LATENCY OF RECEIVER OPERATIONS DURING A CONTAINMENT MODE OF OPERATION

Registre Brevet USPTO
Numéro d'application 17954419
Statut En instance
Date de dépôt 2022-09-28
Date de la première publication 2023-01-19
Date de publication 2023-01-19
Propriétaire INTEL CORPORATION (USA)
Inventeur(s)
  • Paliwal, Nitish
  • Nasit, Binal
  • Purohit, Peeyush
  • Yap, Kirk S.
  • Makaram, Raghunandan
  • Blankenship, Robert G.

Abrégé

In one embodiment, an apparatus includes: a control circuit to receive a message authentication code (MAC) for an epoch comprising a plurality of flits; a calculation circuit to calculate a computed MAC for the epoch; a cryptographic circuit to receive the epoch via a link and decrypt the plurality of flits, prior to authentication of the epoch; and at least one memory to store messages of the decrypted plurality of flits, prior to the authentication of the epoch. Other embodiments are described and claimed.

Classes IPC  ?

  • G06F 21/60 - Protecting data
  • G06F 21/62 - Protecting access to data via a platform, e.g. using keys or access control rules
  • G06F 21/85 - Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices