INTER-CHIPLET ROUTING OF TRANSACTIONS ACROSS MULTI-HETEROGENEOUS CHIPLETS USING HIERARCHICAL ADDRESSING
Registre | Brevet USPTO |
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Numéro d'application | 17954430 |
Statut | En instance |
Date de dépôt | 2022-09-28 |
Date de la première publication | 2023-01-26 |
Date de publication | 2023-01-26 |
Propriétaire | Intel Corporation (USA) |
Inventeur(s) |
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Abrégé
In one embodiment, a first chiplet includes: a plurality of agents to generate messages, each of the messages having a destination port identifier comprising a first portion to identify a destination chiplet and a second portion to identify a destination agent on the destination chiplet; a die-to die bridge to couple the first chiplet to a second chiplet; a fabric coupled to the die-to-die bridge to route communications between the plurality of agents, where a first agent is to generate a first message having a first destination port identifier; and a first fabric adapter coupled to the first agent, the first fabric adapter to direct the first message to the die-to-die bridge when the first portion of the first destination port identifier identifies a second chiplet as the destination chiplet. Other embodiments are described and claimed.Classes IPC ?
- H04L 45/745 - Address table lookup; Address filtering
- H04L 49/109 - Integrated on microchip, e.g. switch-on-chip
- H04L 45/16 - Multipoint routing