Registre Brevet USPTO
Numéro d'application 17956761
Statut En instance
Date de dépôt 2022-09-29
Date de la première publication 2023-01-19
Date de publication 2023-01-19
Propriétaire Intel Corporation (USA)
  • Braunisch, Henning M.
  • Chiu, Chia-Pin
  • Aleksov, Aleksander
  • Au, Hinmeng
  • Lotz, Stefanie M.
  • Swan, Johanna M.
  • Sharan, Sujit


A multi-chip package includes a substrate (110) having a first side (111), an opposing second side (112), and a third side (213) that extends from the first side to the second side, a first die (120) attached to the first side of the substrate and a second die (130) attached to the first side of the substrate, and a bridge (140) adjacent to the third side of the substrate and attached to the first die and to the second die. No portion of the substrate is underneath the bridge. The bridge creates a connection between the first die and the second die. Alternatively, the bridge may be disposed in a cavity (615, 915) in the substrate or between the substrate and a die layer (750). The bridge may constitute an active die and may be attached to the substrate using wirebonds (241, 841, 1141, 1541).

Classes IPC  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group