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        Brevet 8 737
        Marque 2
Juridiction
        International 4 654
        États-Unis 4 076
        Canada 9
Date
Nouveautés (dernières 4 semaines) 135
2024 avril (MACJ) 45
2024 mars 124
2024 février 140
2024 janvier 150
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Classe IPC
H01L 27/146 - Structures de capteurs d'images 3 025
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS]  circuits associés à cette dernière 1 167
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs 705
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N 627
H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS 590
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Classe NICE
09 - Appareils et instruments scientifiques et électriques 2
10 - Appareils et instruments médicaux 2
42 - Services scientifiques, technologiques et industriels, recherche et conception 2
Statut
En Instance 1 651
Enregistré / En vigueur 7 088
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1.

DISPLAY DEVICE AND ELECTRONIC DEVICE

      
Numéro d'application 18260370
Statut En instance
Date de dépôt 2022-02-10
Date de la première publication 2024-04-11
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s)
  • Sudo, Shoji
  • Sawabe, Tomoaki

Abrégé

Display devices that suppress complications due to uneven shape of a surface on which a semi-transmissive reflective layer is formed are disclosed. In one example, a display device includes first sub-pixels, second sub-pixels, and third sub-pixels. The first sub-pixel includes a first light emitting element that emits first light and third light, the second sub-pixel includes a second light emitting element that emits second light, and the third sub-pixel includes a third light emitting element that emits first light and third light. The light emitting elements respectively include a first electrode, an organic layer including a light emitting layer, a second electrode, and a semi-transmissive reflective layer, and a resonator structure is configured by the first electrode and the semi-transmissive reflective layer. The heights of the semi-transmissive reflective layers in the first light emitting element and the third light emitting element are the same.

Classes IPC  ?

  • H10K 59/80 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comprenant au moins un élément organique émetteur de lumière couvert par le groupe - Détails de structure
  • H10K 59/38 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des filtres de couleur ou des supports changeant de couleur [CCM]

2.

IMAGING APPARATUS AND IMAGING METHOD

      
Numéro d'application 18263774
Statut En instance
Date de dépôt 2022-01-25
Date de la première publication 2024-04-11
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s) Mahara, Kumiko

Abrégé

An imaging apparatus according to an embodiment includes a pixel array unit (101) including a plurality of pixels arranged in a matrix array, each of the pixels generating a pixel signal corresponding to light received by exposure, the pixel array unit acquiring image data based on each of the pixel signals respectively generated by the plurality of pixels, a compression unit (1020) configured to compress a data amount of the image data to generate compressed image data, a signature generation unit (1021) configured to generate signature data based on the compressed image data; and an output unit (104,131,132) configured to output the image data and authenticity proof data obtained by adding the signature data to the compressed image data.

Classes IPC  ?

  • H04N 19/467 - Inclusion d’information supplémentaire dans le signal vidéo pendant le processus de compression caractérisée par le caractère invisible de l’information incluse, p.ex. un filigrane
  • G06F 21/64 - Protection de l’intégrité des données, p.ex. par sommes de contrôle, certificats ou signatures
  • H04N 25/11 - Agencement de matrices de filtres colorés [CFA]; Mosaïques de filtres
  • H04N 25/79 - Agencements de circuits répartis entre des substrats, des puces ou des cartes de circuits différents ou multiples, p. ex. des capteurs d'images empilés

3.

DISPLAY DEVICE

      
Numéro d'application 18251546
Statut En instance
Date de dépôt 2021-10-29
Date de la première publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Yagi, Keiichi
  • Miura, Kiwamu
  • Hamachi, Chugen

Abrégé

A display device includes a first substrate (41), a second substrate (42), a plurality of light emitting elements (10) provided in a display region, and a sealing part (50) that is provided in a peripheral region surrounding the display region and seals between the first substrate (41) and the second substrate (42), wherein the sealing part (50) includes main sealing parts (51) and a sub sealing part (52) positioned between the main sealing parts, an alignment mark (55) is provided between the sub sealing part (52) and the first substrate (41), each of the main sealing part (51) has a stacked structure of a light shielding member layer (56, 57) and a sealing member layer (53) from the first substrate side, and the sub sealing part (52) has a stacked structure (53) of a base material layer (54) formed of a non-light shielding member and the sealing member layer from the first substrate side.

Classes IPC  ?

  • H10K 59/38 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des filtres de couleur ou des supports changeant de couleur [CCM]
  • H10K 59/126 - Blindage, p. ex. moyens de blocage de la lumière sur les TFT
  • H10K 59/127 - Affichages à OLED à matrice active [AMOLED] comprenant deux substrats, p. ex. un affichage comprenant une matrice OLED et un circuit de commande de TFT sur des substrats différents
  • H10K 59/80 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comprenant au moins un élément organique émetteur de lumière couvert par le groupe - Détails de structure

4.

SOLID-STATE IMAGING DEVICE AND IMAGING APPARATUS

      
Numéro d'application 18263729
Statut En instance
Date de dépôt 2022-01-28
Date de la première publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Hanzawa, Katsuhiko
  • Miyake, Shinichi
  • Tomida, Kazuyuki

Abrégé

A solid-state imaging device (200) includes a photoelectric conversion device (211), a current-voltage conversion circuit (310), and an output circuit. The photoelectric conversion device (211) performs photoelectric conversion of incident light. The current-voltage conversion circuit (310) includes a first transistor (311) that converts an amount of electric charge generated by photoelectric conversion into a voltage signal. The output circuit includes a second transistor having an S value smaller than an S value of the first transistor (311) and generates an output signal based on the voltage signal.

Classes IPC  ?

  • H01L 27/146 - Structures de capteurs d'images
  • H04N 25/779 - Circuits de balayage ou d'adressage de la matrice de pixels

5.

SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS

      
Numéro d'application 18544833
Statut En instance
Date de dépôt 2023-12-19
Date de la première publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Yamashita, Hirofumi
  • Shimada, Shohei
  • Otake, Yusuke
  • Tanaka, Yusuke
  • Wakano, Toshifumi

Abrégé

To provide a solid-state imaging device and an electronic apparatus capable of achieving both of a high dynamic range operation and an auto focus operation in a pixel configuration in which a plurality of unit pixels includes two or more subpixels. There is provided a solid-state imaging device including: a first pixel separation region that separates a plurality of unit pixels including two or more subpixels; a second pixel separation region that separates each of the plurality of unit pixels separated by the first pixel separation region; and an overflow region that causes signal charges accumulated in the subpixels to overflow to at least one of adjacent subpixels, in which the overflow region is formed between a first subpixel and a second subpixel.

Classes IPC  ?

  • H04N 25/704 - Pixels spécialement adaptés à la mise au point, p. ex. des ensembles de pixels à différence de phase
  • H01L 27/146 - Structures de capteurs d'images
  • H04N 25/711 - Registres à report et intégration [TDI]; Registres à décalage TDI
  • H04N 25/772 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F

6.

PHOTODETECTION DEVICE AND ELECTRONIC APPARATUS

      
Numéro d'application 18546252
Statut En instance
Date de dépôt 2022-02-21
Date de la première publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Moriya, Yusuke
  • Yamamoto, Atsushi
  • Yukawa, Tomiyuki
  • Nishimura, Kotaro
  • Ikehara, Shigehiro
  • Otani, Shogo
  • Kato, Hiroshi

Abrégé

The present disclosure relates to a photodetection device and an electronic apparatus that allow for reducing surface reflection from an on-chip microlens and suppressing deterioration of image quality. Provided is a photodetection device including: a plurality of pixels that have photoelectric conversion units; on-chip microlenses that are formed in such a way as to correspond to the individual pixels; and an antireflection film that is formed on a surface of the on-chip microlens, in which the antireflection film is constituted by a stacking of: a first inorganic film that is formed by a metal oxide film; and a second inorganic film that is formed on a surface of the first inorganic film and has a lower refractive index than the first inorganic film. The present disclosure can be applied to, for example, a CMOS solid-state imaging device.

Classes IPC  ?

7.

LIQUID CRYSTAL DISPLAY ELEMENT, DISPLAY DEVICE, ELECTRONIC DEVICE, DRIVE SUBSTRATE, AND METHOD FOR MANUFACTURING DRIVE SUBSTRATE

      
Numéro d'application 18251581
Statut En instance
Date de dépôt 2021-11-02
Date de la première publication 2024-04-11
Propriétaire
  • SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
  • SONY GROUP CORPORATION (Japon)
Inventeur(s)
  • Sakairi, Takashi
  • Honda, Tomoaki

Abrégé

Provided is a liquid crystal display element capable of reducing the decrease in light utilization efficiency caused by the increase in definition. Provided is a liquid crystal display element capable of reducing the decrease in light utilization efficiency caused by the increase in definition. A liquid crystal display element includes: a drive substrate having pixel electrodes having light-reflective properties and arranged in a matrix; a counter substrate arranged opposite to the drive substrate; and a liquid crystal material layer sandwiched between the drive substrate and the counter substrate, in which the pixel electrodes are arranged on a display surface side of the drive substrate in a state of being separated from each other with a slit portion interposed therebetween, an entire surface including surfaces on the pixel electrodes is covered with a first dielectric film formed on the pixel electrodes and a second dielectric film formed in the slit portion, and the second dielectric film has a hollow portion extending along the slit portion.

Classes IPC  ?

  • G02F 1/1335 - Association structurelle de cellules avec des dispositifs optiques, p.ex. des polariseurs ou des réflecteurs

8.

PHOTODETECTION DEVICE

      
Numéro d'application JP2023029830
Numéro de publication 2024/075409
Statut Délivré - en vigueur
Date de dépôt 2023-08-18
Date de publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Ishii Hiroyasu
  • Moriyama Yusuke
  • Baba Tomohiro
  • Kaji Nobuaki
  • Wakayama Kazuyuki
  • Izuhara Kunihiko

Abrégé

A device capable of improving characteristics of a light sensor by applying an appropriate bias voltage to the light sensor. A device according to one embodiment includes a first light source configured to emit a first light, a second light source configured to emit a second light having a first characteristic different from a second characteristic of the first light, a first light sensor configured to detect first reflected light that is the first light emitted from the first light source and reflected by an object, and a second light sensor configured to detect second reflected light that is the second light emitted from the second light source and reflected by a first member that is distinct from the object.

Classes IPC  ?

  • G01S 7/4863 - Réseaux des détecteurs, p.ex. portes de transfert de charge
  • G01S 7/497 - Moyens de contrôle ou de calibrage
  • G01S 17/894 - Imagerie 3D avec mesure simultanée du temps de vol sur une matrice 2D de pixels récepteurs, p.ex. caméras à temps de vol ou lidar flash
  • G01S 7/481 - Caractéristiques de structure, p.ex. agencements d'éléments optiques

9.

COUNTING MODE DECISION CIRCUITRY AND COUNTING MODE DECISION METHOD

      
Numéro d'application EP2023076215
Numéro de publication 2024/074322
Statut Délivré - en vigueur
Date de dépôt 2023-09-22
Date de publication 2024-04-11
Propriétaire
  • SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
  • SONY DEPTHSENSING SOLUTIONS SA/NV (Belgique)
Inventeur(s) Ding, Qing

Abrégé

The present disclosure generally pertains to counting mode decision circuitry configured to: determine, for at least one imaging element, a photon number in a first photon counting mode of at least two photon counting modes which, in a standard operation mode, are applied after each other; and skip a second photon counting mode of the at least two photon counting modes, if the photon number in the first photon counting mode exceeds a predetermined threshold, thereby deviating from the standard operation mode.

Classes IPC  ?

  • H04N 25/589 - Commande de la gamme dynamique impliquant plusieurs expositions acquises de manière séquentielle, p. ex. en utilisant la combinaison de champs d'image pairs et impairs avec des temps d'intégration différents, p. ex. des expositions courtes et longues
  • H04N 25/773 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F comprenant des circuits de comptage de photons, p. ex. des diodes de détection de photons uniques [SPD] ou des diodes à avalanche de photons uniques [SPAD]

10.

LIGHT DETECTION DEVICE AND ELECTRONIC EQUIPMENT

      
Numéro d'application JP2022037482
Numéro de publication 2024/075253
Statut Délivré - en vigueur
Date de dépôt 2022-10-06
Date de publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Yamashita, Kazuyoshi

Abrégé

A light detection device according to an embodiment of the present disclosure comprises: a first photoelectric conversion portion (12) that performs photoelectric conversion of light; a first light guide portion (30) that includes a first structure (31) of a size less than or equal to the wavelength of input light, and that the light that has passed through the first photoelectric conversion unit (12) enters; and a second photoelectric conversion portion (22) that performs photoelectric conversion of infrared light that enters the second photoelectric conversion portion (22) via the first light guide portion (30).

Classes IPC  ?

  • H01L 31/10 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails dans lesquels le rayonnement commande le flux de courant à travers le dispositif, p.ex. photo-résistances caractérisés par au moins une barrière de potentiel ou une barrière de surface, p.ex. photo-transistors

11.

SOLID-STATE IMAGING DEVICE

      
Numéro d'application JP2023029670
Numéro de publication 2024/075405
Statut Délivré - en vigueur
Date de dépôt 2023-08-17
Date de publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Tanaka, Daichi
  • Tomita, Chihiro

Abrégé

This solid-state imaging device comprises: a first pixel that is arranged on a first surface side serving as a light incident side of a substrate, and that has a first photoelectric conversion element for converting light to a charge; a first transistor that is arranged, at a position corresponding to the first pixel, on a second surface side opposite the first surface of the substrate, that has a first gate electrode, and that has a pair of main electrodes, one of which is electrically connected to the first photoelectric conversion element; a floating diffusion that is arranged on the second surface side of the substrate and that is electrically connected to the other main electrode of the first transistor; and a low dielectric constant region that is arranged between the floating diffusion and the first gate electrode opposite the same, and that has a lower dielectric constant than that of a non-opposing region.

Classes IPC  ?

12.

SOLID-STATE IMAGING DEVICE, AND COMPARISON DEVICE

      
Numéro d'application JP2023033578
Numéro de publication 2024/075492
Statut Délivré - en vigueur
Date de dépôt 2023-09-14
Date de publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Azuhata Satoshi

Abrégé

[Problem] To perform fast and high-performance signal comparison. [Solution] This solid-state imaging device comprises a comparison circuit, a first switch, a second switch, a third switch, a first capacitor, and a second capacitor. The comparison circuit is provided with a non-inverting input terminal and an inverting input terminal. The first switch is connected to the inverting input terminal. The second switch is connected to the inverting input terminal and is controlled at a different timing than the first switch. The third switch is connected between an output terminal of the comparison circuit and the inverting input terminal. One end of the first capacitor is connected to the inverting input terminal via the first switch, and a reference signal is applied to the other end of the first capacitor. One end of the second capacitor is connected to the inverting input terminal via the second switch, and the reference signal is applied to the other end of the second capacitor.

Classes IPC  ?

  • H04N 25/77 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
  • H04N 25/772 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F

13.

CAMERA MODULE AND IMAGING DEVICE

      
Numéro d'application JP2023029326
Numéro de publication 2024/075398
Statut Délivré - en vigueur
Date de dépôt 2023-08-10
Date de publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Imayoshi, Kohei
  • Kunimitsu, Takayuki
  • Yukishige, Akihiro
  • Kasahara, Keijyu
  • Tsuruta, Takahiro

Abrégé

The present invention reduces the device size of an imaging device that performs rotation correction. This camera module comprises a lens group, a translational actuator, a rotational actuator, and a mounting board. In this camera module, the translational actuator moves the lens group in parallel. The rotational actuator rotates the lens group. A part of a rigid flexible board deforms so as to follow the rotation of the lens group. Furthermore, the translational actuator is provided on one of both surfaces of the mounting board and the rigid flexible board is provided on the other one thereof.

Classes IPC  ?

  • G03B 5/00 - Réglage du système optique relatif à l'image ou à la surface du sujet, autre que pour la mise au point présentant un intérêt général pour les appareils photographiques, les appareils de projection ou les tireuses
  • G02B 7/02 - Montures, moyens de réglage ou raccords étanches à la lumière pour éléments optiques pour lentilles
  • G02B 7/04 - Montures, moyens de réglage ou raccords étanches à la lumière pour éléments optiques pour lentilles avec mécanisme de mise au point ou pour faire varier le grossissement
  • G03B 30/00 - Modules photographiques comprenant des objectifs et des unités d'imagerie intégrés, spécialement adaptés pour être intégrés dans d'autres dispositifs, p.ex. des téléphones mobiles ou des véhicules
  • H04N 23/50 - Caméras ou modules de caméras comprenant des capteurs d'images électroniques; Leur commande - Détails de structure
  • H04N 23/57 - Caméras ou modules de caméras comprenant des capteurs d'images électroniques; Leur commande - Détails mécaniques ou électriques de caméras ou de modules de caméras spécialement adaptés pour être intégrés dans d'autres dispositifs
  • H05K 1/02 - Circuits imprimés - Détails

14.

LIGHT EMITTING DEVICE AND DISPLAY DEVICE

      
Numéro d'application 18264374
Statut En instance
Date de dépôt 2022-02-16
Date de la première publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Nishinaka, Ippei
  • Naito, Hiroki
  • Tomoda, Katsuhiro

Abrégé

For example, deterioration in image quality due to end-surface vignetting is suppressed. A light emitting device includes at least two light emitting elements provided on a substrate, and a transparent resin part provided so as to cover the light emitting elements, in which in a sectional view, when the size of the width of the light emitting element positioned at an end part is a (μm), a surface distance between the light emitting element and a surface of the transparent resin part is x (μm), an end surface distance between the light emitting element and an end surface of the transparent resin part closest to the light emitting element is y (μm), and the refractive index of the transparent resin part is λm, an expression (1) below or expressions (2) and (3) below are satisfied. For example, deterioration in image quality due to end-surface vignetting is suppressed. A light emitting device includes at least two light emitting elements provided on a substrate, and a transparent resin part provided so as to cover the light emitting elements, in which in a sectional view, when the size of the width of the light emitting element positioned at an end part is a (μm), a surface distance between the light emitting element and a surface of the transparent resin part is x (μm), an end surface distance between the light emitting element and an end surface of the transparent resin part closest to the light emitting element is y (μm), and the refractive index of the transparent resin part is λm, an expression (1) below or expressions (2) and (3) below are satisfied. y<(1.44λm−0.76)×x+(0.08λm−0.04)×a−0.02λm−0.47  (Expression 1) For example, deterioration in image quality due to end-surface vignetting is suppressed. A light emitting device includes at least two light emitting elements provided on a substrate, and a transparent resin part provided so as to cover the light emitting elements, in which in a sectional view, when the size of the width of the light emitting element positioned at an end part is a (μm), a surface distance between the light emitting element and a surface of the transparent resin part is x (μm), an end surface distance between the light emitting element and an end surface of the transparent resin part closest to the light emitting element is y (μm), and the refractive index of the transparent resin part is λm, an expression (1) below or expressions (2) and (3) below are satisfied. y<(1.44λm−0.76)×x+(0.08λm−0.04)×a−0.02λm−0.47  (Expression 1) y<(1.44λm−0.76)×x+(0.08λm−0.04)×a−0.02λm−0.47  (Expression 2) For example, deterioration in image quality due to end-surface vignetting is suppressed. A light emitting device includes at least two light emitting elements provided on a substrate, and a transparent resin part provided so as to cover the light emitting elements, in which in a sectional view, when the size of the width of the light emitting element positioned at an end part is a (μm), a surface distance between the light emitting element and a surface of the transparent resin part is x (μm), an end surface distance between the light emitting element and an end surface of the transparent resin part closest to the light emitting element is y (μm), and the refractive index of the transparent resin part is λm, an expression (1) below or expressions (2) and (3) below are satisfied. y<(1.44λm−0.76)×x+(0.08λm−0.04)×a−0.02λm−0.47  (Expression 1) y<(1.44λm−0.76)×x+(0.08λm−0.04)×a−0.02λm−0.47  (Expression 2) y<(1.44λm−0.76)×x+(0.15λm−0.08)×a−0.06λm−0.61  (Expression 3)

Classes IPC  ?

  • H01L 33/56 - Matériaux, p.ex. résine époxy ou silicone
  • H01L 27/15 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants semi-conducteurs avec au moins une barrière de potentiel ou une barrière de surface, spécialement adaptés pour l'émission de lumière
  • H01L 33/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails

15.

IMAGE CAPTURING APPARATUS AND ELECTRONIC DEVICE

      
Numéro d'application 18554342
Statut En instance
Date de dépôt 2022-03-29
Date de la première publication 2024-04-11
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s)
  • Naganokawa, Haruhisa
  • Umeda, Kengo

Abrégé

Image capturing that suppresses a drop in numerical aperture and achieves a smaller size is disclosed. In one example, an image capturing apparatus includes pixels each having a photoelectric conversion unit, a floating diffusion that outputs a voltage according to a charge obtained from photoelectric conversion by the photoelectric conversion unit, and a current amplification unit that amplifies a current according to the voltage of the floating diffusion. The region in which the photoelectric conversion units are disposed and the region in which the current amplification units are disposed transmit and receive the voltages of the floating diffusions through a corresponding signal transmission unit.

Classes IPC  ?

  • H04N 25/75 - Circuits pour fournir, modifier ou traiter des signaux d'image provenant de la matrice de pixels
  • H04N 25/772 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
  • H04N 25/778 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des amplificateurs partagés entre une pluralité de pixels, c. à d. qu'au moins une partie de l'amplificateur doit se trouver sur la matrice de capteurs elle-même

16.

IMAGING DEVICE AND ELECTRONIC APPARATUS

      
Numéro d'application 18554893
Statut En instance
Date de dépôt 2022-03-29
Date de la première publication 2024-04-11
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s) Kurihara, Shinichiro

Abrégé

[Problem] To provide an imaging device capable of suppressing color mixing and an electronic apparatus using the imaging device. [Problem] To provide an imaging device capable of suppressing color mixing and an electronic apparatus using the imaging device. [Solution] An imaging device of the present disclosure includes a photoelectric conversion layer disposed on a semiconductor substrate, a transparent electrode layer disposed on the photoelectric conversion layer, a first light-shielding portion that separates the photoelectric conversion layer into a plurality of pixels arranged in a first direction and a second direction that intersects the first direction, and is disposed along a boundary between the separated pixels, and a second light-shielding portion disposed along the boundary between the separated pixels inside the transparent electrode layer and disposed so that a portion of the boundary between adjacent pixels is interrupted.

Classes IPC  ?

17.

IMAGING APPARATUS, ELECTRONIC DEVICE, AND SIGNAL PROCESSING METHOD

      
Numéro d'application 18554043
Statut En instance
Date de dépôt 2022-02-22
Date de la première publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Saito, Daisuke

Abrégé

To provide an imaging apparatus which enables sophisticated calculations to be realized at lower power. An imaging apparatus according to an embodiment of the present disclosure includes: a first substrate group in which is arranged a light source cell array portion configured to generate a light signal; and a second substrate group in which is arranged a pixel array portion configured to photoelectrically convert the light signal and output a pixel signal representing a result of a sum-of-product computation. The first substrate group and the second substrate group are stacked so that at least a part of the light source cell array portion overlaps with the pixel array portion.

Classes IPC  ?

  • H04N 25/77 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
  • H04N 25/10 - Circuits de capteurs d'images à l'état solide [capteurs SSIS]; Leur commande pour transformer les différentes longueurs d'onde en signaux d'image

18.

LIGHT RECEIVING DEVICE, ELECTRONIC APPARATUS, AND LIGHT RECEIVING METHOD

      
Numéro d'application 17767694
Statut En instance
Date de dépôt 2020-10-05
Date de la première publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Suzuki, Nobuharu

Abrégé

An increase in a load current in a processing circuit is reduced. A light receiving device includes an imaging unit that photoelectrically converts light received in a plurality of pixels to acquire an analog image signal, a conversion unit that converts the analog image signal acquired by the imaging unit into digital image data, and a data processing unit that executes data processing on the digital image data and reduces a load of the data processing in a period in which the conversion unit executes conversion as compared to a period in which the conversion unit does not execute conversion.

Classes IPC  ?

  • H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N

19.

SOLID-STATE IMAGING DEVICE

      
Numéro d'application JP2023034200
Numéro de publication 2024/075526
Statut Délivré - en vigueur
Date de dépôt 2023-09-21
Date de publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Shirai Yuki
  • Nakamura Ryosuke
  • Yamachi Ryosuke
  • Saka Naoki

Abrégé

The present disclosure relates to a solid-state imaging device which can have improved pixel characteristics. Provided is a solid-state imaging device including a pixel array part comprising two-dimensionally arranged pixels each having a photoelectric conversion element and a pixel transistor, the pixel transistor including a transistor having a structure in which an impurity has been injected into a channel that is non-linear in a plan view, using a self-alignment mask according to the gate electrodes. The present disclosure is applicable to, for example, CMOS-type solid-state imaging devices.

Classes IPC  ?

  • H01L 27/146 - Structures de capteurs d'images
  • H01L 21/8234 - Technologie MIS
  • H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
  • H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée

20.

IMAGING DEVICE

      
Numéro d'application JP2023029334
Numéro de publication 2024/075399
Statut Délivré - en vigueur
Date de dépôt 2023-08-10
Date de publication 2024-04-11
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Hattori, Yuki
  • Yamamoto, Masahiro

Abrégé

The present invention reduces a noise component caused by a dark current while eliminating the need for mechanical light shielding. This imaging device comprises: a pixel provided with a lateral overflow integration capacitor that accumulates an electrical charge which has overflowed from a photoelectric conversion unit; and a signal processing unit that carries out correction processing of a pixel signal read out from the pixel, on the basis of a virtual light shielding signal read out from the lateral overflow integration capacitor in a state in which an electrical charge which has been photoelectrically converted in the photoelectric conversion unit is not accumulated in the lateral overflow integration capacitor. The imaging device may further comprise a flow control unit that discharges an electrical charge so that an electrical charge which has been photoelectrically converted in the photoelectric conversion unit is not accumulated in the lateral overflow integration capacitor.

Classes IPC  ?

  • H04N 25/771 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
  • H04N 25/63 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit appliqué au courant d'obscurité

21.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Numéro d'application 18264725
Statut En instance
Date de dépôt 2022-01-13
Date de la première publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Makino, Hirofumi

Abrégé

A semiconductor device according to the present technology includes a semiconductor chip, and a wiring board portion having the semiconductor chip mounted thereon and having an external connection terminal for establishing electrical connection to the outside, the external connection terminal being formed on its back surface which is a surface opposite to its front surface which is a surface on which the semiconductor chip is mounted, in which the semiconductor chip is connected to a terminal formed on the front surface of the wiring board portion through a bonding wire to be wire-bonded to the wiring board portion, and a heat dissipation member is disposed between the bonding wire and the wiring board portion.

Classes IPC  ?

  • H01L 23/427 - Refroidissement par changement d'état, p.ex. caloducs
  • H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
  • H01L 23/053 - Conteneurs; Scellements caractérisés par la forme le conteneur étant une structure creuse ayant une base isolante qui sert de support pour le corps semi-conducteur
  • H01L 23/29 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par le matériau
  • H01L 23/373 - Refroidissement facilité par l'emploi de matériaux particuliers pour le dispositif
  • H01L 27/146 - Structures de capteurs d'images

22.

NONVOLATILE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

      
Numéro d'application 18261655
Statut En instance
Date de dépôt 2021-12-07
Date de la première publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Sumino, Jun
  • Aratani, Katsuhisa
  • Sone, Takeyuki
  • Mizuguchi, Tetsuya

Abrégé

Provided is a nonvolatile memory device that makes it possible to achieve high performance. The nonvolatile memory device includes a first electrode, a memory material layer, a second electrode, and a first buffer layer. The memory material layer includes a first element and is provided on the first electrode. The second electrode is provided on the memory material layer. The first buffer layer is provided between the memory material layer and the second electrode. In the first buffer layer, a segregation of the first element is smaller than a segregation of the first element in the second electrode.

Classes IPC  ?

  • H10B 63/00 - Dispositifs de mémoire par changement de résistance, p.ex. dispositifs RAM résistifs [ReRAM]
  • H10N 70/00 - Dispositifs à l’état solide sans barrière de potentiel ni de surface, spécialement adaptés au redressement, à l'amplification, à la production d'oscillations ou à la commutation

23.

WIRELESS SYSTEM

      
Numéro d'application 18264638
Statut En instance
Date de dépôt 2022-01-13
Date de la première publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Uno, Masahiro

Abrégé

A wireless system according to an embodiment of the present disclosure includes: one or a plurality of distributed units each including an antenna, a wireless circuit, and a camera, the wireless circuit transmitting and receiving a wireless signal via the antenna, the camera outputting an image signal; and a central unit that is line-coupled to each of the distributed units. The each of the distributed units transmits the wireless signal from the wireless circuit and image information based on the image signal outputted from the camera to the central unit using one line. The central unit includes a radio resource control circuit, a baseband circuit that performs signal processing on the wireless signal from the each of the distributed units on a basis of control performed by the radio resource control circuit, and a processing circuit that performs a process based on the image information from the each of the distributed units.

Classes IPC  ?

  • H04B 10/2575 - Radio sur fibre, p.ex. signal radio modulé en fréquence sur une porteuse optique
  • G06V 20/50 - Contexte ou environnement de l’image
  • G06V 40/20 - Mouvements ou comportement, p.ex. reconnaissance des gestes
  • H04W 16/28 - Structures des cellules utilisant l'orientation du faisceau
  • H04W 28/06 - Optimisation, p.ex. compression de l'en-tête, calibrage des informations

24.

DISPLAY DEVICE AND ELECTRONIC APPARATUS

      
Numéro d'application JP2023029559
Numéro de publication 2024/070292
Statut Délivré - en vigueur
Date de dépôt 2023-08-16
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Sato, Akihito

Abrégé

A display device according to one embodiment of the present disclosure comprises: a display region in which a plurality of effective pixels are arranged in a matrix pattern; a non-display region including a plurality of dummy pixels provided in the vicinity of the display region; and a heat generating structure that absorbs incident light to generate heat, and is provided in the non-display region so as to surround the display region.

Classes IPC  ?

  • G02F 1/13 - Dispositifs ou dispositions pour la commande de l'intensité, de la couleur, de la phase, de la polarisation ou de la direction de la lumière arrivant d'une source lumineuse indépendante, p.ex. commutation, ouverture de porte ou modulation; Optique non linéaire pour la commande de l'intensité, de la phase, de la polarisation ou de la couleur basés sur des cristaux liquides, p.ex. cellules d'affichage individuelles à cristaux liquides

25.

LENS OPTICAL SYSTEM AND IMAGING DEVICE

      
Numéro d'application JP2023032953
Numéro de publication 2024/070611
Statut Délivré - en vigueur
Date de dépôt 2023-09-11
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Ogino Shinpei
  • Murakami Daichi
  • Hanzawa Fumihiko
  • Takeuchi Haruki
  • Nakamura Masashi
  • Kimura Katsuji

Abrégé

The present technology pertains to a lens optical system and an imaging device which make it possible to improve optical performance in a wide-angle lens optical system having a metasurface. The lens optical system comprises, in order from the light incident side, a metalens having positive refractive power and an optical lens having positive refractive power. The metalens has disposed thereon a metasurface formed from a plurality of nanostructures. An aperture diaphragm is disposed on the incident side of the metasurface. At least one optical surface of a second lens is aspherical. The present technology can be applicable to, for example, a wide-angle lens optical system or the like that condenses light from a subject to a solid-state imaging element.

Classes IPC  ?

  • G02B 13/00 - Objectifs optiques spécialement conçus pour les emplois spécifiés ci-dessous
  • G02B 5/18 - Grilles de diffraction
  • G02B 13/18 - Objectifs optiques spécialement conçus pour les emplois spécifiés ci-dessous avec des lentilles ayant une ou plusieurs surfaces non sphériques, p.ex. pour réduire l'aberration géométrique

26.

SOLID-STATE IMAGING DEVICE, ELECTRONIC DEVICE, AND PROGRAM

      
Numéro d'application JP2023033250
Numéro de publication 2024/070673
Statut Délivré - en vigueur
Date de dépôt 2023-09-12
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Kazama Ryohei
  • Wakayama Kazuyuki
  • Kusakari Takashi

Abrégé

[Problem] To improve the authentication accuracy. [Solution] A solid-state imaging device comprises a light source, a first light reception region, and a second light reception region. The light source is provided on the opposite side of a display from the display surface of the display, the light source emitting light in the IR region via the display. The first light reception region is provided on the opposite side of the display from the display surface, and is provided with pixels for receiving light in the visible light region and pixels for receiving at least light in the IR region emitted from the light source. The second light reception region is provided on the opposite side of the display from the display surface, and is provided with pixels for receiving at least light in the IR region emitted from the light source.

Classes IPC  ?

  • G01S 17/86 - Combinaisons de systèmes lidar avec des systèmes autres que lidar, radar ou sonar, p.ex. avec des goniomètres
  • G01S 17/89 - Systèmes lidar, spécialement adaptés pour des applications spécifiques pour la cartographie ou l'imagerie

27.

RANGING DEVICE, AND METHOD FOR MANUFACTURING SAME

      
Numéro d'application JP2023033872
Numéro de publication 2024/070803
Statut Délivré - en vigueur
Date de dépôt 2023-09-19
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Suzuki Ryosuke
  • Fukunaga Hiroshi
  • Otake Yusuke
  • Wakano Toshifumi
  • Asayama Go

Abrégé

[Problem] To perform ranging processing with low power consumption while enabling a reduction in size and cost. [Solution] This ranging device employs a light receiving unit to receive a reflected light signal resulting from a light pulse signal emitted from a light emitting unit being reflected by an object, and measures a distance to the object on the basis of the reflected light signal received by the light receiving unit, the ranging device comprising: a first board comprising a group 4 material on which the light receiving unit and the light emitting unit are disposed monolithically; and a second board which is stacked on the first board, and which has disposed thereon a readout circuit for reading out a light reception signal received by the light receiving unit.

Classes IPC  ?

  • G01S 7/481 - Caractéristiques de structure, p.ex. agencements d'éléments optiques
  • G01S 17/894 - Imagerie 3D avec mesure simultanée du temps de vol sur une matrice 2D de pixels récepteurs, p.ex. caméras à temps de vol ou lidar flash

28.

IMAGE PROCESSING DEVICE, IMAGE PROCESSING METHOD, AND PROGRAM

      
Numéro d'application JP2023034433
Numéro de publication 2024/070925
Statut Délivré - en vigueur
Date de dépôt 2023-09-22
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Sato, Taiki
  • Tabata, Hidenori
  • Yoneyama, Hisashi

Abrégé

The objective of the present invention is to reduce an amount of calculation required for detection processing in a device that detects a three-dimensional shape of an object. An image processing device of the present disclosure includes an object detection region information generating portion. The object detection region information generating portion of the image processing device of the present disclosure generates object detection region information for detecting the three-dimensional shape of the object from a distance image including the object, on the basis of the distance image. Further, the object detection region information generated by an object region information generating portion of the image processing device of the present disclosure is information relating to a detection region of the object.

Classes IPC  ?

  • G01B 11/24 - Dispositions pour la mesure caractérisées par l'utilisation de techniques optiques pour mesurer des contours ou des courbes

29.

LIGHT DETECTING DEVICE, AND RANGING SYSTEM

      
Numéro d'application JP2023035078
Numéro de publication 2024/071173
Statut Délivré - en vigueur
Date de dépôt 2023-09-27
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Sekiya Akito
  • Hamamatsu Masamune
  • Endo Noriaki
  • Saito Yoshiyuki

Abrégé

[Problem] To enable an improvement in ranging accuracy using a small number of light emissions and light receptions, irrespective of the distance to an object. [Solution] This light detecting device comprises: a light receiving unit for receiving, within a first time range, a first reflected light pulse signal resulting from a first light pulse signal emitted in a first time interval being reflected by an object, and receiving, within a second time range different from the first time range, a second reflected light pulse signal resulting from a second light pulse signal emitted in a second time interval different from the first time interval being reflected by the object; and a histogram generator for generating a first histogram in which reception frequencies of the first reflected light pulse signal received within the first time range are classified for each predetermined fixed unit period, and generating a second histogram in which the reception frequencies of the second reflected light pulse signals received within the second time range are classified for each unit period.

Classes IPC  ?

  • G01S 7/4863 - Réseaux des détecteurs, p.ex. portes de transfert de charge
  • G01C 3/06 - Utilisation de moyens électriques pour obtenir une indication finale
  • G01S 17/894 - Imagerie 3D avec mesure simultanée du temps de vol sur une matrice 2D de pixels récepteurs, p.ex. caméras à temps de vol ou lidar flash

30.

IMAGING ELEMENT AND IMAGING DEVICE

      
Numéro d'application 18264724
Statut En instance
Date de dépôt 2022-01-27
Date de la première publication 2024-04-04
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s) Okazaki, Tetsushi

Abrégé

Imaging elements and devices that maintain the linearity of image signals with respect to the amount of incident light are disclosed. In one example, an imaging element includes a pixel, a photoelectric conversion unit connecting unit, a charge holding unit, charge transfer units, an image signal generating unit. The pixel includes photoelectric conversion units formed on a semiconductor substrate, the semiconductor substrate including a wiring region disposed on a front surface side, the photoelectric conversion units performing photoelectric conversion of incident light from an object to generate charges. The photoelectric conversion unit connecting unit connects the photoelectric conversion units to each other. The charge transfer units transfer the charges generated by the photoelectric conversion units to the charge holding unit. The image signal generating unit generates an image signal based on the held charges.

Classes IPC  ?

31.

ELECTRONIC DEVICE

      
Numéro d'application 18264719
Statut En instance
Date de dépôt 2022-01-28
Date de la première publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Imahigashi, Takashi

Abrégé

An electronic device according to the present disclosure includes a semiconductor substrate, a chip, a bump, and a sidewall portion. The bump connects a plurality of connection pads provided on the opposing main surfaces of the semiconductor substrate and the chip. The sidewall portion includes a porous metal layer and that annularly surrounds a region where a plurality of bumps is provided, and connects the semiconductor substrate and the chip. The chip has a thermal expansion coefficient different from that of the semiconductor substrate by 0.1 ppm/° C. or more. The chip is a semiconductor laser, and the semiconductor substrate includes a drive circuit that drives the semiconductor laser.

Classes IPC  ?

  • H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
  • H01S 5/0234 - Montage à orientation inversée, p.ex. puce retournée [flip-chip], montage à côté épitaxial au-dessous ou montage à jonction au-dessous
  • H01S 5/026 - Composants intégrés monolithiques, p.ex. guides d'ondes, photodétecteurs de surveillance ou dispositifs d'attaque

32.

PHOTODETECTION DEVICE AND PHOTODETECTION SYSTEM

      
Numéro d'application 18249387
Statut En instance
Date de dépôt 2021-09-02
Date de la première publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Ikeda, Yasuji

Abrégé

A photodetection device according to the present disclosure includes a plurality of light-receiving sections that each generates a pulse signal including a pulse corresponding to a result of light reception, a plurality of edge detectors that each generates a detection signal by detecting an edge of the pulse in the pulse signal generated by a corresponding light-receiving section, and an adder that generates a detection value indicating number of the pulses on the basis of a plurality of the detection signals. The edge detectors each include a first latch circuit that generates a first signal by latching the pulse signal on the basis of a first clock signal, a second latch circuit that generates a second signal by latching the first signal on the basis of a second clock signal that is an inverted signal of the first clock signal, a combination circuit that generates a third signal on the basis of the pulse signal, the first signal, and the second signal, and a third latch circuit that generates the detection signal by latching the third signal on the basis of the first clock signal.

Classes IPC  ?

  • G01S 7/4863 - Réseaux des détecteurs, p.ex. portes de transfert de charge
  • G01S 7/481 - Caractéristiques de structure, p.ex. agencements d'éléments optiques
  • G01S 7/487 - Extraction des signaux d'écho désirés

33.

SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE

      
Numéro d'application 18264707
Statut En instance
Date de dépôt 2022-02-03
Date de la première publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Tojinbara, Hiroki

Abrégé

A solid-state imaging device as disclosed includes a semiconductor layer having a light incidence surface and an element formation surface. The semiconductor layer includes a plurality of photoelectric conversion units including a first photoelectric conversion portion, a second photoelectric conversion portion, an isolation portion, a charge accumulation region, a first transfer transistor capable of transferring a signal charge from the first photoelectric conversion portion to the charge accumulation region, and a second transfer transistor capable of transferring a signal charge from the second photoelectric conversion portion to the charge accumulation region. The isolation portion includes a first region formed by an insulating material extending in a thickness direction of the semiconductor layer from the element formation surface side, and a second region provided on the light incidence surface side of the first region and formed by a semiconductor region into which impurities exhibiting a first conductivity type are implanted.

Classes IPC  ?

34.

OPTICAL MODULE AND DISTANCE MEASURING DEVICE

      
Numéro d'application 18276347
Statut En instance
Date de dépôt 2021-12-23
Date de la première publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Kobayashi, Takashi
  • Oiwa, Tatsuya
  • Xu, Jialun
  • Kimura, Motoi

Abrégé

To improve resolution while suppressing the number of light emitting elements arranged in an optical module. To improve resolution while suppressing the number of light emitting elements arranged in an optical module. The optical module is provided with an optical element that converts a light beam emitted from the light emitting element into a substantially parallel light beam or a light beam having a predetermined angular width, and a diffraction element that diffracts the light beam to separate into a plurality of light beams. The diffraction element generates diffracted lights in n direction, and an angle θx formed between one diffraction direction and a side in a direction in which the light emitting element is arranged satisfies tan−1 (b/3a). A diffraction angle φx of the diffracted light satisfies m·sgrt((3φa){circumflex over ( )}2+φb{circumflex over ( )}2)/(2(2n+1)). Note that, φa and φb are angular differences of two light beams caused by inter-light emission distances a and b. Furthermore, n is a natural number, and m is a natural number excluding an integral multiple of 2n+1.

Classes IPC  ?

  • G01S 7/481 - Caractéristiques de structure, p.ex. agencements d'éléments optiques

35.

PIXEL CIRCUIT, DISPLAY DEVICE, AND DRIVING METHOD

      
Numéro d'application 18255585
Statut En instance
Date de dépôt 2021-11-26
Date de la première publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Toyomura, Naobumi

Abrégé

Provided are a pixel circuit, a display device, and a driving method that suppress a decrease in luminance. A pixel circuit according to the present disclosure includes a first transistor configured to control a current supplied to a light emitting element according to a voltage supplied to a first terminal, a first capacitor configured to hold the voltage supplied to the first terminal, a second transistor configured to sample a signal voltage of a video signal line, a second capacitor configured to hold the signal voltage sampled by the second transistor, and a third transistor configured to connect the second capacitor and the first capacitor and set a voltage corresponding to the signal voltage to the first capacitor by transferring electric charges accumulated in the second capacitor to the first capacitor.

Classes IPC  ?

  • G09G 3/3233 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p.ex. utilisant des diodes électroluminescentes [LED] organiques, p.ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active avec un circuit de pixel pour commander le courant à travers l'élément électroluminescent

36.

COMPUTATION DEVICE, IMAGING DEVICE AND COMPUTATION METHOD

      
Numéro d'application JP2022036010
Numéro de publication 2024/069769
Statut Délivré - en vigueur
Date de dépôt 2022-09-27
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Saito Daisuke
  • Hanzawa Katsuhiko
  • Sakakibara Masaki
  • Maeda Noriaki
  • Naganuma Hideki

Abrégé

The present disclosure provides a computation device equipped with a first signal line, a first capacitor which is connected to the first signal line, one or more sub-arrays which are connected to the first signal line, and a readout circuit for generating a digital signal which corresponds to the charge of the first signal line, wherein the sub-arrays have a second signal line which is connected to the first signal line via a first switching element, a second capacitor which is connected to the second signal line, and one or more memory cells which are connected to the second signal line and capable of imparting a charge, which corresponds to a signal value to be stored, to said second signal line.

Classes IPC  ?

  • G11C 11/54 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliers; Eléments d'emmagasinage correspondants utilisant des éléments simulateurs de cellules biologiques, p.ex. neurone
  • G06G 7/60 - Calculateurs analogiques pour des procédés, des systèmes ou des dispositifs spécifiques, p.ex. simulateurs d'êtres vivants, p.ex. leur système nerveux
  • G06N 3/063 - Réalisation physique, c. à d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G11C 11/412 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliers; Eléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des dispositifs à semi-conducteurs utilisant des transistors formant des cellules avec réaction positive, c. à d. des cellules ne nécessitant pas de rafraîchissement ou de régénération de la charge, p.ex. multivibrateur bistable, déclencheur de Schmitt utilisant uniquement des transistors à effet de champ

37.

PHOTOELECTRIC CONVERSION ELEMENT, AND PHOTODETECTOR

      
Numéro d'application JP2023029560
Numéro de publication 2024/070293
Statut Délivré - en vigueur
Date de dépôt 2023-08-16
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Takaguchi, Ryotaro
  • Joei, Masahiro
  • Hirata, Shintarou
  • Yagi, Iwao
  • Suzuki, Ryosuke

Abrégé

A first photoelectric conversion element according to one embodiment of the present disclosure comprises: an electrode layer including a first electrode and a second electrode that are arranged in parallel; a third electrode that is arranged to face the first electrode and the second electrode; a photoelectric conversion layer that is provided between the electrode layer and the third electrode; an oxide semiconductor layer that is provided between the electrode layer and the photoelectric conversion layer; and a first insulating layer that is provided between the electrode layer and the oxide semiconductor layer, wherein the first insulating layer has an opening which allows the entire upper surface of the first electrode to be in contact with the oxide semiconductor layer without having the first insulating layer therebetween.

Classes IPC  ?

  • H01L 27/146 - Structures de capteurs d'images
  • H01L 31/10 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails dans lesquels le rayonnement commande le flux de courant à travers le dispositif, p.ex. photo-résistances caractérisés par au moins une barrière de potentiel ou une barrière de surface, p.ex. photo-transistors
  • H10K 30/60 - Dispositifs organiques sensibles au rayonnement infrarouge, à la lumière, au rayonnement électromagnétique de plus courte longueur d'onde ou au rayonnement corpusculaire dans lesquels le rayonnement commande le flux de courant à travers les dispositifs, p. ex. photorésistances

38.

LIGHT DETECTION ELEMENT AND ELECTRONIC DEVICE

      
Numéro d'application JP2023032304
Numéro de publication 2024/070523
Statut Délivré - en vigueur
Date de dépôt 2023-09-05
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Uehara Takuya

Abrégé

[Problem] To suppress detection of noise events and to detect events quickly and precisely. [Solution] This light detection element comprises: a first pixel region including a plurality of first pixels which each detect an event based on the amount of change in the amount of incident light; and a second pixel region disposed in the vicinity of the first pixel region and including second pixels which detect the event in the surroundings of first pixels among the plurality of first pixels which have detected the event.

Classes IPC  ?

  • H04N 25/707 - Pixels pour la détection d’événements
  • H04N 25/772 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
  • H04N 25/77 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs

39.

INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND RECORDING MEDIUM

      
Numéro d'application JP2023032951
Numéro de publication 2024/070609
Statut Délivré - en vigueur
Date de dépôt 2023-09-11
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Ando Hideki
  • Miyoshi Hironori

Abrégé

The present disclosure pertains to an information processing apparatus, an information processing method, and a recording medium enabling an apparatus interposed between a device and an application apparatus to properly provide data from the device to the application apparatus. A data service (DS) is provided with a control unit for: acquiring, with regard to a plurality of app apparatuses, link information with respect to a device that outputs data and an app apparatus that performs prescribed data processing using data; determining a destination to which to send data acquired from one or more devices on the basis of the acquired link information; and performing control to transmit the data to the one or more app apparatuses determined to be the destination. The features of the present disclosure can be applied, for example, to apparatuses for performing data communication conforming to the NICE standard.

Classes IPC  ?

  • H04L 67/2871 - Architectures; Dispositions - Détails de mise en œuvre d'entités intermédiaires uniques
  • G06F 15/00 - TRAITEMENT ÉLECTRIQUE DE DONNÉES NUMÉRIQUES Équipement de traitement de données en général
  • H04L 67/50 - Services réseau
  • H04M 11/00 - Systèmes de communication téléphonique spécialement adaptés pour être combinés avec d'autres systèmes électriques

40.

SOLID-STATE IMAGING DEVICE, COMPARATOR AND ELECTRONIC EQUIPMENT

      
Numéro d'application JP2023033581
Numéro de publication 2024/070740
Statut Délivré - en vigueur
Date de dépôt 2023-09-14
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Hayashi Yasuaki
  • Umeda Kengo
  • Moue Takashi
  • Naganokawa Haruhisa

Abrégé

[Problem] To reduce noise in an image sensor. [Solution] This solid-state imaging device comprises a light receiving element, a first amplification circuit, a second amplification circuit and a control circuit. The first amplification circuit amplifies and outputs the difference between a reference signal and an input signal outputted from the light receiving element. The second amplification circuit amplifies and outputs the first amplified signal outputted by the first amplification circuit. The control circuit controls, on the basis of the reference signal, an active load of the first amplification circuit or the mutual conductance of at least one of amplification transistors of the second amplification circuit.

Classes IPC  ?

  • H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
  • H01L 27/146 - Structures de capteurs d'images
  • H03M 1/08 - Compensation ou prévention continue de l'influence indésirable de paramètres physiques du bruit
  • H03M 1/56 - Comparaison du signal d'entrée avec une rampe linéaire

41.

IMAGE PROCESSING DEVICE, IMAGE PROCESSING METHOD, PROGRAM, AND IMAGING DEVICE

      
Numéro d'application JP2023034587
Numéro de publication 2024/070979
Statut Délivré - en vigueur
Date de dépôt 2023-09-22
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Tabata, Hidenori

Abrégé

In the present invention, the data volume of a distance image is reduced. This image processing device has a second distance image generation unit. The second distance image generation unit generates a second distance image. The second distance image has a plurality of second pixels provided with information on the distance of first pixels that are pixels of a first distance image that is a distance image of a region including an object. The plurality of second pixels are respectively disposed corresponding to emission regions of structured light having a prescribed emission region pattern projected on a region including the object in order to generate the first distance image. The information on the distance of the first pixels at the positions corresponding to the emission regions is provided to the second pixels at the positions corresponding to the emission regions.

Classes IPC  ?

  • G01B 11/25 - Dispositions pour la mesure caractérisées par l'utilisation de techniques optiques pour mesurer des contours ou des courbes en projetant un motif, p.ex. des franges de moiré, sur l'objet
  • G06T 7/50 - Récupération de la profondeur ou de la forme

42.

IMAGING ELEMENT AND ELECTRONIC DEVICE

      
Numéro d'application JP2023035436
Numéro de publication 2024/071309
Statut Délivré - en vigueur
Date de dépôt 2023-09-28
Date de publication 2024-04-04
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Masuda Yoshiaki
  • Hatano Keisuke
  • Nagata Kengo
  • Noudo Shinichiro
  • Furuhashi Takahisa
  • Ando Atsuhiro

Abrégé

The present technology pertains to an imaging element and an electronic device which can reduce time and labor in performing inspection during manufacturing. The imaging element comprises: a pixel array in which pixels including photoelectric conversion elements are two-dimensionally arrayed; a pad having an opening in a first surface side to which the pixel array is provided; an electrode provided, in an exposed state, to the bottom of the pad; a through-electrode having an opening in a second surface opposite to the first surface; and a rewiring layer layered on the second surface. The inside of the through-electrode is hollow. The present technology can be applied to, for example, an imaging element in a wafer-level chip size package (WLCLP).

Classes IPC  ?

  • H01L 27/146 - Structures de capteurs d'images
  • H01L 23/12 - Supports, p.ex. substrats isolants non amovibles
  • H04N 25/70 - Architectures de capteurs SSIS; Circuits associés à ces dernières

43.

APPARATUSES AND METHODS FOR POLARIZATION BASED SURFACE NORMAL IMAGING

      
Numéro d'application EP2023075650
Numéro de publication 2024/068335
Statut Délivré - en vigueur
Date de dépôt 2023-09-18
Date de publication 2024-04-04
Propriétaire
  • SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
  • UNIVERSITY OF ZURICH (Suisse)
Inventeur(s)
  • Muglikar, Manasi
  • Moeys, Diederik Paul
  • Scaramuzza, Davide

Abrégé

The present disclosure relates to an apparatus for polarization-based surface normal imaging, the apparatus comprising a linear polarizer configured to rotate and to subsequently pass light from a scene, an event-based vision sensor, EVS, configured to detect a set of events of the scene based on the rotation angle of the linear polarizer, and a shape estimation processor configured to compute surface normal information of the scene based on the set of events and the corresponding rotation angle of the polarizer.

Classes IPC  ?

  • G06T 7/55 - Récupération de la profondeur ou de la forme à partir de plusieurs images

44.

MEASUREMENT DEVICE AND MEASUREMENT METHOD

      
Numéro d'application JP2023033140
Numéro de publication 2024/070653
Statut Délivré - en vigueur
Date de dépôt 2023-09-12
Date de publication 2024-04-04
Propriétaire
  • SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
  • SONY GROUP CORPORATION (Japon)
Inventeur(s)
  • Kondo Fumitaka
  • Yamamoto Ken
  • Nakagawa Kei
  • Hiyama Ayaka

Abrégé

The present technology pertains to a measurement device and a measurement method which enable accurate measurement of the concentration of glucose (dextrose) contained in an object to be measured. The concentration of glucose in the object to be measured is calculated on the basis of the complex dielectric constant of the object to be measured and moisture content of the object to be measured. The moisture content can be calculated on the basis of an incident signal, which represents an electromagnetic wave incident on the object to be measured, and a reflection signal, which represents reflection by the object to be measured.

Classes IPC  ?

  • G01N 22/00 - Recherche ou analyse des matériaux par l'utilisation de micro-ondes ou d'ondes radio, c. à d. d'ondes électromagnétiques d'une longueur d'onde d'un millimètre ou plus
  • G01N 22/04 - Recherche de la teneur en eau

45.

IMAGE PROCESSING DEVICE, IMAGE PROCESSING METHOD, AND PROGRAM

      
Numéro d'application JP2023033646
Numéro de publication 2024/070751
Statut Délivré - en vigueur
Date de dépôt 2023-09-15
Date de publication 2024-04-04
Propriétaire
  • SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
  • SONY GROUP CORPORATION (Japon)
Inventeur(s)
  • Yoneyama, Hisashi
  • Tanaka, Satoshi

Abrégé

The objective of the present invention is to improve the convenience of an image processing device that detects the entry of a moving object into a target region. The image processing device includes an entry detecting portion. The entry detecting portion of the image processing device detects the entry of the object into the detection target region on the basis of specific information relating to the detection target region. The detection target region of the entry detecting portion is a region in which the object is to be detected. A specific region of the entry detecting portion is some information relating to the object in the detection target region.

Classes IPC  ?

46.

SOLID-STATE IMAGING ELEMENT AND ELECTRONIC APPARATUS

      
Numéro d'application 18256289
Statut En instance
Date de dépôt 2021-12-07
Date de la première publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Kugimiya, Katsuhisa

Abrégé

A solid-state imaging element (1) according to the present disclosure includes a pixel array unit (10) in which a plurality of light receiving pixels (11) is two-dimensionally arranged. Each of the light receiving pixels (11) includes an organic photoelectric conversion unit (61) and another photoelectric conversion unit. The organic photoelectric conversion unit (61) includes a photoelectric conversion layer (63) made of an organic semiconductor material, a first electrode (62) located on a light incident side of the photoelectric conversion layer (63), and a second electrode (65) located on a side opposite to the light incident side of the photoelectric conversion layer (63). The other photoelectric conversion unit is located on a side opposite to the light incident side of the organic photoelectric conversion unit (61), and performs photoelectric conversion in a wavelength region different from a wavelength region of the organic photoelectric conversion unit (61). The second electrode (65) is connected to a connection wiring (51) including a metal wiring (54) made of metal and a transparent wiring (53) made of a transparent conductive film. The metal wiring (54) extends in a horizontal direction from a peripheral portion of the light receiving pixel (11) to a peripheral portion of the pixel array unit (10).

Classes IPC  ?

  • H10K 39/32 - Capteurs d'images organiques
  • H10K 39/00 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comprenant au moins un composant organique sensible aux rayonnements couvert par le groupe
  • H10K 39/38 - Interconnexions, p. ex. bornes

47.

INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND SENSING SYSTEM

      
Numéro d'application 18264862
Statut En instance
Date de dépôt 2021-12-23
Date de la première publication 2024-03-28
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s)
  • Takahashi, Kousuke
  • Kitano, Kazutoshi
  • Kawamura, Yuusuke
  • Kubota, Takeshi

Abrégé

An information processing apparatus according to an embodiment includes: a recognition unit (122) configured to perform recognition processing on the basis of a point cloud output from a photodetection ranging unit (11) using a frequency modulated continuous wave to determine a designated area in a real object, the photodetection ranging unit being configured to output the point cloud including velocity information and three-dimensional coordinates of the point cloud on the basis of a reception signal reflected by an object and received, and configured to output three-dimensional recognition information including information indicating the determined designated area, and a correction unit (125) configured to correct three-dimensional coordinates of the designated area in the point cloud on the basis of the three-dimensional recognition information output by the recognition unit.

Classes IPC  ?

  • G01S 7/48 - DÉTERMINATION DE LA DIRECTION PAR RADIO; RADIO-NAVIGATION; DÉTERMINATION DE LA DISTANCE OU DE LA VITESSE EN UTILISANT DES ONDES RADIO; LOCALISATION OU DÉTECTION DE LA PRÉSENCE EN UTILISANT LA RÉFLEXION OU LA RERADIATION D'ONDES RADIO; DISPOSITIONS ANALOGUES UTILISANT D'AUTRES ONDES - Détails des systèmes correspondant aux groupes , , de systèmes selon le groupe
  • G01S 17/42 - Mesure simultanée de la distance et d'autres coordonnées
  • G01S 17/58 - Systèmes de détermination de la vitesse ou de la trajectoire; Systèmes de détermination du sens d'un mouvement
  • G06F 3/01 - Dispositions d'entrée ou dispositions d'entrée et de sortie combinées pour l'interaction entre l'utilisateur et le calculateur

48.

THREE-DIMENSIONAL IMAGE CAPTURING ACCORDING TO TIME-OF-FLIGHT MEASUREMENT AND LIGHT SPOT PATTERN MEASUREMENT

      
Numéro d'application 18273546
Statut En instance
Date de dépôt 2022-01-26
Date de la première publication 2024-03-28
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s)
  • Cacho, Pepe Gil
  • Louveaux, Sebastien

Abrégé

An electronic device comprising circuitry configured to disambiguate a first phase delay obtained according to an indirect Time-of-Flight principle to obtain a second phase delay, wherein the circuitry is configured to disambiguate the first phase delay based on a captured spot position.

Classes IPC  ?

  • G01S 17/36 - Systèmes déterminant les données relatives à la position d'une cible pour mesurer la distance uniquement utilisant la transmission d'ondes continues, soit modulées en amplitude, en fréquence ou en phase, soit non modulées avec comparaison en phase entre le signal reçu et le signal transmis au même moment
  • G01S 17/46 - Détermination indirecte des données relatives à la position
  • G01S 17/894 - Imagerie 3D avec mesure simultanée du temps de vol sur une matrice 2D de pixels récepteurs, p.ex. caméras à temps de vol ou lidar flash

49.

PIXEL CIRCUIT AND SOLID-STATE IMAGING DEVICE

      
Numéro d'application 18275221
Statut En instance
Date de dépôt 2022-02-17
Date de la première publication 2024-03-28
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s)
  • Zeituni, Golan
  • Eshel, Noam Zeev

Abrégé

A pixel circuit (100) includes a photoelectric conversion circuit (110), an integration capacitor (Cint) and a supplementary circuit (120). The photoelectric conversion circuit (110) generates and outputs a photocurrent (Iphoto). The integration capacitor (Cint) includes a storage electrode (CintS) and a reference electrode (CintR), wherein the reference electrode (CintR) is connected to a first supply potential (VSUP1), and wherein the integration capacitor (Cint) is configured to integrate the photocurrent on the storage electrode (CintS) in an integration period (Tint). The supplementary circuit (120) pre-charges a working node (WN) between the photoelectric conversion circuit (110) and the storage electrode (CintS) to a pre-charge potential (Vpre) that differs from the first supply potential (VSUP1).

Classes IPC  ?

  • H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
  • H01L 27/146 - Structures de capteurs d'images
  • H04N 25/709 - Circuits de commande de l'alimentation électrique
  • H04N 25/771 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante

50.

COLUMN SIGNAL PROCESSING UNIT AND SOLID-STATE IMAGING DEVICE

      
Numéro d'application 18276647
Statut En instance
Date de dépôt 2022-02-17
Date de la première publication 2024-03-28
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s)
  • Zeituni, Golan
  • Eshel, Noam Zeev

Abrégé

A column signal processing unit includes a current control circuit (110) and a feedback circuit (120). The current control circuit (110) is electrically connected between a data signal line (VSL) and a supply reference potential (GND). The feedback circuit (120) is configured to reduce a capacitive load of the data signal line (VSL). A feedback path (121) of the feedback circuit (120) includes a series connection of a feedback capacitor (122) and a delay element (123), wherein the delay element (123) is configured to increase a time delay in the feedback path (121).

Classes IPC  ?

  • H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N

51.

IMAGING ELEMENT AND ELECTRONIC APPARATUS

      
Numéro d'application 18529579
Statut En instance
Date de dépôt 2023-12-05
Date de la première publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Nomura, Hirotoshi

Abrégé

The present disclosure relates to an imaging element and an electronic apparatus configured to achieve higher-resolution image taking. The imaging element includes: a photoelectric conversion portion provided in a semiconductor substrate for each pixel that performs photoelectric conversion on light that enters through a filter layer; an element isolation portion configured to separate the photoelectric conversion portions of adjacent pixels; and an inter-pixel light shielding portion disposed between the pixels in a layer and provided between the semiconductor substrate and the filter layer and separated from a light receiving surface of the semiconductor substrate by a predetermined interval. Moreover, an interval between the light receiving surface of the semiconductor substrate and a tip end surface of the inter-pixel light shielding portion is smaller than a width of the tip end surface of the inter-pixel light shielding portion. The present technology is applicable to back-illuminated CMOS image sensors, for example.

Classes IPC  ?

52.

SOLID-STATE IMAGING DEVICE, METHOD FOR DRIVING THE SAME, AND ELECTRONIC DEVICE

      
Numéro d'application 18531208
Statut En instance
Date de dépôt 2023-12-06
Date de la première publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Hatano, Keisuke
  • Koga, Fumihiko
  • Yamaguchi, Tetsuji
  • Izawa, Shinichiro

Abrégé

The present disclosure relates to a solid-state imaging device, a method for driving the solid-state imaging device, and an electronic device capable of improving auto-focusing accuracy by using a phase difference signal obtained by using a photoelectric conversion film. The solid-state imaging device includes a pixel including a photoelectric conversion portion having a structure where a photoelectric conversion film is interposed by an upper electrode on the photoelectric conversion film and a lower electrode under the photoelectric conversion film. The upper electrode is divided into a first upper electrode and a second upper electrode. The present disclosure can be applied to, for example, a solid-state imaging device or the like.

Classes IPC  ?

  • H04N 23/663 - Commande à distance de caméras ou de parties de caméra, p. ex. par des dispositifs de commande à distance pour commander des éléments de caméra interchangeables sur la base de signaux de capteurs d'images électroniques
  • G02B 7/34 - Systèmes pour la génération automatique de signaux de mise au point utilisant des zones différentes dans un plan pupillaire
  • H01L 27/146 - Structures de capteurs d'images
  • H04N 23/67 - Commande de la mise au point basée sur les signaux électroniques du capteur d'image
  • H04N 25/13 - Agencement de matrices de filtres colorés [CFA]; Mosaïques de filtres caractérisées par les caractéristiques spectrales des éléments filtrants
  • H04N 25/704 - Pixels spécialement adaptés à la mise au point, p. ex. des ensembles de pixels à différence de phase
  • H04N 25/778 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des amplificateurs partagés entre une pluralité de pixels, c. à d. qu'au moins une partie de l'amplificateur doit se trouver sur la matrice de capteurs elle-même
  • H10K 39/32 - Capteurs d'images organiques

53.

LIGHT-RECEIVING DEVICE, IMAGING DEVICE, AND DISTANCE MEASUREMENT DEVICE

      
Numéro d'application 18531446
Statut En instance
Date de dépôt 2023-12-06
Date de la première publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Ito, Kyosuke
  • Otake, Yusuke

Abrégé

A light-receiving device according to an embodiment of the present disclosure includes a pixel array including light-receiving elements provided in respective pixels. The light-receiving elements each include a high electric field region and a photoelectric conversion region. A plurality of the light-receiving elements provided in the respective pixels includes a plurality of types of elements that have temperature regions having high photon detection efficiency (PDE). The temperature regions are different from each other and partially overlap each other.

Classes IPC  ?

  • H04N 23/52 - Caméras ou modules de caméras comprenant des capteurs d'images électroniques; Leur commande - Détails de structure Éléments optimisant le fonctionnement du capteur d'images, p. ex. pour la protection contre les interférences électromagnétiques [EMI] ou la commande de la température par des éléments de transfert de chaleur ou de refroidissement
  • G01S 7/481 - Caractéristiques de structure, p.ex. agencements d'éléments optiques
  • H04N 23/65 - Commande du fonctionnement de la caméra en fonction de l'alimentation électrique

54.

SEMICONDUCTOR PACKAGE, SEMICONDUCTOR MODULE, ELECTRONIC DEVICE, AND SEMICONDUCTOR PACKAGE MANUFACTURING METHOD

      
Numéro d'application JP2023024723
Numéro de publication 2024/062719
Statut Délivré - en vigueur
Date de dépôt 2023-07-04
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Yasukawa, Hirohisa
  • Shigeta, Hiroyuki

Abrégé

Disclosed herein is a semiconductor package including a semiconductor chip configured to have one of two surfaces thereof mounted with a circuit, the circuit formation surface constituting a circuit formation surface, a first shield layer configured to cover a side of the semiconductor chip and the other surface thereof, and a second shield layer configured to cover the circuit formation circuit.

Classes IPC  ?

  • H01L 23/552 - Protection contre les radiations, p.ex. la lumière
  • H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
  • H01L 23/13 - Supports, p.ex. substrats isolants non amovibles caractérisés par leur forme
  • H01L 23/498 - Connexions électriques sur des substrats isolants
  • H01L 23/50 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p.ex. fils de connexion ou bornes pour des dispositifs à circuit intégré
  • H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
  • H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des groupes principaux , ou dans une seule sous-classe de , , p.ex. circuit hybrides

55.

ELECTRONIC DEVICE AND MANUFACTURING METHOD FOR ELECTRONIC DEVICE

      
Numéro d'application JP2023025782
Numéro de publication 2024/062745
Statut Délivré - en vigueur
Date de dépôt 2023-07-12
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Shigetoshi, Takushi

Abrégé

An electronic device includes a substrate, a first through-hole penetrating the substrate, a capacitive element above the substrate, and a first conductor film. A first portion of the first conductor film traverses the substrate along a side wall of the first through-hole and a second portion of the first conductor film is in contact with the capacitive element.

Classes IPC  ?

  • H01G 4/33 - Condensateurs à film mince ou à film épais
  • H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p.ex. fils de connexion ou bornes

56.

INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND PROGRAM

      
Numéro d'application JP2023031534
Numéro de publication 2024/062874
Statut Délivré - en vigueur
Date de dépôt 2023-08-30
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Shibui, Shuichi
  • Nagumo, Masahiko
  • Nakada, Hitoshi
  • Kitami, Hirotaka
  • Saruta, Takashi

Abrégé

An information processing device according to the present invention comprises an artificial intelligence (AI) image processing unit that: receives input of first image data and second image data as input data for an artificial intelligence model which has been trained with machine learning, said first image data being distance image data which is obtained on the basis of a light reception signal of a first sensor serving as a light-receiving sensor that performs a light reception operation for distance measurement, said second image data being image data obtained on the basis of a light reception signal of a second sensor that is a light-receiving sensor differing in type from the first sensor; and uses the artificial intelligence model to perform a process for inferring, as a correction target region, a distance measurement error region which appears in the first image data due to interference light that has been emitted from an outside object and that is in a light-reception wavelength band of the first sensor.

Classes IPC  ?

  • G01S 17/86 - Combinaisons de systèmes lidar avec des systèmes autres que lidar, radar ou sonar, p.ex. avec des goniomètres
  • G01S 7/495 - Contre-mesures ou anti-contre-mesures
  • G01S 17/894 - Imagerie 3D avec mesure simultanée du temps de vol sur une matrice 2D de pixels récepteurs, p.ex. caméras à temps de vol ou lidar flash
  • G06N 20/00 - Apprentissage automatique

57.

MAGNETORESISTIVE ELEMENT, MEMORY DEVICE, AND ELECTRONIC APPLIANCE

      
Numéro d'application JP2023033216
Numéro de publication 2024/062978
Statut Délivré - en vigueur
Date de dépôt 2023-09-12
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Endo, Masaki

Abrégé

A magnetoresistive element according to one embodiment of the present disclosure comprises a multilayer structure, a memory layer disposed on the multilayer structure and changeable in magnetization direction, a nonmagnetic layer disposed on the memory layer, and a reference layer disposed on the nonmagnetic layer and having a fixed magnetization direction. The multilayer structure comprises magnetic layers changeable in magnetization direction and nonmagnetic metal layers disposed on the magnetic layers.

Classes IPC  ?

  • H01L 29/82 - Types de dispositifs semi-conducteurs commandés par la variation du champ magnétique appliqué au dispositif
  • G11B 5/39 - Structure ou fabrication de têtes sensibles à un flux utilisant des dispositifs magnétorésistifs
  • H10B 61/00 - Dispositifs de mémoire magnétique, p.ex. dispositifs RAM magnéto-résistifs [MRAM]
  • H10N 50/10 - Dispositifs magnéto-résistifs

58.

IMAGE SENSOR DEVICE, METHOD AND COMPUTER PROGRAM

      
Numéro d'application 18242424
Statut En instance
Date de dépôt 2023-09-05
Date de la première publication 2024-03-28
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s)
  • Finatti, Salvatore
  • Avitabile, Antonio

Abrégé

An image sensor device includes circuitry configured to: receive an image; run a first neural network configured to detect one or more regions of interest in the image; and run a second neural network configured to determine, based on the image, whether a predetermined event has occurred; wherein when it is determined that the predetermined event has occurred, the image is output; and the circuitry is further configured such that the first neural network initiates obscuring processing to produce an obscured image in which the one or more regions of interest are obscured and the circuitry is configured to output the obscured image when it is determined that the predetermined event has not occurred.

Classes IPC  ?

  • G06V 10/25 - Détermination d’une région d’intérêt [ROI] ou d’un volume d’intérêt [VOI]
  • G06T 5/00 - Amélioration ou restauration d'image
  • G06V 10/74 - Appariement de motifs d’image ou de vidéo; Mesures de proximité dans les espaces de caractéristiques
  • G06V 10/82 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant les réseaux neuronaux
  • G06V 20/40 - RECONNAISSANCE OU COMPRÉHENSION D’IMAGES OU DE VIDÉOS Éléments spécifiques à la scène dans le contenu vidéo
  • G06V 20/62 - Texte, p.ex. plaques d’immatriculation, textes superposés ou légendes des images de télévision
  • G06V 40/16 - Visages humains, p.ex. parties du visage, croquis ou expressions
  • G06V 40/20 - Mouvements ou comportement, p.ex. reconnaissance des gestes

59.

DISTANCE MEASURING DEVICE

      
Numéro d'application 18255603
Statut En instance
Date de dépôt 2021-11-22
Date de la première publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Yoshida, Atsushi

Abrégé

A distance measuring device according to the present disclosure includes a luminescence element, a light receiving element, and a substrate. The luminescence element irradiates an object (X) with light. The light receiving element receives light from the luminescence element reflected from the object (X). The luminescence element and the light receiving element are mounted on a substrate. In addition, a bonding wire (W) electrically connecting the light receiving element and the substrate is not disposed on an edge of the light receiving element on a side of the luminescence element.

Classes IPC  ?

  • G01S 7/481 - Caractéristiques de structure, p.ex. agencements d'éléments optiques
  • G01S 7/4863 - Réseaux des détecteurs, p.ex. portes de transfert de charge

60.

INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING METHOD

      
Numéro d'application 18255701
Statut En instance
Date de dépôt 2021-10-22
Date de la première publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Machino, Yuki
  • Aoyagi, Seiichi

Abrégé

Provided is an information processing apparatus capable of improving detection accuracy of a position pointed by a target object. An acquisition unit acquires a distance image indicating a distance to each object present within a predetermined range. Subsequently, a vector calculation unit calculates a vector extending from the target object present within the predetermined range in a direction pointed by the target object on the basis of the acquired distance image. Subsequently, an intersection calculation unit calculates a position of an intersection of a predetermined surface present within the predetermined range and the calculated vector on the basis of the acquired distance image. Subsequently, a processing execution unit executes processing corresponding to the calculated position of the intersection.

Classes IPC  ?

  • G06V 10/94 - Architectures logicielles ou matérielles spécialement adaptées à la compréhension d’images ou de vidéos
  • G06F 3/042 - Numériseurs, p.ex. pour des écrans ou des pavés tactiles, caractérisés par les moyens de transduction par des moyens opto-électroniques
  • G06F 3/0488 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] utilisant des caractéristiques spécifiques fournies par le périphérique d’entrée, p.ex. des fonctions commandées par la rotation d’une souris à deux capteurs, ou par la nature du périphérique d’entrée, p.ex. des gestes en fonction de la pression exer utilisant un écran tactile ou une tablette numérique, p.ex. entrée de commandes par des tracés gestuels
  • G06T 7/73 - Détermination de la position ou de l'orientation des objets ou des caméras utilisant des procédés basés sur les caractéristiques
  • G06V 30/14 - Acquisition d’images
  • G06V 30/19 - Reconnaissance utilisant des moyens électroniques
  • G06V 30/20 - Combinaison des fonctions d’acquisition, de prétraitement ou de reconnaissance
  • G06V 40/20 - Mouvements ou comportement, p.ex. reconnaissance des gestes

61.

DISPLAY MODULE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICE

      
Numéro d'application 18264096
Statut En instance
Date de dépôt 2022-02-10
Date de la première publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Nishikawa, Hiroshi

Abrégé

Provided is a display module capable of reducing connection resistance between a mounting board and a display. Provided is a display module capable of reducing connection resistance between a mounting board and a display. A display module includes a mounting board provided with a bump, and a display mounted on the mounting board and provided with a connection terminal bonded to the bump by solid-phase diffusion bonding.

Classes IPC  ?

  • H10K 59/131 - Interconnexions, p. ex. lignes de câblage ou bornes
  • G02F 1/1362 - Cellules à adressage par une matrice active
  • H01L 33/48 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les éléments du boîtier des corps semi-conducteurs
  • H01L 33/62 - Dispositions pour conduire le courant électrique vers le corps semi-conducteur ou depuis celui-ci, p.ex. grille de connexion, fil de connexion ou billes de soudure
  • H05K 1/18 - Circuits imprimés associés structurellement à des composants électriques non imprimés
  • H10K 59/12 - Affichages à OLED à matrice active [AMOLED]

62.

IMAGING DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC APPARATUS

      
Numéro d'application 18529624
Statut En instance
Date de dépôt 2023-12-05
Date de la première publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Miyanami, Yuki
  • Okuyama, Atsushi

Abrégé

An imaging device having a superior light-shielding property for a charge-holding section is provided. The imaging device includes: an Si {111} substrate extending along a horizontal plane; a photoelectric conversion section provided in the Si {111} substrate and generating charges corresponding to a light reception amount by photoelectric conversion; a charge-holding section provided in the Si {111} substrate and holding charges transferred from the photoelectric conversion section; and a light-shielding section including a horizontal light-shielding part positioned between the photoelectric conversion section and the charge-holding section in a thickness direction and extending along the horizontal plane and a vertical light-shielding part orthogonal thereto. The horizontal light-shielding section includes a first plane along a first crystal plane of the Si {111} substrate of a plane index {111} orthogonal to the thickness direction, and a second plane along a second crystal plane of the Si {111} substrate inclined to the thickness direction.

Classes IPC  ?

63.

NON-VOLATILE STORAGE CIRCUIT

      
Numéro d'application 17766568
Statut En instance
Date de dépôt 2020-10-16
Date de la première publication 2024-03-28
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s) Hiraga, Keizo

Abrégé

A non-volatile storage circuit (10) of an embodiment includes a volatile storage unit (11) that stores information, a non-volatile storage unit (20) into which the information in the volatile storage unit is written by a store operation, and from which the information is read out to the volatile storage unit (11) by a restore operation via a restore path different from a store path in the store operation, a driver unit (12, 15) that receives a power supply and performs the store operation, and a switch unit (13, 14, 16, 17) that shuts off the power supply to the driver unit (12, 15) during the restore operation.

Classes IPC  ?

  • G11C 14/00 - Mémoires numériques caractérisées par des dispositions de cellules ayant des propriétés de mémoire volatile et non volatile pour sauvegarder l'information en cas de défaillance de l'alimentation
  • G11C 5/14 - Dispositions pour l'alimentation

64.

ELECTRONIC CIRCUIT BOARD, BASE MEMBER, ELECTRONIC EQUIPMENT, ELECTRONIC EQUIPMENT MANUFACTURING METHOD, AND ELECTRONIC CIRCUIT BOARD MANUFACTURING METHOD

      
Numéro d'application 17754819
Statut En instance
Date de dépôt 2020-10-22
Date de la première publication 2024-03-28
Propriétaire
  • SONY GROUP CORPORATION (Japon)
  • SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Ohtorii, Hiizu
  • Morita, Hiroshi
  • Oyama, Yusuke
  • Otani, Eiji
  • Kikuchi, Ken

Abrégé

The present technology relates to an electronic circuit board, a base member, electronic equipment, an electronic equipment manufacturing method and an electronic circuit board manufacturing method that make it possible to mount an electronic circuit board easily on a curved surface, for example. An electronic circuit board has a deformable wiring board having a plurality of areas that is long in one direction and is formed to be partially continuous with each other, and the plurality of areas of the wiring board is provided with deformable plate-like plate members that are more rigid than the wiring board. For example, the present technology can be applied to an electronic circuit board on which various devices are mounted.

Classes IPC  ?

  • H05K 1/18 - Circuits imprimés associés structurellement à des composants électriques non imprimés
  • H05K 1/02 - Circuits imprimés - Détails

65.

LIGHT SOURCE APPARATUS

      
Numéro d'application 17754825
Statut En instance
Date de dépôt 2020-10-22
Date de la première publication 2024-03-28
Propriétaire
  • SONY GROUP CORPORATION (Japon)
  • SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Ohtorii, Hiizu
  • Morita, Hiroshi
  • Oyama, Yusuke
  • Otani, Eiji
  • Kikuchi, Ken

Abrégé

The present technology relates to a light source apparatus that makes it possible to provide a widely applicable light source apparatus. A light source apparatus includes a transmissive board that transmits light emitted by a light-emitting element, a circuit board that drives the light-emitting element and is joined to the transmissive board, and a light-emitting board that has the light-emitting element and is connected to the circuit board via a first bump. Further, in the light source apparatus, the circuit board and an organic board are configured to be connected by sandwiching the light-emitting board via second bumps. The present technology can be applied to a light source apparatus that emits light.

Classes IPC  ?

  • H01L 27/15 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants semi-conducteurs avec au moins une barrière de potentiel ou une barrière de surface, spécialement adaptés pour l'émission de lumière
  • H01L 33/58 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les éléments du boîtier des corps semi-conducteurs Éléments de mise en forme du champ optique
  • H01L 33/64 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les éléments du boîtier des corps semi-conducteurs Éléments d'extraction de la chaleur ou de refroidissement
  • H05K 1/02 - Circuits imprimés - Détails

66.

WIRELESS COMMUNICATION DEVICE, AND METHOD FOR CONTROLLING WIRELESS COMMUNICATION DEVICE

      
Numéro d'application JP2023027701
Numéro de publication 2024/062768
Statut Délivré - en vigueur
Date de dépôt 2023-07-28
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Tanaka, Katsuyuki
  • Okamoto, Takuya

Abrégé

The present invention improves the versatility and convenience of a wireless communication device that performs positioning on the basis of signals received using a plurality of antennas. A first transmission antenna transmits a first transmission signal including one of a request relating to a positioning scheme and a response to the request. A first reception antenna receives a first satellite signal. A second reception antenna receives a first reception signal including either the other of the request and the response, or a beacon signal. A selector selects either of the first satellite signal and the first reception signal and supplies the same as a selected signal. A first quadrature detection unit performs quadrature detection with respect to the selected signal. A processing unit measures a current position on the basis of either the first satellite signal or the beacon signal.

Classes IPC  ?

  • G01S 19/36 - Récepteurs - Détails de construction ou détails de matériel ou de logiciel de la chaîne de traitement des signaux concernant l'étage d'entrée du récepteur
  • G01S 5/02 - Localisation par coordination de plusieurs déterminations de direction ou de ligne de position; Localisation par coordination de plusieurs déterminations de distance utilisant les ondes radioélectriques
  • G01S 19/31 - Acquisition ou poursuite d'autres signaux en vue du positionnement
  • H04B 1/40 - Circuits

67.

SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR MODULE, AND ELECTRONIC EQUIPMENT

      
Numéro d'application JP2023028883
Numéro de publication 2024/062789
Statut Délivré - en vigueur
Date de dépôt 2023-08-08
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Morita, Shinya

Abrégé

This semiconductor device comprises: a first compound semiconductor; a first electrode arranged on the first compound semiconductor and connected to the first compound semiconductor by Schottky contact; a second compound semiconductor arranged on the first compound semiconductor set apart from the first electrode, said second compound semiconductor having a higher impurity density than the first compound semiconductor; and a second electrode arranged on the second compound semiconductor, formed using the same conductive material as the first electrode, and connected to the second compound semiconductor by ohmic contact.

Classes IPC  ?

  • H01L 29/872 - Diodes Schottky
  • H01L 21/329 - Procédés comportant plusieurs étapes pour la fabrication de dispositifs du type bipolaire, p.ex. diodes, transistors, thyristors les dispositifs comportant une ou deux électrodes, p.ex. diodes
  • H01L 21/337 - Transistors à effet de champ à jonction PN
  • H01L 21/338 - Transistors à effet de champ à grille Schottky
  • H01L 21/822 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants le substrat étant un semi-conducteur, en utilisant une technologie au silicium
  • H01L 21/8234 - Technologie MIS
  • H01L 27/04 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur
  • H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
  • H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
  • H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
  • H01L 29/47 - Electrodes à barrière de Schottky
  • H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
  • H01L 29/808 - Transistors à effet de champ l'effet de champ étant produit par une jonction PN ou une autre jonction redresseuse à jonction PN
  • H01L 29/812 - Transistors à effet de champ l'effet de champ étant produit par une jonction PN ou une autre jonction redresseuse à grille Schottky
  • H01L 29/861 - Diodes
  • H01L 29/868 - Diodes PIN
  • H01L 29/87 - Diodes thyristor, p.ex. diodes Shockley, diodes à retournement

68.

SEMICONDUCTOR APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR APPARATUS

      
Numéro d'application JP2023029301
Numéro de publication 2024/062796
Statut Délivré - en vigueur
Date de dépôt 2023-08-10
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Shigetoshi, Takushi
  • Okamoto, Masaki
  • Hiratsuka, Tatsumasa
  • Hirano, Takaaki
  • Kugimiya, Katsuhisa
  • Matsumoto, Shun

Abrégé

Provided is a semiconductor apparatus including a semiconductor substrate having a front surface on which a wiring layer is formed, a through hole that penetrates the semiconductor substrate, a through wire formed along a side surface of the through hole, and an annular trench that surrounds a circumference of the through hole when seen in a direction perpendicular to a rear surface of the semiconductor substrate which is on a side opposite to the front surface and that has formed therein a cavity when seen in a direction parallel to a rear surface.

Classes IPC  ?

  • H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
  • H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p.ex. fils de connexion ou bornes

69.

OPTICAL DETECTING DEVICE, AND OPTICAL DETECTING SYSTEM

      
Numéro d'application JP2023029679
Numéro de publication 2024/062809
Statut Délivré - en vigueur
Date de dépôt 2023-08-17
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Yoneyama Hisashi

Abrégé

[Problem] To provide an optical detecting device and an optical detecting system capable of measuring a three-dimensional shape more quickly. [Solution] The present disclosure provides an optical detecting device comprising an imaging portion for imaging a measurement range in which a projected image including a predetermined pattern is being projected, and a signal processing portion for generating three-dimensional distance data of the measurement range on the basis of first captured image data having a first dynamic range captured by the imaging portion, and second captured image data having a second dynamic range different from the first dynamic range, wherein the signal processing portion includes a first processing portion for extracting a first feature point on the basis of the first captured image data, and a second processing portion for extracting a second feature point on the basis of the second captured image data, and the signal processing portion generates the three-dimensional distance data using at least one of the first feature point and the second feature point.

Classes IPC  ?

  • G01B 11/25 - Dispositions pour la mesure caractérisées par l'utilisation de techniques optiques pour mesurer des contours ou des courbes en projetant un motif, p.ex. des franges de moiré, sur l'objet

70.

IMAGING DEVICE AND ELECTRONIC EQUIPMENT

      
Numéro d'application JP2023029792
Numéro de publication 2024/062813
Statut Délivré - en vigueur
Date de dépôt 2023-08-18
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Takenaka Kyoichi
  • Kayashima Seiji

Abrégé

The present invention reduces the manufacturing cost by simplifying the structure of switching electronic shutter systems. Provided is an imaging device comprising: a photoelectric conversion unit that converts light to charge; an overfloat transistor that is connected to the photoelectric conversion unit; a transfer transistor that is connected to the photoelectric conversion unit; a reset transistor that is connected to the transfer transistor; a capacitor that is connected between the transfer transistor and the reset transistor; and an amplification transistor that is connected between the transfer transistor and the reset transistor.

Classes IPC  ?

  • H04N 25/40 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner
  • H04N 5/33 - Transformation des rayonnements infrarouges
  • H04N 25/77 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs

71.

SOLID-STATE IMAGING DEVICE

      
Numéro d'application JP2023030862
Numéro de publication 2024/062842
Statut Délivré - en vigueur
Date de dépôt 2023-08-28
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Takahashi Tomohiro

Abrégé

[Problem] To provide a solid-state imaging device capable of rapidly processing events. [Solution] The solid-state imaging device of the present disclosure comprises: a pixel array region that includes a plurality of pixels for detecting an event, each of the plurality of pixels belonging to any of first to Nth (N is an integer of 2 or greater) groups; first to Nth arbiters that are respectively provided for the pixels of the first to Nth groups, the Kth (K is an integer satisfying 1≦K≦N) arbiter receiving a plurality of request signals output from a plurality of pixels of the Kth group, and outputting a request signal corresponding to any of the plurality of pixels of the Kth group; and first to Nth latch portions respectively provided for the pixels of the first to Nth groups, the Kth latch portion reading a pixel value from a pixel corresponding to the request signal output from the Kth arbiter.

Classes IPC  ?

  • H04N 25/50 - Commande des paramètres d'exposition de capteurs SSIS
  • H04N 25/707 - Pixels pour la détection d’événements

72.

INFORMATION PROCESSING DEVICE, METHOD, AND PROGRAM

      
Numéro d'application JP2023032462
Numéro de publication 2024/062920
Statut Délivré - en vigueur
Date de dépôt 2023-09-06
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Ebihara Munetake

Abrégé

The present technology relates to an information processing device, method, and program that make it possible to prove the contextual relationship of data even when troubleshooting has been carried out for equipment. This information processing device generates output data that includes data being verified in regard to a contextual relationship in time, the information processing device comprising a control unit that generates output data including a hash value calculated on the basis of the whole or part of output data immediately preceding in time, the data being verified, and a plurality of types of mutually differing ID information related to the data being verified. The present technology is applicable to cameras.

Classes IPC  ?

  • G06F 16/14 - Systèmes de fichiers; Serveurs de fichiers - Détails de la recherche de fichiers basée sur les métadonnées des fichiers
  • G06F 21/64 - Protection de l’intégrité des données, p.ex. par sommes de contrôle, certificats ou signatures

73.

IMAGE PROCESSING DEVICE, IMAGE PROCESSING METHOD, AND PROGRAM

      
Numéro d'application JP2023032626
Numéro de publication 2024/062929
Statut Délivré - en vigueur
Date de dépôt 2023-09-07
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Agresti Gianluca
  • Rossi Mattia
  • Rad Saeed
  • Fujii Yusuke

Abrégé

The present disclosure pertains to an image processing device, an image processing method, and a program which enable easy generation of 3D models provided with spectral information. A spectral 3D model is generated on the basis of a RGB image group, and spectral information of a spectral image group is mapped to generate a spectral 3D model in which the spectral information is mapped to the 3D model. The present disclosure can be applied to technology for generating spectral 3D images in which spectral information is superimposed on a 3D model.

Classes IPC  ?

  • G06T 17/00 - Modélisation tridimensionnelle [3D] pour infographie
  • G06T 7/55 - Récupération de la profondeur ou de la forme à partir de plusieurs images

74.

INFORMATION PROCESSING DEVICE AND INFORMATION PROCESSING METHOD

      
Numéro d'application JP2023033196
Numéro de publication 2024/062976
Statut Délivré - en vigueur
Date de dépôt 2023-09-12
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Yamanaka, Kazuhiro

Abrégé

This information processing device comprises: a viewpoint conversion unit that converts the viewpoints of a plurality of images generated by a plurality of imaging units mounted on the front, rear, left, and right sides of a vehicle; and an overhead image generation unit that combines the plurality of images subjected to viewpoint conversion by the viewpoint conversion unit, thereby generating an overhead image. The overhead image generation unit executes a first combining process when generating a first overhead image to be displayed in the vehicle, and executes a second combining process different from the first combining process when generating a second overhead image for implementing a recognition process on the surroundings of the vehicle.

Classes IPC  ?

  • H04N 7/18 - Systèmes de télévision en circuit fermé [CCTV], c. à d. systèmes dans lesquels le signal vidéo n'est pas diffusé
  • G06T 1/00 - Traitement de données d'image, d'application générale
  • G06T 7/00 - Analyse d'image

75.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Numéro d'application JP2023034565
Numéro de publication 2024/063164
Statut Délivré - en vigueur
Date de dépôt 2023-09-22
Date de publication 2024-03-28
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Shigetoshi, Takushi
  • Okamoto, Masaki
  • Hiratsuka, Tatsumasa
  • Hirano, Takaaki
  • Kugimiya, Katsuhisa
  • Matsumoto, Shun
  • Furuhashi, Takahisa

Abrégé

Provided is a semiconductor device having an annular trench formed around a through-hole, wherein reliability is improved. In the present invention, a semiconductor device comprises a semiconductor substrate, through-wiring, a rear-surface insulating film, and an annular trench. A wiring layer is formed on the surface of the semiconductor substrate. The through-hole penetrates the semiconductor substrate. The through-wiring is formed along a side surface of the through-hole. The rear-surface insulating film covers a rear surface relative to the surface of the semiconductor substrate. The annular trench surrounds the through-hole as seen in a direction that is perpendicular to the rear surface, and has formed in an interior thereof a hollow portion that is closed by the rear-surface insulating film as seen in a direction that is parallel to the rear surface.

Classes IPC  ?

  • H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
  • H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
  • H01L 23/532 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées caractérisées par les matériaux
  • H01L 27/146 - Structures de capteurs d'images

76.

PHOTON COUNTING CIRCUITRY AND PHOTON COUNTING METHOD

      
Numéro d'application EP2023075832
Numéro de publication 2024/061925
Statut Délivré - en vigueur
Date de dépôt 2023-09-19
Date de publication 2024-03-28
Propriétaire
  • SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
  • SONY DEPTHSENSING SOLUTIONS SA/NV (Belgique)
Inventeur(s) Ding, Qing

Abrégé

The present disclosure generally pertains to photon counting circuitry (11), configured to: determine, based on a degree of overlap in time of at least two pixel signals (CLK1, CLK2) of at least two pixels (SPAD1, SPAD2) of a photon counting time-of-flight sensor (10), whether a signal coincidence of the at least two pixel signals (CLK1, CLK2) is present, for setting a counting operation mode to a coincidence counting operation mode, if the signal coincidence is present, wherein counts of the at least two pixel signals are counted together in the coincidence counting operation mode; and generate a coincidence counting signal (YES) for setting the counting operation mode to the coincidence counting operation mode. Preferably, the coincidence counting signal corresponds to that pixel signal of the at least two pixel signals (CLK1, CLK2) which is later in time. For example, only one count would be recorded when there is no coincidence detection. However, a count number of a common counter may be multiplied by two to reproduce the real event number. Thereby, more counts may be accumulated which may optimize a signal to noise ratio. Moreover, silicon area may be saved by accounting for a correlation between/among adjacent/neighboring pixels in the sensor. It is made use of this correlation to save the total counter bit length of two or more pixels in a pixel group. Hence, this temporal correlation may be determined and coincident counts may be dynamically stored into a common (shared) counter.

Classes IPC  ?

  • G01S 7/4865 - Mesure du temps de retard, p.ex. mesure du temps de vol ou de l'heure d'arrivée ou détermination de la position exacte d'un pic
  • G01S 17/894 - Imagerie 3D avec mesure simultanée du temps de vol sur une matrice 2D de pixels récepteurs, p.ex. caméras à temps de vol ou lidar flash

77.

SOLID-STATE IMAGING ELEMENT AND METHOD OF MANUFACTURING SAME

      
Numéro d'application 18257874
Statut En instance
Date de dépôt 2021-11-09
Date de la première publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Kato, Akihiko
  • Kurobe, Toshihiro
  • Honjo, Akiko
  • Baba, Koichi
  • Kimizuka, Naohiko
  • Hirose, Yohei
  • Kataoka, Toyotaka
  • Toyofuku, Takuya

Abrégé

There is provided a solid-state imaging element capable of increasing a channel area of a pixel transistor and reducing a parasitic capacitance of a gate. A solid-state imaging element is a solid-state imaging element including pixels that photoelectrically convert incident light, and includes a substrate on which the pixels are provided, a first transistor provided in the pixels and including a first gate electrode portion embedded in a first direction from a first surface of the substrate toward a second surface of the substrate opposite to the first surface, a first gate insulating film provided between an active region of the substrate in which a channel of the first transistor is formed and a first side surface of the first gate electrode portion facing the active region, and a first insulating film provided on a second side surface of the first gate electrode portion other than the first side surface and thicker than the first gate insulating film, in which a depth of the first insulating film from the first surface to the second surface of the substrate is substantially the same as or deeper than a depth of the first gate electrode portion, and a width of an upper surface of the first gate electrode portion is wider than a width of a bottom surface of the first gate electrode portion in a cross section in the first direction.

Classes IPC  ?

78.

OPTICAL DETECTION DEVICE AND ELECTRONIC APPARATUS

      
Numéro d'application 18264123
Statut En instance
Date de dépôt 2021-12-24
Date de la première publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Motokubota, Masaya

Abrégé

Provided is an optical detection device capable of obtaining an image with higher image quality. The optical detection device includes a plurality of color filters arranged in a two-dimensional array and a substrate including a plurality of photoelectric conversion units on which light passing through the color filters is incident. Then, the optical detection device has a configuration where an angle formed by a light receiving surface of the substrate and color filters (outer color filters) located outside a central portion of the two-dimensional array (color filter array) is different from an angle formed by the light receiving surface of the substrate and a color filter (central portion color filter) located at the central portion such that the outer color filters are inclined toward the central portion relative to the central portion color filter.

Classes IPC  ?

  • G02B 5/20 - Filtres
  • H04N 25/13 - Agencement de matrices de filtres colorés [CFA]; Mosaïques de filtres caractérisées par les caractéristiques spectrales des éléments filtrants

79.

SOLID-STATE IMAGE PICKUP APPARATUS AND ELECTRONIC EQUIPMENT

      
Numéro d'application 18476776
Statut En instance
Date de dépôt 2023-09-28
Date de la première publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Ammo, Hiroaki
  • Ejiri, Hirokazu
  • Honjo, Akiko

Abrégé

A solid-state image pickup apparatus according to a first aspect of the present technology includes a photoelectric conversion section that generates and holds a charge in response to incident light, a transfer section that includes a V-NW transistor (Vertical Nano Wire transistor) and transfers the charge held in the photoelectric conversion section, and an accumulation section that includes a wiring layer connected to a drain of the transfer section including the V-NW transistor and accumulates the charge transferred by the transfer section. The present technology is applicable to a CMOS image sensor, for example.

Classes IPC  ?

  • H01L 27/146 - Structures de capteurs d'images
  • H01L 27/118 - Circuits intégrés à tranche maîtresse
  • H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
  • H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
  • H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
  • H10K 39/32 - Capteurs d'images organiques

80.

PHOTODETECTION DEVICE, METHOD FOR PRODUCING SAME, AND ELECTRONIC APPARATUS

      
Numéro d'application JP2022034521
Numéro de publication 2024/057470
Statut Délivré - en vigueur
Date de dépôt 2022-09-15
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Hattori Hiroyuki

Abrégé

The present disclosure relates to: a photodetection device which enables the achievement of a photoelectric conversion unit that has high quantum efficiency in an infrared region; a method for producing this photodetection device; and an electronic apparatus. This photodetection device comprises: a silicon germanium layer that is provided with a photoelectric conversion unit; an inter-pixel light-blocking film that is formed on a first surface side of the silicon germanium layer, the first surface side being the light incident surface side; and a MOS transistor that is formed on a second surface side of the silicon germanium layer, the second surface being on the reverse side of the first surface. The silicon germanium layer is formed so as to have a constant germanium concentration. This technology can be applied, for example, to a ToF sensor or an imaging sensor.

Classes IPC  ?

  • H01L 27/146 - Structures de capteurs d'images
  • H04N 25/70 - Architectures de capteurs SSIS; Circuits associés à ces dernières

81.

TERMINAL, COMMUNICATION SYSTEM, AND TERMINAL SYNCHRONIZATION METHOD

      
Numéro d'application JP2023026739
Numéro de publication 2024/057719
Statut Délivré - en vigueur
Date de dépôt 2023-07-21
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Kitayama, Hideya
  • Nakahara, Kentaro

Abrégé

The purpose of the present invention is to, in a communication system comprising a plurality of terminals, ascertain a power supply state of each of the terminals to make power consumption for each terminal uniform, thereby achieving conservation of electric power for the system as a whole. A power supply state assessment information acquisition unit acquires power supply state assessment information for assessing the power supply state of a terminal. A power supply state assessment information communication unit performs communication for mutually exchanging power supply state assessment information with another terminal. A representative terminal determination unit determines a representative terminal on the basis of the power supply state assessment information of the terminal and the other terminal. When the terminal corresponds to the representative terminal, a reference signal reception unit receives a reference signal necessary for synchronization and generates time information. A time information communication unit transmits the time information to the other terminal when the terminal corresponds to the representative terminal, and receives the time information from the representative terminal when the terminal does not correspond to the representative terminal.

Classes IPC  ?

  • H04W 52/02 - Dispositions d'économie de puissance
  • G01S 19/14 - Récepteurs spécialement adaptés pour des applications spécifiques
  • G01S 19/34 - Consommation électrique
  • G16Y 10/05 - Agriculture
  • G16Y 20/10 - Information détectée ou collectée par les objets relative à l’environnement, p.ex. la température; relative à l’emplacement
  • H04W 24/02 - Dispositions pour optimiser l'état de fonctionnement
  • H04W 56/00 - Dispositions de synchronisation
  • H04W 92/18 - Interfaces entre des dispositifs hiérarchiquement similaires entre des dispositifs terminaux

82.

IMAGING DEVICE AND ELECTRONIC APPARATUS

      
Numéro d'application JP2023027050
Numéro de publication 2024/057724
Statut Délivré - en vigueur
Date de dépôt 2023-07-24
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Takahashi, Seiki
  • Noudo, Shinichiro
  • Watanabe, Maho
  • Ikehara, Shigehiro

Abrégé

[Problem] To further improve the separation ratio between a plurality of subpixels included in a pixel. [Solution] This imaging device comprises: a semiconductor substrate that includes photoelectric conversion sections provided respectively for two-dimensionally arranged pixels, and a pixel separation section that separates the photoelectric conversion sections from each other; color filters and on-chip lenses provided respectively for the pixels on one surface of the semiconductor substrate; an inter-filter separation section that is provided between the color filters to include a low-refractive-index material having a refractive index lower than that of the color filters, and that separates the color filters by pixel; and a sub-pixel separation section that separates, by sub-pixel, the photoelectric conversion sections of the pixels each including a plurality of sub-pixels.

Classes IPC  ?

  • H01L 27/146 - Structures de capteurs d'images
  • H04N 25/70 - Architectures de capteurs SSIS; Circuits associés à ces dernières

83.

INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND PROGRAM

      
Numéro d'application JP2023031090
Numéro de publication 2024/057904
Statut Délivré - en vigueur
Date de dépôt 2023-08-29
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Ikeya Kensuke

Abrégé

The present technology relates to an information processing device, an information processing method, and a program that enable accurate estimation of a distance value. An information processing device according to the present technology comprises a cost volume generation unit that generates a cost volume indicating a probability distribution of distances to an object shown in each pixel of a captured image on the basis of ranging data acquired by a ToF sensor. The present technology can be applied to an information processing system that upsamples distance values acquired by a ToF sensor, for example.

Classes IPC  ?

  • G01S 17/86 - Combinaisons de systèmes lidar avec des systèmes autres que lidar, radar ou sonar, p.ex. avec des goniomètres
  • G01S 17/89 - Systèmes lidar, spécialement adaptés pour des applications spécifiques pour la cartographie ou l'imagerie

84.

SEMICONDUCTOR DEVICE

      
Numéro d'application JP2023031772
Numéro de publication 2024/057949
Statut Délivré - en vigueur
Date de dépôt 2023-08-31
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Taura Tadayuki

Abrégé

The present disclosure relates to a semiconductor device that can be individually identified with a simpler configuration. The semiconductor device according to the present disclosure includes a main chip and at least one subchip that is stacked on one surface of the main chip and is smaller in size than the main chip. The subchip includes an ID chip having ID information that is capable of being identified without contact. The present disclosure can be applied to a stacked semiconductor device.

Classes IPC  ?

  • H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives

85.

PHOTODETECTOR AND ELECTRONIC APPLIANCE

      
Numéro d'application JP2023031773
Numéro de publication 2024/057950
Statut Délivré - en vigueur
Date de dépôt 2023-08-31
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Hasegawa Kenta
  • Moriya Yusuke

Abrégé

This technique relates to: a photodetector which makes it possible to improve the reliability of light condensation designs; and an electronic appliance. A photodetector according to one aspect of this technique comprises a semiconductor substrate having a photoelectric conversion part, a spacer layer disposed on the semiconductor substrate, a metasurface layer disposed on the spacer layer, and a sidewall-protecting film disposed at least on a sidewall of the spacer layer. This technique is applicable to image sensors equipped with metasurface layers.

Classes IPC  ?

86.

PHOTODETECTION ELEMENT AND ELECTRONIC APPARATUS

      
Numéro d'application JP2023032306
Numéro de publication 2024/057995
Statut Délivré - en vigueur
Date de dépôt 2023-09-05
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Mochizuki Futa
  • Niwa Atsumi
  • Yamada Kohei
  • Niida Yoshitaka
  • Imai Yotaro

Abrégé

[Problem] To enable pixels to be reduced in size as compared with the prior art and enable on/off switching control to be carried out for each function. [Solution] This photodetection element comprises a photoelectric conversion element that stores electric charges corresponding to the luminous energy of incident light, and a pixel circuit that outputs a pixel signal corresponding to the electric charge stored in the photoelectric conversion element, the pixel circuit including at least one current path and at least two current cutoff switching units that switch whether the current path is cut off.

Classes IPC  ?

  • H04N 25/44 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en lisant partiellement une matrice de capteurs SSIS
  • H04N 25/47 - Capteurs d'images avec sortie d'adresse de pixel; Capteurs d'images commandés par événement; Sélection des pixels à lire en fonction des données d'image
  • H04N 25/707 - Pixels pour la détection d’événements

87.

DISPLAY DEVICE AND ELECTRONIC APPARATUS

      
Numéro d'application JP2023026567
Numéro de publication 2024/057712
Statut Délivré - en vigueur
Date de dépôt 2023-07-20
Date de publication 2024-03-21
Propriétaire
  • SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
  • SONY GROUP CORPORATION (Japon)
Inventeur(s)
  • Yokoyama, Kazuki
  • Tsuchiya, Haruki

Abrégé

One purpose of the present invention is to improve contrast. The present invention is a display device comprising a pixel circuit that includes: a light-emitting element; a first transistor for supplying a current based on a pixel signal to the light-emitting element; and a second transistor for settingthe potential of an anode of the light-emitting element to an initialization potential when ON, wherein during the period when the light-emitting element is emitting light, the second transistor is turned ON at least once.

Classes IPC  ?

  • G09G 3/3233 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p.ex. utilisant des diodes électroluminescentes [LED] organiques, p.ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active avec un circuit de pixel pour commander le courant à travers l'élément électroluminescent
  • G09F 9/30 - Dispositifs d'affichage d'information variable, dans lesquels l'information est formée sur un support, par sélection ou combinaison d'éléments individuels dans lesquels le ou les caractères désirés sont formés par une combinaison d'éléments individuels
  • G09G 3/20 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice

88.

NFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING APPARATUS

      
Numéro d'application 18262282
Statut En instance
Date de dépôt 2022-01-04
Date de la première publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Ishii, Michito
  • Onuki, Ryotaro

Abrégé

The present disclosure relates to an information processing system, an information processing method, and an information processing apparatus that obtain a more accurate distance. A first angle detection section detects a first reception angle of a signal in a first apparatus that is received from a transmitter. A second angle detection section detects a second reception angle of the signal in a second apparatus. A distance calculation section calculates distance information regarding a distance to the transmitter according to the first reception angle, the second reception angle, and the inter-apparatus distance between the first apparatus and the second apparatus. The technology according to the present disclosure is applicable, for example, to TWS based on the use of BLE.

Classes IPC  ?

  • G01S 5/04 - Position de source déterminée par plusieurs radiogoniomètres espacés
  • G06F 3/16 - Entrée acoustique; Sortie acoustique
  • H04R 1/10 - Ecouteurs; Leurs fixations

89.

IMAGE SENSOR AND ELECTRONIC DEVICE

      
Numéro d'application 18264159
Statut En instance
Date de dépôt 2022-01-06
Date de la première publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Hiyoshi, Ren

Abrégé

The present disclosure relates to an image sensor and an electronic device capable of further improving performance. An image sensor includes: a photoelectric conversion unit provided for each of a plurality of pixels arranged in a matrix on a sensor surface; a TG transistor that transfers a charge generated by photoelectric conversion in the photoelectric conversion unit to an FD node; and a TGD transistor that transfers a charge generated by photoelectric conversion in the photoelectric conversion unit to an SN node. In addition, at least a part of a predetermined number of the pixels included in an intensity sharing unit that shares and uses the FD node and a predetermined number of the pixels included in an event sharing unit that shares and uses the SN node have different sharing destinations. The present technology can be applied to, for example, an image sensor that detects occurrence of an event and acquires an image.

Classes IPC  ?

  • H04N 25/77 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
  • H01L 27/146 - Structures de capteurs d'images
  • H04N 25/47 - Capteurs d'images avec sortie d'adresse de pixel; Capteurs d'images commandés par événement; Sélection des pixels à lire en fonction des données d'image

90.

SEMICONDUCTOR DEVICE, IMAGING DEVICE, AND MANUFACTURING METHOD

      
Numéro d'application 18264790
Statut En instance
Date de dépôt 2022-01-06
Date de la première publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Shigetoshi, Takushi

Abrégé

The present technology relates to a semiconductor device, an imaging device, and a manufacturing method capable of forming a via connected to wirings at different depths so as not to cause a defect. The present technology relates to a semiconductor device, an imaging device, and a manufacturing method capable of forming a via connected to wirings at different depths so as not to cause a defect. A plurality of vias is provided, and an aspect ratio defined by a depth and a width of the via is substantially the same in the plurality of vias. The via is connected to the wiring in the wiring layer constituting the chip. The plurality of vias includes a first via that penetrates a chip stacked in the wiring layer and a second via that does not penetrate the chip. The present technology can be applied to, for example, a chip on which a solid-state imaging element is formed and an imaging element in which other chips are stacked.

Classes IPC  ?

91.

CONFIGURATION CONTROL CIRCUITRY AND CONFIGURATION CONTROL METHOD

      
Numéro d'application 18275808
Statut En instance
Date de dépôt 2022-02-08
Date de la première publication 2024-03-21
Propriétaire Sony Semiconductor Solutions Corporation (Japon)
Inventeur(s)
  • Demaeyer, Jonathan
  • Amaya-Benitez, Manuel
  • Dehan, Morin
  • Cambareri, Valerio

Abrégé

A configuration control circuitry for a time-of-flight system, the time-of-flight system including an illumination source configured to emit light to a scene and an image sensor configured to generate image data representing a time-of-flight measurement of light reflected from the scene.

Classes IPC  ?

  • G01S 17/894 - Imagerie 3D avec mesure simultanée du temps de vol sur une matrice 2D de pixels récepteurs, p.ex. caméras à temps de vol ou lidar flash
  • G01S 7/487 - Extraction des signaux d'écho désirés

92.

PHOTOELECTRIC CONVERSION ELEMENT, SOLID-STATE IMAGING ELEMENT, AND RANGING SYSTEM

      
Numéro d'application JP2022034522
Numéro de publication 2024/057471
Statut Délivré - en vigueur
Date de dépôt 2022-09-15
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Maekawa, Nobue

Abrégé

A photoelectric conversion element according to one aspect of the present disclosure comprises a semiconductor layer that is a SiGe layer or a Ge layer and a photodiode formed in the semiconductor layer. This solid-state imaging element further comprises a transistor and a Si layer. The transistor has a source region and a drain region in the semiconductor layer and has a gate electrode in contact with the semiconductor layer via a gate insulating film. The Si layer is formed at the interface between the semiconductor layer and the gate insulating film.

Classes IPC  ?

  • H01L 27/146 - Structures de capteurs d'images
  • H04N 25/70 - Architectures de capteurs SSIS; Circuits associés à ces dernières

93.

SEMICONDUCTOR PACKAGE AND ELECTRONIC DEVICE

      
Numéro d'application JP2023026524
Numéro de publication 2024/057709
Statut Délivré - en vigueur
Date de dépôt 2023-07-20
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Koyama, Toshiki
  • Miyaki, Harumi
  • Kumon, Satoshi

Abrégé

Provided is a semiconductor package which bonds a substrate to a support body by means of an adhesive, wherein the adhesive is suppressed from flowing out of the specified area. The semiconductor package comprises a substrate, a semiconductor chip, a support body, and a first adhesive. In this semiconductor package, the semiconductor chip is placed on the substrate plane of the substrate and electrically connected to the substrate. In addition, in the semiconductor package, a portion of the first adhesive flows into a gap between the substrate plane and the semiconductor chip and bonds the substrate to the support body.

Classes IPC  ?

  • H01L 23/12 - Supports, p.ex. substrats isolants non amovibles
  • H01L 23/02 - Conteneurs; Scellements
  • H01L 27/146 - Structures de capteurs d'images
  • H04N 25/70 - Architectures de capteurs SSIS; Circuits associés à ces dernières

94.

ELECTRONIC DEVICE AND IMAGING APPARATUS

      
Numéro d'application JP2023027100
Numéro de publication 2024/057729
Statut Délivré - en vigueur
Date de dépôt 2023-07-25
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Tokito, Toshihiro
  • Owaki, Hirofumi
  • Tanaka, Haruki

Abrégé

This electronic device comprises: a first chassis that is made of an electrically conductive material and includes a first base portion and a first side wall and a second side wall that are provided on the first base portion and are opposite each other in any one direction orthogonal to a first direction, the first chassis having a box portion for housing a substrate unit; a first case that includes a bottom surface and a first opening portion opposing each other in the first direction, the first case housing the first chassis so that the first base portion opposes the bottom surface in the first direction, the first case achieving electrical connection of the first side wall and the second side wall when at least one of the first side wall and the second side wall is pressed by the inner surface of the first case in at least the any one direction orthogonal to the first direction; and a second case that includes a second opening portion that is joined to the first opening portion, and fixes the first chassis and the second chassis so that the first chassis and the second chassis are electrically connected in a state in which the first opening portion and the second opening portion are joined in the first direction.

Classes IPC  ?

  • H05K 9/00 - Blindage d'appareils ou de composants contre les champs électriques ou magnétiques
  • G02B 7/02 - Montures, moyens de réglage ou raccords étanches à la lumière pour éléments optiques pour lentilles
  • G03B 15/00 - Procédés particuliers pour prendre des photographies; Appareillage à cet effet
  • G03B 17/02 - Corps d'appareils
  • G03B 30/00 - Modules photographiques comprenant des objectifs et des unités d'imagerie intégrés, spécialement adaptés pour être intégrés dans d'autres dispositifs, p.ex. des téléphones mobiles ou des véhicules
  • H04N 23/50 - Caméras ou modules de caméras comprenant des capteurs d'images électroniques; Leur commande - Détails de structure
  • H05K 5/00 - Enveloppes, coffrets ou tiroirs pour appareils électriques
  • H05K 5/04 - Enveloppes métalliques

95.

IMAGING ELEMENT AND ELECTRONIC DEVICE

      
Numéro d'application JP2023027181
Numéro de publication 2024/057732
Statut Délivré - en vigueur
Date de dépôt 2023-07-25
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Komatsu, Yoshihide
  • Date, Koshiro
  • Tagami, Hiroyasu

Abrégé

The present invention achieves a low power consumption of an imaging element installed in an electronic device such as a smartphone. An imaging element according to the present technology comprises: an analog circuit part including pixels that perform photoelectric conversion; a logic circuit part that processes signals read out from the pixels; a body electric potential generation part that applies a body electric potential in a direction of reducing a threshold voltage to a well of each of transistors forming the logic circuit part, the well being doped so as to enclose a transistor structure; and a control part that controls the body electric potential for each externally specified operation mode.

Classes IPC  ?

  • H04N 25/70 - Architectures de capteurs SSIS; Circuits associés à ces dernières
  • H04N 25/709 - Circuits de commande de l'alimentation électrique

96.

LIGHT DETECTION DEVICE AND ELECTRONIC APPARATUS

      
Numéro d'application JP2023027431
Numéro de publication 2024/057735
Statut Délivré - en vigueur
Date de dépôt 2023-07-26
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Takase Hiroaki

Abrégé

The present invention provides a light detection device which is capable of suppressing optical color mixing because of the light reflected by a partition wall part between color filters. Specifically, this light detection device has a configuration that comprises: a semiconductor substrate which is provided with a plurality of photoelectric conversion parts; a color filter layer which comprises a plurality of color filters that are arranged on the light incident surface side of the semiconductor substrate, and a partition wall part that is arranged between the color filters, while being formed of a material that has a lower refractive index than the color filters; a plurality of microlenses which are arranged on the light incident surface side of the color filter layer; and a high-refractive-index structure which is arranged on the optical path of the light collected by the microlenses. In addition, the high-refractive-index structure is formed of a material that has a higher refractive index than a member which is in contact with the light incident surface of the high-refractive-index structure.

Classes IPC  ?

97.

LIGHT DETECTION DEVICE, METHOD FOR MANUFACTURING LIGHT DETECTION DEVICE, AND ELECTRONIC APPARATUS

      
Numéro d'application JP2023027645
Numéro de publication 2024/057739
Statut Délivré - en vigueur
Date de dépôt 2023-07-27
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Kodama Yoshinori
  • Honda Takayoshi
  • Inoue Toshinori

Abrégé

Provided is a light detection device that can reduce the number of steps for a pixel separation part and reduce light scattering in a pixel structure forming an on-chip lens for each of a plurality of pixels. The light detection device comprises a semiconductor substrate, a pixel separation part, and an on-chip lens. The pixel separation part is provided on the semiconductor substrate and separates adjacent pixels from each other. The on-chip lens is disposed in every pixel group composed of two or more pixels on a light incident surface side of the semiconductor substrate, and condenses light from outside onto the pixel groups. The pixel separation part includes an intra-pixel group separation part disposed between adjacent pixels of the pixel groups and having a first dug region extending in the thickness direction of the semiconductor substrate, and a second dug region differing from the first dug region at a position where light is condensed by the on-chip lens. In the intra-pixel separation part, the width of the second dug region is formed narrower than the width of the first dug region in a plan view.

Classes IPC  ?

  • H01L 27/146 - Structures de capteurs d'images
  • H04N 25/70 - Architectures de capteurs SSIS; Circuits associés à ces dernières

98.

IMAGING ELEMENT AND ELECTRONIC DEVICE

      
Numéro d'application JP2023029557
Numéro de publication 2024/057805
Statut Délivré - en vigueur
Date de dépôt 2023-08-16
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Kawamura, Tomohiko
  • Uchida, Tetsuya

Abrégé

An imaging element according to an embodiment of the present disclosure comprises: a semiconductor substrate having a photoelectric conversion part for each pixel; one or more pixel transistors provided on one surface of the semiconductor substrate; and a first element separation part and a second element separation part that are embedded in the one surface of the semiconductor substrate, that delimit active regions of the one or more pixel transistors, and that have different depths. In the one or more pixel transistors, a portion of gate electrodes is embedded in at least one of the first and second element separation parts at a different depth.

Classes IPC  ?

  • H01L 27/146 - Structures de capteurs d'images
  • H04N 25/70 - Architectures de capteurs SSIS; Circuits associés à ces dernières

99.

IMAGING DEVICE AND ELECTRONIC APPARATUS

      
Numéro d'application JP2023029558
Numéro de publication 2024/057806
Statut Délivré - en vigueur
Date de dépôt 2023-08-16
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s) Shiihara, Yu

Abrégé

The imaging device according to one embodiment of the present disclosure comprises: a semiconductor substrate having a first surface and a second surface facing each other, and a pixel array unit in which a plurality of unit pixels are arranged in an array in the row direction and the column direction; a photoelectric conversion unit that is provided on the second surface side of the semiconductor substrate for each unit pixel and generates a charge according to the amount of received light by photoelectric conversion; a charge holding unit provided on the first surface side of the semiconductor substrate for each unit pixel and holding charges transferred from the photoelectric conversion unit; and a first light-shielding unit provided on the semiconductor substrate, located between the photoelectric conversion unit and the charge holding unit, and that includes a first horizontal light-shielding part extending in the in-plane direction of the semiconductor substrate and a first vertical light-shielding part orthogonal to the first horizontal light-shielding portion, wherein the first vertical light-shielding part consists of a first row light-shielding part and a first column light-shielding part formed respectively along two adjacent sides of a rectangular unit pixel, and is provided for each unit pixel located in every other column and diagonally at 45°, and in plan view, the first horizontal light-shielding part is the end portion located at or near the intersection of the first row light-shielding part and the first column light-shielding part provided for each unit pixel located in every other column and diagonally at 45°.

Classes IPC  ?

  • H04N 25/62 - Détection ou réduction du bruit dû aux charges excessives produites par l'exposition, p. ex. les bavures, les éblouissements, les images fantômes, la diaphonie ou les fuites entre les pixels
  • H04N 25/70 - Architectures de capteurs SSIS; Circuits associés à ces dernières
  • H01L 27/146 - Structures de capteurs d'images

100.

IMAGING DEVICE, IMAGING SYSTEM, AND IMAGING DEVICE DRIVING METHOD

      
Numéro d'application JP2023029594
Numéro de publication 2024/057810
Statut Délivré - en vigueur
Date de dépôt 2023-08-16
Date de publication 2024-03-21
Propriétaire SONY SEMICONDUCTOR SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Ishikawa, Tatsuya
  • Hanzawa, Katsuhiko

Abrégé

An imaging device according to one embodiment of the present disclosure comprises a first photoelectric conversion unit, a first floating diffusion, a first transfer transistor, a first readout circuit, and a voltage control unit. The voltage control unit is capable of executing control for supplying a first voltage to the first readout circuit, when a first signal is read out with the first transfer transistor in an off state, and is capable of executing control for supplying, to the first readout circuit, a second voltage lower than the first voltage, when the first signal is read out with the first transfer transistor in an on state.

Classes IPC  ?

  • H04N 25/70 - Architectures de capteurs SSIS; Circuits associés à ces dernières
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