Produits et services

Robotic exoskeleton suits being machines, other than for medical purposes; wearable exoskeleton suits being machines, other than for medical purposes; household robots for personal use; walking assistive robots, other than for medical purposes; robots for games (machines). Downloadable and recorded software for controlling robots; downloadable computer software for operating physical robots; downloadable software for robots, robotic exoskeleton suits, electronic sports training simulators and therapeutic devices for aiding in mobility, in the nature of an application for use by individuals participating in exercise, physical training, and exercise instruction for detecting, storing and reporting physical activity level and for developing and monitoring personal activity and exercise plans, and training goals; teaching robots; wearable robots, namely, robotic exoskeleton and human to machine hand, limb, and body enhancement wearables that allow improved physical capabilities and interfacing with virtual and augmented realities and not for medical purposes; sports training simulators; humanoid robots with artificial intelligence for use in scientific research; wearable activity trackers, namely, wearable robotic exoskeleton suits with software for detecting, storing and reporting physical activity level and for developing and monitoring personal activity and exercise plans, and training goals. Robotic exoskeleton suits for medical purposes; body rehabilitation apparatus for medical purposes; wearable walking assistive robots for medical purposes; therapeutic devices for aiding in mobility in humans, namely, verticalization devices in the nature of exoskeleton suits, exercise machines for therapeutic purposes, electronic stimulation apparatus for muscles for physical therapy purposes, robotic or mechanical devices to emulate gait, namely, exoskeleton suits, walking robots, braces for limbs, orthopedic apparatus; exercise simulating apparatus for medical purposes; apparatus for use in exercising muscles for medical use; computer controlled exercise apparatus for therapeutic use; apparatus for achieving physical fitness [for medical use]; wearable monitors used to measure biometric data for medical use, namely, robotic exoskeleton suits, body rehabilitation apparatus, wearable walking assistive robots, exercise machines for therapeutic purposes, electronic stimulation apparatus for muscles for physical therapy purposes, and exercise simulating apparatus. Body-training apparatus; sports equipment, namely, lower body alignment apparatus; vibrating apparatus used in fitness and exercise programs to stimulate muscles and increase strength and physical performance; exercise machines; toy robots; adhesive abdominal exercise belts, electric, for muscle stimulation; electric muscle stimulation bodysuits for sports. Physical fitness training services; personal trainer services [fitness training]; conducting fitness classes; providing information about exercise and fitness via a website, all of the preceding services offered to consumers utilizing robotic exoskeleton suits, body rehabilitation apparatus, wearable walking assistive robots, exercise machines for therapeutic purposes, electronic stimulation apparatus for muscles for physical therapy purposes, or exercise simulating apparatus.

Produits et services

Notebook computers; tablet computers.

Abrégé

A superconducting quantum interferometric device (SQUID) includes: a conductive material region formed on a partial region of a substrate; a first superconducting material layer including a first loop including first and second extension units that are spaced apart from each other to form a proximity Josephson junction and that form a stack structure with the conductive material region; a second superconducting material layer including a second loop including first and second end units spaced apart from each other; and a tunnel Josephson junction formed by a stack structure including a tunnel thin film layer forming and the first and second end units, wherein at least a portion of the second loop forms a stack structure with the first loop.

Classes IPC  ?

• H10N 69/00 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comportant au moins un élément supraconducteur couvert par le groupe

Abrégé

Embodiments herein disclose methods and devices for managing data traffic on a receiver. A method disclosed herein includes detecting, by a receiver, at least one out of order radio link control (RLC) protocol data unit (PDU) in a plurality of RLC PDUs received from a transmitter, performing, by the receiver, a recovery action based on a Packet Data Convergence Protocol (PDCP) reordering time to recover the at least one out of order RLC PDU; and causing, by the receiver, an RLC layer to send a plurality of RLC service data units (SDUs) to a higher layer after the performing the recovery action, the plurality of RLC SDUs corresponding to the plurality of RLC PDUs.

Classes IPC  ?

• H04W 76/19 - Rétablissement de connexion
• H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission

Abrégé

The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. Embodiments herein is to provide a method for providing user consent for UE in a 5G network (1000) by a UE (300). The method includes receiving a request message from a network apparatus (200) to check with the UE (300) whether the network apparatus (200) can provide subscribed event information to a NWDAF (100). The request message includes the subscribed event information and a consumer NF ID to obtain consent from the UE (300). Further, the method includes determining, by the UE (300), using the preconfigured data whether a consent can be provided for the subscribed event information to the NWDAF (100). Further, the method includes sending, by the UE (300), a response message to the network apparatus (200), wherein the response message comprises a consent indication allowing the network apparatus (200) to provide the subscribed event information to the NWDAF (100).

Classes IPC  ?

• H04W 8/18 - Traitement de données utilisateur ou abonné, p.ex. services faisant l'objet d'un abonnement, préférences utilisateur ou profils utilisateur; Transfert de données utilisateur ou abonné
• H04L 41/082 - Réglages de configuration caractérisés par les conditions déclenchant un changement de paramètres la condition étant des mises à jour ou des mises à niveau des fonctionnalités réseau

Abrégé

The present disclosure provides power supply apparatuses and controlling methods thereof. In some embodiments, a power supply apparatus includes a power factor correction (PFC) circuit, and a control circuit configured to control the PFC circuit. The PFC circuit includes a power inputter configured to receive alternating current voltage to be rectified, an inductor having an end coupled to an end of the power inputter, a first switching element configured to be turned on and off according to a first control signal, a second switching element configured to be turned on and off according to a second control signal, and an outputter configured to output a direct current voltage through an output capacitor. The control circuit is further configured to respectively apply the first and second control signals to the first and second switching elements such that the first and the second switching elements are alternately turned on.

Classes IPC  ?

• H02M 1/42 - Circuits ou dispositions pour corriger ou ajuster le facteur de puissance dans les convertisseurs ou les onduleurs
• H02M 1/38 - Moyens pour empêcher la conduction simultanée de commutateurs

Abrégé

A high endurance persistent storage device. In some embodiments, the persistent storage device includes: a controller circuit; persistent storage media, connected to the controller circuit; nonvolatile memory, connected to the controller circuit; and volatile memory, connected to the controller circuit.

Classes IPC  ?

• G06F 3/06 - Entrée numérique à partir de, ou sortie numérique vers des supports d'enregistrement

Abrégé

An electrostatic discharge clamp circuit includes a resistor connected between a first node and a second node, a first capacitor connected between the second node and a third node, a second capacitor connected between a fourth node and the third node, a third capacitor connected between a fifth node and the third node, a first inverter providing a power supply voltage or a voltage of the fourth node based on a voltage of the second node, a second inverter providing an output voltage of the first inverter or a voltage of the fifth node based on the voltage of the fourth node, a third inverter configured to provide an output voltage of the second inverter or the ground voltage based on the voltage of the fifth node.

Classes IPC  ?

• H02H 9/04 - Circuits de protection de sécurité pour limiter l'excès de courant ou de tension sans déconnexion sensibles à un excès de tension

Abrégé

A semiconductor memory device includes a memory cell array with a plurality of rows of memory cells therein, and a row hammer management (RHM) circuit including a hammer address queue. The RHM circuit is configured to: (i) receive first access row addresses from an external memory controller during a reference time interval, (ii) store a first row address randomly selected from the first access row addresses and second row addresses consecutively received from the memory controller after selecting the first row address, in the hammer address queue as candidate hammer addresses, and (iii) sequentially output the candidate hammer addresses as a hammer address. A refresh control circuit is provided to receive the hammer address and to perform a hammer refresh operation on one or more victim memory cell rows, which are physically adjacent to a memory cell row corresponding to the hammer address.

Classes IPC  ?

• G11C 11/406 - Organisation ou commande des cycles de rafraîchissement ou de régénération de la charge
• G06F 12/02 - Adressage ou affectation; Réadressage

Abrégé

An electronic device including: a connector including a voltage terminal; a battery; a corruption detection circuit configured to detect whether the connector is corrupted; a voltage cutoff circuit configured to electrically connect the voltage terminal with an internal node when corruption of the connector is not detected by the corruption detection circuit and to electrically disconnect the voltage terminal from the internal node when the corruption is detected by the corruption detection circuit; a charging pin connected with the internal node, and configured to transfer a voltage of the internal node to an external device when the charging pin is connected with the external device; and a power management integrated circuit connected between the internal node and the battery, and configured to charge the battery by using the voltage of the internal node or to generate the voltage of the internal node by using a voltage of the battery.

Classes IPC  ?

• H02J 7/00 - Circuits pour la charge ou la dépolarisation des batteries ou pour alimenter des charges par des batteries
• H02H 7/18 - Circuits de protection de sécurité spécialement adaptés pour des machines ou appareils électriques de types particuliers ou pour la protection sectionnelle de systèmes de câble ou ligne, et effectuant une commutation automatique dans le cas d'un chan pour accumulateurs

Abrégé

Provided is a method of extracting properties of a layer on a wafer, the method including emitting electromagnetic waves to a lower surface of the wafer, detecting a first electromagnetic wave, that passes through a target layer on an upper surface of the wafer, and a second electromagnetic wave, that is reflected from the target layer, among the electromagnetic waves to obtain data including information about the first electromagnetic wave and the second electromagnetic wave, and separating a first pulse of the first electromagnetic wave and a second pulse of the second electromagnetic wave from each other in the data and obtaining property data of the target layer.

Classes IPC  ?

• H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
• G01N 21/95 - Recherche de la présence de criques, de défauts ou de souillures caractérisée par le matériau ou la forme de l'objet à analyser

Abrégé

Disclosed is a ramp signal generator. The ramp signal generator includes: a first unit current source including first sub-unit current sources, and configured to output a first unit current during a first time period; and a second unit current source including second sub-unit current sources, and configured to output a second unit current during a second time period. The first sub-unit current sources are configured to operate according to first sub-ramp control signals, respectively. The second sub-unit current sources are configured to operate according to second sub-ramp control signals, respectively. n first sub-ramp control signals among the first sub-ramp control signals are activated, and m sub-ramp control signals among the second sub-ramp control signals are activated, n and m being different natural numbers.

Classes IPC  ?

• H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
• H03K 4/48 - Génération d'impulsions ayant comme caractéristique essentielle une pente définie ou des parties en gradins à forme triangulaire en dents de scie utilisant comme éléments actifs des dispositifs à semi-conducteurs

Abrégé

A semiconductor measurement apparatus may include an illumination unit configured to irradiate light to the sample, an image sensor configured to receive light reflected from the sample and output multiple interference images representing interference patterns of polarization components of light, an optical unit in a path through which the image sensor receives light and including an objective lens above the sample, and a control unit configured to obtain, by processing the multi-interference image, measurement parameters determined from the polarization components at each of a plurality of azimuth angles defined on a plane perpendicular to a path of light incident to the image sensor. The control unit may be configured to determine a selected critical dimension to be measured from a structure in the sample based on measurement parameters. The illumination unit and/or the optical unit may include a polarizer and a compensator having a ¼ wave plate.

Classes IPC  ?

• G01B 9/02 - Interféromètres
• G01B 9/02097 - Auto-interféromètres

Abrégé

An electronic device includes: one or more processors; a memory storing instructions configured to cause the one or more processors to: install instrumentation points in respective tasks of an application, the instrumentation points including a source instrumentation point installed in a source task and a target instrumentation point installed in a target task, wherein the source task and the target task are configured to execute in parallel on the one or more processors, and wherein each task includes a respective sequence of instructions executable by the one or more processors, and determine a measure of a causal relationship between the source instrumentation point and the target instrumentation point based on observation of a delay in the target instrumentation point induced by a delay amount generated by the source instrumentation point.

Classes IPC  ?

• G06F 11/36 - Prévention d'erreurs en effectuant des tests ou par débogage de logiciel

Abrégé

Provided is a wafer processing apparatus including a plate having a plurality of support pins configured such that a wafer is mounted on the plurality of support pins and a plurality of vacuum ports positioned between the plurality of support pins, a heater configured to heat the plate, a flow regulator configured to provide a vacuum pressure for fixing the wafer to the plurality of vacuum ports, and configured to adjust a flow rate of a fluid flowing into the plurality of vacuum ports to be a target flow rate, and a chuck controller configured to control the target flow of the fluid set in the flow regulator, wherein the chuck controller is configured to generate a flow control signal for reducing the target flow rate of the fluid and send the flow control signal to the flow regulator during a heating process of the wafer.

Classes IPC  ?

• H01L 21/683 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le maintien ou la préhension
• H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
• H01L 21/687 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le maintien ou la préhension en utilisant des moyens mécaniques, p.ex. mandrins, pièces de serrage, pinces

Abrégé

An image sensor comprises a first sub-pixel comprising a first photoelectric conversion region, a first floating diffusion region, and a first transfer transistor to transfer charges accumulated in the first photoelectric conversion region to the first floating diffusion region; and a second sub-pixel adjacent to the first sub-pixel, and comprising a second photoelectric conversion region, a second floating diffusion region, and a second transfer transistor to transfer charges accumulated in the second photoelectric conversion region to the second floating diffusion region. The first photoelectric conversion region may comprise a first and a second sub-region partitioned by a potential level isolation region that blocks movement of charges, and the first transfer transistor may comprise a first sub-transfer transistor to transfer charges accumulated in the first sub-region to the first floating diffusion region, and a second sub-transfer transistor to transfer charges accumulated in the second sub-region to the first floating diffusion region.

Classes IPC  ?

• H01L 27/146 - Structures de capteurs d'images

Abrégé

The present disclosure provides semiconductor packages including a heat dissipation structure. In some embodiments, the semiconductor package includes a package substrate, a stacked chip disposed on the package substrate and including a lower chip and an upper chip, a memory chip disposed on the package substrate adjacent to the stacked chip, and an encapsulant encapsulating at least a portion of the stacked chip and the memory chip on the package substrate. An upper surface of the upper chip is exposed from the encapsulant. A dummy silicon chip is in contact with the upper chip on the lower chip.

Classes IPC  ?

• H01L 23/373 - Refroidissement facilité par l'emploi de matériaux particuliers pour le dispositif
• H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition
• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
• H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des groupes principaux , ou dans une seule sous-classe de , , p.ex. circuit hybrides

Abrégé

A method of performing localisation of a User Equipment, UE, in a telecommunication network is provided. The method comprises receiving from a second network entity a location request, and identifying multiple Quality of Service, QoS, class for location services comprising a plurality of QoS requirements based on the location request.

Classes IPC  ?

• H04W 64/00 - Localisation d'utilisateurs ou de terminaux pour la gestion du réseau, p.ex. gestion de la mobilité
• H04W 28/02 - Gestion du trafic, p.ex. régulation de flux ou d'encombrement

Abrégé

A semiconductor device includes a first active pattern including a first lower pattern and first sheet patterns; a second active pattern including a second lower pattern and second sheet patterns, a height of the second lower pattern being smaller than a height of the first lower pattern; a first gate structure on the first lower pattern; a second gate structure on the second lower pattern; a first source/drain pattern on the first lower pattern and connected to the first sheet patterns; and a second source/drain pattern on the second lower pattern and connected to the second sheet patterns, wherein a width of an upper surface of the first lower pattern is different from a width of an upper surface of the second lower pattern, and wherein a number of first sheet patterns is different from a number of second sheet patterns.

Classes IPC  ?

• H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
• H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
• H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter

Abrégé

The present disclosure relates to a semiconductor package and a manufacturing method thereof, and a manufacturing method of a semiconductor package according to an embodiment includes: preparing a glass substrate that includes a groove and a hole positioned around the groove; forming a conductive connection member to fill inside the hole of the glass substrate; attaching a semiconductor chip inside the groove of the glass substrate; forming a first redistribution structure for connection with the semiconductor chip and the conductive connection member on a first side of the glass substrate; and forming a second redistribution structure for connection with the conductive connection member on a second side of the glass substrate.

Classes IPC  ?

• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 21/48 - Fabrication ou traitement de parties, p.ex. de conteneurs, avant l'assemblage des dispositifs, en utilisant des procédés non couverts par l'un uniquement des groupes
• H01L 23/15 - Substrats en céramique ou en verre

Abrégé

A semiconductor device may include an active pattern on a substrate; an isolation pattern on the substrate, the isolation pattern covering opposite sidewalls of the active pattern; a liner on the isolation pattern, a liner including a material different from the isolation pattern; a gate structure contacting an upper surface of the active pattern and an upper surface of the liner; and a plurality of channels spaced apart from each other in a vertical direction perpendicular to an upper surface of the substrate, each of the plurality of channels extending through the gate structure.

Classes IPC  ?

• H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
• H01L 29/66 - Types de dispositifs semi-conducteurs

Abrégé

Provided are a recombinant microorganisms having a genetic modification that increases the expression of bacterioferritin, a composition comprising the recombinant microorganism for use in reducing a nitrogen oxide concentration in a sample, and a method of reducing a nitrogen oxide concentration in a sample.

Classes IPC  ?

• C12N 1/20 - Bactéries; Leurs milieux de culture
• C07K 14/195 - Peptides ayant plus de 20 amino-acides; Gastrines; Somatostatines; Mélanotropines; Leurs dérivés provenant de bactéries

Abrégé

Image sensors and fabrication methods thereof. For example, the image sensor may include a first substrate having a first surface and a second surface that are opposite to each other, a plurality of pixels provided in the first substrate and arranged in pixel groups, each pixel group including four pixels arranged in two columns and two rows, a pixel separation structure in the first substrate and including a pixel group separation part that separates each pixel group from adjacent pixel groups and a pixel separation part that separates the pixels in each pixel group from each other, and a plurality of microlenses on the first surface and respectively overlapping the plurality of pixel groups. Each of the microlenses includes a central part that has a first curvature and an edge part that has a second curvature. The first curvature is less than the second curvature.

Classes IPC  ?

• H01L 27/146 - Structures de capteurs d'images
• G02B 3/00 - Lentilles simples ou composées

Abrégé

A bit line sense amplifier of a semiconductor memory device includes: sense amplifier blocks including a PMOS driver or an NMOS driver that detects and amplifies a signal difference between a bit line and a complimentary bit line, and sequentially arranged in a bit line extending direction; column selection units that connect the bit line and a local input/output line according to a first column selection signal; complimentary column selection units that connect the complimentary bit line and a complimentary local input/output line according to a second column selection signal; column selection lines that transmit the first column selection signal to each of the column selection units; and complimentary column selection lines that transmit the second column selection signal to each of the complimentary column selection units. The column selection units and the complimentary column selection units may be disposed to be distributed between the sense amplifier blocks.

Classes IPC  ?

• G11C 11/4091 - Amplificateurs de lecture ou de lecture/rafraîchissement, ou circuits de lecture associés, p.ex. pour la précharge, la compensation ou l'isolation des lignes de bits couplées
• G11C 11/4094 - Circuits de commande ou de gestion de lignes de bits
• G11C 11/4096 - Circuits de commande ou de gestion d'entrée/sortie [E/S, I/O] de données, p.ex. circuits pour la lecture ou l'écriture, circuits d'attaque d'entrée/sortie ou commutateurs de lignes de bits

Abrégé

A processor-implemented method includes: generating initial information comprising any one or any combination of any two or more of map information, departure information, and arrival information; generating a plurality of paths by inputting the initial information to a planner ensemble; and training a path distribution estimation model to output a path distribution corresponding to the plurality of paths.

Classes IPC  ?

• G01C 21/20 - Instruments pour effectuer des calculs de navigation

Abrégé

A system and a method are disclosed for determining early termination during an iterative detection and decoding (IDD) procedure. The method may include computing, during the IDD procedure, one or more log-likelihood ratios (LLRs) of one or more cyclic-redundancy checks (CRC), and determining that at least one of the LLRs predict a failure of a CRC check and, in response, terminating the IDD procedure.

Classes IPC  ?

• H04L 1/00 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue
• H04W 52/02 - Dispositions d'économie de puissance

Abrégé

Disclosed is a semiconductor memory device including a peripheral gate structure on a substrate, bitlines disposed on the peripheral gate structure and extending in a first direction, a protruding insulating pattern including channel trenches, extending in a second direction intersecting the first direction, channel structures disposed on the bitlines in the channel trenches and including a metal oxide, first wordlines disposed on the channel structures and extending in the second direction, second wordlines disposed on the channel structures, extending in the second direction, and spaced apart from the first wordlines in the first direction, landing pads disposed on the channel structures and connected to the channel structures, pad separation patterns disposed on the protruding insulating pattern and separating the landing pads, first passage patterns connected to the protruding insulating pattern through pad separation patterns and formed of an oxide-based insulating material, and data storage patterns disposed on the landing pads.

Classes IPC  ?

• H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
• H01L 23/528 - Configuration de la structure d'interconnexion

Abrégé

A mobile device and a method of controlling the same. A control method according to an embodiment comprises displaying a user interface (UI) screen which includes a plurality of UI elements, detecting a first user input associated with a first UI element among the plurality of UI elements, identifying one or more identification codes associated with the first UI element based on the detecting of the first user input, detecting one or more neighboring devices based on the one or more identification codes, displaying a window which includes one or more UI elements associated with the one or more neighboring devices, detecting a second user input associated with a second UI element among the one or more UI elements, determining a neighboring device associated with the second UI element, among the one or more neighboring devices, as a controlled device controllable through the second UI element, based on detecting of the second user input, and transmitting a control command related to the first UI element to the neighboring device determined as the controlled device.

Classes IPC  ?

• H04W 72/25 - Canaux de commande ou signalisation pour la gestion des ressources entre terminaux au moyen d’une liaison sans fil, p.ex. liaison secondaire
• G06F 3/0482 - Interaction avec des listes d’éléments sélectionnables, p.ex. des menus
• G06F 9/54 - Communication interprogramme

Abrégé

Provided are a method of selecting multi-wavelengths for overlay measurement, for accurately measuring overlay, and an overlay measurement method and a semiconductor device manufacturing method using the multi-wavelengths. The method of selecting multi-wavelengths for overlay measurement includes measuring an overlay at multiple positions on a wafer at each of a plurality of wavelengths within a set first wavelength range, selecting representative wavelengths that simulate the overlay of the plurality of wavelengths, from among the plurality of wavelengths, and allocating weights to the representative wavelengths, respectively.

Classes IPC  ?

• G03F 7/20 - Exposition; Appareillages à cet effet
• G03F 7/00 - Production par voie photomécanique, p.ex. photolithographique, de surfaces texturées, p.ex. surfaces imprimées; Matériaux à cet effet, p.ex. comportant des photoréserves; Appareillages spécialement adaptés à cet effet
• H01L 21/66 - Test ou mesure durant la fabrication ou le traitement

Abrégé

A semiconductor device includes a chip select signal flip-flop configured to: latch a chip select signal in-sync with a first propagation clock signal, and output a first chip select enable signal, and latch the chip select signal in-sync with a second propagation clock signal having a phase opposite to a phase of the first propagation clock signal, and output a second chip select enable signal; and a clock control circuit configured to generate the first propagation clock signal and the second propagation clock signal based on a clock signal, and selectively output one of the first propagation clock signal and the second propagation clock signal based on an enable level of the first chip select enable signal and an enable level of the second chip select enable signal.

Classes IPC  ?

• G11C 11/4076 - Circuits de synchronisation
• G06F 1/12 - Synchronisation des différents signaux d'horloge
• G11C 11/408 - Circuits d'adressage
• H03K 3/037 - Circuits bistables
• H03K 19/20 - Circuits logiques, c. à d. ayant au moins deux entrées agissant sur une sortie; Circuits d'inversion caractérisés par la fonction logique, p.ex. circuits ET, OU, NI, NON

Abrégé

A semiconductor device may include a substrate including an active pattern, a channel pattern on the active pattern, a source/drain pattern, a gate electrode, and an insulation pattern. The channel pattern may include semiconductor patterns that are spaced apart from each other and vertically stacked. A lowermost one of the semiconductor patterns may be a first semiconductor pattern. The source/drain pattern may be connected to the semiconductor patterns. The gate electrode may be on the semiconductor patterns and may include a plurality of inner electrodes below the semiconductor patterns except the first semiconductor pattern. The insulation pattern may be between the first semiconductor pattern and the active pattern. The insulation pattern may include a dielectric pattern and a protection layer. The protection layer may be between the dielectric pattern and the first semiconductor pattern. The protection layer may be between the dielectric pattern and the active pattern.

Classes IPC  ?

• H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
• H01L 29/24 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des matériaux semi-conducteurs inorganiques non couverts par les groupes , ,  ou
• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
• H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
• H01L 29/786 - Transistors à couche mince

Abrégé

The inventive concept provides a method of removing and collecting particles from a photomask including fabricating the photomask on a substrate, generating a first map indicating locations of particles on a surface of the photomask by inspecting the surface of the photomask using a probe tip, vertically moving the probe tip to a first vertical height that is lower than a height of the particle, horizontally moving the probe tip parallel to the surface of the photomask at the first vertical height, generating a second map indicating locations of particles on the surface of the photomask using the probe tip, vertically moving the probe tip to a second vertical height that is lower than the first vertical height, and horizontally moving the probe tip parallel to the surface of the photomask at the second vertical height.

Classes IPC  ?

• G01Q 80/00 - Applications des techniques de sonde à balayage, autres que les techniques SPM
• G01Q 60/24 - Microscopie à forces atomiques AFM [Atomic Force Microscopy] ou appareils à cet effet, p.ex. sondes AFM

Abrégé

A semiconductor device includes a substrate including first and second regions; a first active pattern including a first lower pattern and first sheet patterns; a second active pattern including a second lower pattern, a height of the second lower pattern being identical to a height of the first lower pattern, and second sheet patterns; a first gate structure including a first gate insulating film and a first gate electrode; a second gate structure including a second gate insulating film, and a second gate electrode, a width of the second gate electrode being greater than a width of the first gate electrode; a first source/drain pattern on the first lower pattern and connected to the first sheet patterns; and a second source/drain pattern on the second lower pattern and connected to the second sheet patterns, wherein a number of first sheet patterns is smaller than a number of second sheet patterns.

Classes IPC  ?

• H10B 10/00 - Mémoires statiques à accès aléatoire [SRAM]
• H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
• H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
• H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique

Abrégé

An image sensor includes a color filter array including a first color filter including a first number of blue pass filtering elements, the first number of red pass filtering elements, and green pass filtering elements in a first pattern, wherein a number of the green pass filtering elements in the first pattern is twice the first number, and a second color filter including a second number of blue pass filtering elements, the second number of red pass filtering elements, and green pass filtering elements in a second pattern, wherein a number of green pass filtering elements in the second pattern is twice the second number, and the second number is greater than the first number. The second color filter may surround an area of the first color filter.

Classes IPC  ?

• H04N 23/84 - Chaînes de traitement de la caméra; Leurs composants pour le traitement de signaux de couleur
• G06T 5/00 - Amélioration ou restauration d'image
• G06T 7/90 - Détermination de caractéristiques de couleur
• H01L 27/146 - Structures de capteurs d'images
• H04N 25/11 - Agencement de matrices de filtres colorés [CFA]; Mosaïques de filtres

Abrégé

Systems and methods for persistent storage with a dual interface. In some embodiments, a persistent storage device includes: a processing circuit; a cache; and persistent storage. The processing circuit may be configured to perform a method, the method including: receiving a first write request according to a first protocol; saving a data payload of the first write request in a first portion of the cache; receiving a second write request according to a second protocol; and saving a data payload of the second write request in a second portion of the cache.

Classes IPC  ?

• G06F 12/0831 - Protocoles de cohérence de mémoire cache à l’aide d’un schéma de bus, p.ex. avec moyen de contrôle ou de surveillance
• G06F 12/0888 - Adressage d’un niveau de mémoire dans lequel l’accès aux données ou aux blocs de données désirés nécessite des moyens d’adressage associatif, p.ex. mémoires cache utilisant la mémorisation cache sélective, p.ex. la purge du cache
• G06F 12/0891 - Adressage d’un niveau de mémoire dans lequel l’accès aux données ou aux blocs de données désirés nécessite des moyens d’adressage associatif, p.ex. mémoires cache utilisant des moyens d’effacement, d’invalidation ou de réinitialisation

Abrégé

A black-box fuzzing testing method includes: generating a plurality of testcases; executing a target program based on each of the generated testcases to obtain a plurality of execution results; determining a plurality of execution paths of the target program using the execution results; and determining a code coverage of the target program from the execution paths.

Classes IPC  ?

• G06F 11/36 - Prévention d'erreurs en effectuant des tests ou par débogage de logiciel

Abrégé

A processor of a wearable device may display, based on identifying a location in a first area based on data of a sensor, a visual object. The processor may be configured to adjust, based on an input indicating selection of the visual object, the state of the camera to a first state for recording media. The processor may be configured to identify whether the location of the wearable device moves to a second area in the first area. The processor may be configured to obtain, based on identifying that the location of the wearable device moves into the second area, media based on the camera of the first state. The present disclosure relates to a metaverse service for enhancing interconnectivity between a real-world object and a virtual object, and the metaverse service may be provided over a network based on 5th generation (5G) and/or 6th generation (6G) communication systems.

Classes IPC  ?

• G02B 27/01 - Dispositifs d'affichage "tête haute"
• G06V 10/764 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant la classification, p.ex. des objets vidéo
• G06V 20/40 - RECONNAISSANCE OU COMPRÉHENSION D’IMAGES OU DE VIDÉOS Éléments spécifiques à la scène dans le contenu vidéo
• H04N 23/667 - Changement de mode de fonctionnement de la caméra, p. ex. entre les modes photo et vidéo, sport et normal ou haute et basse résolutions

Abrégé

A semiconductor package includes: a first redistribution substrate; a semiconductor chip provided on the first redistribution substrate; a molding material molding the semiconductor chip and the first redistribution substrate; and a second redistribution substrate provided on the molding material, wherein the second redistribution substrate includes: at least one redistribution line; a metal pad; and a dielectric layer molding the at least one redistribution line and the metal pad, wherein the dielectric layer includes a marking region on the metal pad, and the metal pad includes a plurality of concave portions.

Classes IPC  ?

• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition

Abrégé

A computational storage device (CSD) and a method thereof are provided. The method includes receiving, from a user device, a computational storage (CS) request, identifying the CS request as an attack, comparing a total attack value of the user device to a threshold, wherein the total attack value is based on a number of attacks received from the user device, and identifying the user device as an attacker based on the comparison.

Classes IPC  ?

• G06F 21/55 - Détection d’intrusion locale ou mise en œuvre de contre-mesures

Abrégé

An electronic device includes a memory configured to store at least one instruction; and at least one processor configured to execute the at least one instruction to: input first data to a first artificial intelligence model including a plurality of convolution blocks sequentially connected with a pooling layer interposed therebetween to obtain a plurality of feature maps that are output by corresponding ones of the plurality of convolution blocks, input the first data and the plurality of feature maps to a second artificial intelligence model including a plurality of local attention blocks sequentially connected to obtain a plurality of attention maps that are output by corresponding ones of the plurality of local attention blocks, output an amplified feature map by amplifying a region corresponding to a last attention map among the plurality of attention maps in a last feature map among the plurality of feature maps, and input the amplified feature map to a classifier to output a classification result for the first data.

Classes IPC  ?

• G06V 10/771 - Sélection de caractéristiques, p.ex. sélection des caractéristiques représentatives à partir d’un espace multidimensionnel de caractéristiques
• G06V 10/764 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant la classification, p.ex. des objets vidéo
• G06V 20/13 - Images satellite

Abrégé

Provided is a display panel including a circuit layer and a display element layer above the circuit layer. The display element layer may include a first light-emitting element, a second light-emitting element, and a pixel-defining film that are spaced apart in a direction perpendicular to the thickness direction. The first light-emitting element may include an optical auxiliary layer and a conductive layer sequentially stacked between the first electrode and the hole transport region, and the second light-emitting element may omit the optical auxiliary layer and the conductive layer. The optical auxiliary layer may be spaced apart from the hole transport region with the conductive layer interposed therebetween.

Classes IPC  ?

• H10K 59/38 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des filtres de couleur ou des supports changeant de couleur [CCM]
• G02B 27/01 - Dispositifs d'affichage "tête haute"
• H10K 59/122 - Structures ou couches définissant le pixel, p. ex. bords
• H10K 102/00 - DISPOSITIFS ÉLECTRIQUES À L’ÉTAT SOLIDE ORGANIQUES - Détails de structure relatifs aux dispositifs organiques couverts par la présente sous-classe

Abrégé

A pixel includes a first transistor generating current from a first power source line to a second power source line through a light-emitting element, a second transistor between a third power source line and a gate electrode of the first transistor, a third transistor between a data line and a gate electrode of the second transistor and controlled by a first signal, a fourth transistor between a fourth power source line and a first node and controlled by a second signal, a first capacitor between the gate electrode of the first transistor and the first node, and a second capacitor between the gate electrode of the second transistor and a sweep voltage line providing a sweep voltage that linearly changes from a first voltage level to a second voltage level, and nonlinearly changes from the second voltage level to a third voltage level when the third transistor is on.

Classes IPC  ?

• G09G 3/32 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p.ex. utilisant des diodes électroluminescentes [LED]
• G09G 3/20 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice

Abrégé

According to various embodiments, an electronic device comprises: at least one processor; and memory operatively connected to the at least one processor, wherein the memory may store instructions which, when executed by the at least one processor, cause the electronic device to: obtain, from a kernel, at least one address for a first memory area accessible through the kernel; store the at least one address in a second memory area accessible through a hypervisor; based on obtaining an address stored in a kernel stack from the kernel, identify whether the obtained address is defective, on the basis of the at least one stored address; and restore the defective address using at least one address stored in the second memory area in response to identifying the defect in the address.

Classes IPC  ?

• G06F 11/10 - Détection ou correction d'erreur par introduction de redondance dans la représentation des données, p.ex. en utilisant des codes de contrôle en ajoutant des chiffres binaires ou des symboles particuliers aux données exprimées suivant un code, p.ex. contrôle de parité, exclusion des 9 ou des 11
• G06F 11/07 - Réaction à l'apparition d'un défaut, p.ex. tolérance de certains défauts

Abrégé

A touch sensor includes first touch electrodes, second touch electrodes that form mutual capacitances with the first touch electrodes, and a controller that generates touch data by applying a scan signal to each of scan lines connected to the first touch electrodes during substantially a same time and that receives sensing signals from the second touch electrodes through sensing lines. The controller applies a plurality of multiple pulses and a target pulse as the scan signal to each of the scan lines in a plurality of time periods. Each of the plurality of multiple pulses includes a first pulse and a second pulse of phases opposite to each other. Multiple pulses applied to scan lines adjacent to each other among the scan lines have phases opposite to each other.

Classes IPC  ?

• G06F 3/041 - Numériseurs, p.ex. pour des écrans ou des pavés tactiles, caractérisés par les moyens de transduction
• G06F 3/044 - Numériseurs, p.ex. pour des écrans ou des pavés tactiles, caractérisés par les moyens de transduction par des moyens capacitifs

Abrégé

Provided is a display apparatus in which an area of a dead space is significantly reduced, the display apparatus including a first scan line extending in a first direction, a second scan line spaced apart from the first scan line and extending in the first direction, a first pixel set disposed between the first scan line and the second scan line, the first pixel set including a 1-1st pixel including n sub-pixels and a 1-2nd pixel including n sub-pixels, and n first data lines spaced apart from each other, disposed between the 1-1st pixel and the 1-2nd pixel in a plan view, extending in a second direction crossing the first direction, and electrically connected to the 1-1st pixel and the 1-2nd pixel.

Classes IPC  ?

• G09G 3/3225 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p.ex. utilisant des diodes électroluminescentes [LED] organiques, p.ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active
• G11C 19/28 - Mémoires numériques dans lesquelles l'information est déplacée par échelons, p.ex. registres à décalage utilisant des éléments semi-conducteurs

Abrégé

A semiconductor package includes a first structure including a first semiconductor chip comprising a first semiconductor integrated circuit, and a second structure on the first structure. The second structure includes a second semiconductor chip including a second semiconductor integrated circuit, a semiconductor pattern horizontally spaced apart from the second semiconductor chip and on a side surface of the second semiconductor chip, an insulating pattern between the second semiconductor chip and the semiconductor pattern, and through-electrode structures. At least one of the through-electrode structures penetrates through at least a portion of the second semiconductor chip or penetrates through the semiconductor pattern. The semiconductor pattern has a first side surface facing the side surface of the second semiconductor chip and a second side surface opposing the first side surface. The second side surface of the semiconductor pattern is vertically aligned with a side surface of the first semiconductor chip.

Classes IPC  ?

• H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
• H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p.ex. fils de connexion ou bornes
• H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs sous-groupes différents du même groupe principal des groupes , ou dans une seule sous-classe de ,

Abrégé

A display device includes an active layer, a gate electrode on the active layer, a conductive layer on the gate electrode and connected to the active layer, a pixel electrode which is on the conductive layer and connected to the conductive layer, and a connection electrode which connects the conductive layer connected to the active layer, to the pixel electrode. The connection electrode which connects the conductive layer connected to the active layer, to the pixel electrode, has a tensile strength less than or equal to a tensile strength of the active layer.

Classes IPC  ?

• H10K 59/123 - Connexion des électrodes de pixel aux transistors à couches minces [TFT]

Abrégé

A clock gating cell is provided. The clock gating cell includes: an inverter circuit configured to generate an inverted clock signal by inverting a clock signal; a first control circuit configured to receive the inverted clock signal, an enable signal, and a scan enable signal, and output a first internal signal at a first node; a second control circuit configured to receive the first internal signal, the clock signal, the enable signal, and the scan enable signal, and output a second internal signal at a second node; and an output driver configured to receive the second internal signal, and output an output clock signal to an output node and a third internal signal to a third node. The first control circuit and the second control circuit are configured to receive the third internal signal at the third node.

Classes IPC  ?

• H03K 3/037 - Circuits bistables
• G06F 1/08 - Générateurs d'horloge ayant une fréquence de base modifiable ou programmable
• H03K 19/20 - Circuits logiques, c. à d. ayant au moins deux entrées agissant sur une sortie; Circuits d'inversion caractérisés par la fonction logique, p.ex. circuits ET, OU, NI, NON

Abrégé

According to an embodiment of the disclosure, a display device includes a pixel circuit layer including a base layer and a pixel circuit disposed on the base layer, and a light emitting element disposed on the base layer and electrically connected to the pixel circuit. The pixel circuit includes a transistor and a storage capacitor including a first capacitor electrode and a second capacitor electrode. The base layer includes a concave portion. At least a portion of each of the first capacitor electrode and the second capacitor electrode is disposed in the concave portion.

Classes IPC  ?

• H10K 59/121 - Affichages à OLED à matrice active [AMOLED] caractérisés par la géométrie ou la disposition des éléments de pixel
• H10K 59/12 - Affichages à OLED à matrice active [AMOLED]

Abrégé

A method and an apparatus for logging events in a communication system is provided. The method comprises receiving, from a network function, a request for creating a managed object instance (MOI) of an information object class (IOC) for registering logs associated with a plurality of management services of a communication network. The method further comprises creating a fragment of network resource model (NRM) for logging events associated with the plurality of management services, based on the MOI, wherein the NRM comprises a set of MOIs. Additionally, creating the fragment comprises generating the set MOIs for logging events related to the plurality of management services, wherein the set of MOIs comprise an MOI for registration of a log, an MOI for information of the log, and an MOI for entry of the log. Advantageously, the present disclosure enables logging of events in communication networks.

Classes IPC  ?

• H04L 43/04 - Traitement des données de surveillance capturées, p.ex. pour la génération de fichiers journaux
• H04L 43/062 - Génération de rapports liés au trafic du réseau

Abrégé

The disclosure relates to a wireless communication system, in which a method performed by a user equipment includes receiving, from a base station, information configuring a plurality of sounding reference signal (SRS) resources that are related with one channel state information-reference signal (CSI-RS) resource, receiving an SRS resource indicator (SRI) indicating at least one SRS resource from among the plurality of SRS resources, obtaining, based on an implicit precoding being indicated for an uplink channel, precoding information for the uplink channel based on the CSI-RS resource related with a most recently transmitted SRS of the at least one SRS resource indicated by the SRI, and transmitting, to the base station, the uplink channel based on the precoding information.

Classes IPC  ?

• H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
• H04W 72/044 - Affectation de ressources sans fil sur la base du type de ressources affectées
• H04W 72/23 - Canaux de commande ou signalisation pour la gestion des ressources dans le sens descendant de la liaison sans fil, c. à d. en direction du terminal

Abrégé

A light emitting display device includes: a first light emitting electrode; a pixel definition layer including a light-emitting element opening exposing a part of the first light emitting electrode and including a separator; an emission layer in the light-emitting element opening; a second light emitting electrode divided by a separator; and an auxiliary insulating layer between the first light emitting electrode and the pixel definition layer and in contact with the first light emitting electrode and the pixel definition layer, wherein the separator is formed of an opening in the pixel definition layer, and an under-cut is formed under the opening in the separator.

Classes IPC  ?

• H01L 25/075 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
• H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des groupes principaux , ou dans une seule sous-classe de , , p.ex. circuit hybrides

Abrégé

A semiconductor package includes: a chip-via composite substrate including a substrate, a semiconductor chip, and a plurality of through vias, wherein the substrate has a first surface and a second surface opposite to the first surface and includes a first region and a second region around the first region, wherein the semiconductor chip is provided in the first region and has chip pads and circuit patterns that are electrically connected to the chip pads, and wherein the plurality of through vias is provided in the second region and penetrate the substrate; a first redistribution wiring layer provided on the first surface of the substrate and having first redistribution wirings that are electrically connected to the chip pads and the through vias; and a second redistribution wiring layer provided on the second surface of the substrate and having second redistribution wirings that are electrically connected to the through vias.

Classes IPC  ?

• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p.ex. fils de connexion ou bornes
• H01L 25/10 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs ayant des conteneurs séparés

Abrégé

A display device includes a display panel including non-folding regions and a folding region disposed between the non-folding regions and a lower member disposed under the display panel. The lower member includes a base part including a plurality of portions having different flexural moduli and support lines that are disposed inside the base part and that intersect each other in a plan view and define openings.

Classes IPC  ?

• H04M 1/02 - Caractéristiques de structure des appareils téléphoniques
• G06F 1/16 - TRAITEMENT ÉLECTRIQUE DE DONNÉES NUMÉRIQUES - Détails non couverts par les groupes et - Détails ou dispositions de structure
• G09F 9/30 - Dispositifs d'affichage d'information variable, dans lesquels l'information est formée sur un support, par sélection ou combinaison d'éléments individuels dans lesquels le ou les caractères désirés sont formés par une combinaison d'éléments individuels

Abrégé

In a display panel, a first emission area corresponding to a first display element, a second emission area corresponding to a second display element, and a third emission area corresponding to a third emission area, which are located in a unit pixel area, have closed curve shapes.

Classes IPC  ?

• G09G 3/20 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice
• H10K 59/122 - Structures ou couches définissant le pixel, p. ex. bords
• H10K 59/35 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des sous-pixels rouge-vert-bleu [RVB]

Abrégé

Broadly speaking, embodiments of the present techniques provide a method for training a machine learning, ML, model to update global and local versions of a model. We propose a novel hierarchical Bayesian approach to Federated Learning (FL), where our models reasonably describe the generative process of clients' local data via hierarchical Bayesian modeling: constituting random variables of local models for clients that are governed by a higher-level global variate. Interestingly, the variational inference in our Bayesian model leads to an optimisation problem whose block-coordinate descent solution becomes a distributed algorithm that is separable over clients and allows them not to reveal their own private data at all, thus fully compatible with FL.

Classes IPC  ?

• G06N 3/098 - Apprentissage distribué, p.ex. apprentissage fédéré

Abrégé

Embodiments provide a condensed cyclic compound, a light-emitting device including the condensed cyclic compound, an electronic apparatus including the light-emitting device, and an electronic device including the light-emitting device. The light-emitting device includes a first electrode, a second electrode facing the first electron, and an interlayer between the first electrode and the second electrode and including an emission layer. The condensed cyclic compound is represented by Formula 1, which is explained in the specification: Embodiments provide a condensed cyclic compound, a light-emitting device including the condensed cyclic compound, an electronic apparatus including the light-emitting device, and an electronic device including the light-emitting device. The light-emitting device includes a first electrode, a second electrode facing the first electron, and an interlayer between the first electrode and the second electrode and including an emission layer. The condensed cyclic compound is represented by Formula 1, which is explained in the specification:

Classes IPC  ?

• H10K 85/60 - Composés organiques à faible poids moléculaire
• C07F 5/02 - Composés du bore
• C09K 11/06 - Substances luminescentes, p.ex. électroluminescentes, chimiluminescentes contenant des substances organiques luminescentes

Abrégé

A method for validating a trained artificial intelligence (AI) model on a device is provided. The method includes deploying a validation model generated by applying a plurality of anticipated configurational changes associated with the trained AI model requiring validation. Further, the method includes providing input data to each of the validation model and the trained AI model for receiving an output from each of the validation model and the trained AI model, wherein the output of the validation model is further based on one or more actual configurational deviations that occurred during training of the trained AI model since deployment of the trained AI model on the device. Furthermore, the method includes combining the output of each of the validation model and the trained AI model to validate the trained AI model.

Classes IPC  ?

• G06N 3/08 - Méthodes d'apprentissage
• G06N 3/045 - Combinaisons de réseaux

Abrégé

A display device includes: a blue color filter layer in a blue transmission region of an upper substrate, and including first scattering particles; a green color filter layer in a green transmission region of the upper substrate, and including second scattering particles; a red color filter layer in a red transmission region of the upper substrate; a partition wall on the upper substrate and defining a blue transmission opening, a green transmission opening, and a red transmission opening, which overlap the blue transmission region, the green transmission region, and the red transmission region, respectively; a color conversion layer including red color conversion particles and third scattering particles, and accommodated in the red transmission opening; a light emitting element layer on a lower substrate facing the upper substrate; and a filling material between the upper substrate and the lower substrate.

Classes IPC  ?

• H10K 59/38 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des filtres de couleur ou des supports changeant de couleur [CCM]
• H10K 59/12 - Affichages à OLED à matrice active [AMOLED]

Abrégé

Provided is a method for manufacturing a display panel, the method includes forming a driving element layer including a transistor and a first insulation layer on a base layer; forming a contact-hole partially exposing the transistor; and providing a connection wiring electrically connected to the transistor through the contact-hole on the first insulation layer. The method includes forming a first tip portion by performing a primary etching on the connection wiring; providing the first tip portion exposed by the first open region as a second preliminary tip portion; and forming a second tip portion by performing a secondary etching on the second preliminary tip portion.

Classes IPC  ?

• H10K 59/131 - Interconnexions, p. ex. lignes de câblage ou bornes
• H10K 59/12 - Affichages à OLED à matrice active [AMOLED]

Abrégé

An organic light-emitting device includes: a first electrode, a second electrode facing the first electrode, an interlayer which is between the first electrode and the second electrode and including an emission layer, and a capping layer located outside the first electrode or the second electrode, where the emission layer includes a first emitter, the first emitter is to emit blue light, the first emitter includes platinum (Pt), the highest occupied molecular orbital (HOMO) energy level of the first emitter is −4.4 eV or less, and the capping layer includes an amine-free compound.

Classes IPC  ?

• H10K 85/30 - Composés de coordination
• C09K 11/02 - Emploi de substances particulières comme liants, revêtements de particules ou milieux de suspension
• C09K 11/06 - Substances luminescentes, p.ex. électroluminescentes, chimiluminescentes contenant des substances organiques luminescentes
• H10K 85/60 - Composés organiques à faible poids moléculaire

Abrégé

A display device has a base layer, including light-emitting regions of first to third colors, respectively, at least one light-receiving region, and a non-light-emitting region surrounding the light-emitting regions and the at least one light-receiving region; a display element layer disposed on the base layer, including first to third light-emitting elements each corresponding to the light-emitting regions of the first to third colors, respectively, and a light-receiving element corresponding to the at least one light-receiving region; and a color filter layer disposed on the display element layer and including first to third color filters, first regions each having one color filter corresponding to a respective one of the first to third color filters disposed therein and each overlapping a respective one of the first to third color light-emitting regions, and a second region in which two different color filters of the first to third color filters are stacked.

Classes IPC  ?

• H10K 59/38 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des filtres de couleur ou des supports changeant de couleur [CCM]
• H10K 59/40 - OLED intégrées avec écrans tactiles

Abrégé

A semiconductor package includes a package substrate including a first pad; a first memory device arranged on the package substrate and including first and second semiconductor chips stacked in a vertical direction; and a first chip connecting member electrically connecting the first semiconductor chip to the package substrate. The first semiconductor chip includes a first cell structure; a first peripheral circuit structure; a first bonding pad; and a first input/output pad electrically connected to the first pad of the package substrate through the first chip connection member. The second semiconductor chip includes a second cell structure; and a second bonding pad connected to the first bonding pad. A part of the first peripheral circuit structure protrudes from a sidewall of the second semiconductor chip so as not to overlap the second semiconductor chip.

Classes IPC  ?

• H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
• H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H10B 80/00 - Ensembles de plusieurs dispositifs comprenant au moins un dispositif de mémoire couvert par la présente sous-classe

Abrégé

A cooking apparatus includes a case, a cooking chamber formed inside the case, a camera configured to obtain an image inside of the cooking chamber, a transparent member, a camera cooling fan configured to blow air toward the camera, a motor configured to rotate the camera cooling fan, and a controller to be electrically connected to the camera and the motor. The controller is configured to operate the camera to obtain a first image inside of the cooking chamber, configured to identify foreign substance-related information of a lens of the camera or the transparent member based on the first image, and configured to control an operation of the motor to perform a cleaning mode, in which the camera cooling fan is rotated at a first rotation speed for a first rotation time, based on the determining that the foreign substance is present.

Classes IPC  ?

• H04N 23/81 - Chaînes de traitement de la caméra; Leurs composants pour supprimer ou minimiser les perturbations lors de la génération de signaux d'image
• F24C 15/00 - POÊLES OU FOURNEAUX À USAGE DOMESTIQUE ; PARTIES CONSTITUTIVES DES POÊLES OU DES FOURNEAUX À USAGE DOMESTIQUE, D'APPLICATION GÉNÉRALE - Parties constitutives
• H04N 23/52 - Caméras ou modules de caméras comprenant des capteurs d'images électroniques; Leur commande - Détails de structure Éléments optimisant le fonctionnement du capteur d'images, p. ex. pour la protection contre les interférences électromagnétiques [EMI] ou la commande de la température par des éléments de transfert de chaleur ou de refroidissement

Abrégé

Provided is a method of manufacturing a semiconductor package, the method including forming a first wiring structure, coating a high transmittance photoresist on the first wiring structure a plurality of number of times, forming a plurality of openings by exposing and developing the high transmittance photoresist, forming a plurality of conductive posts by filling the plurality of openings with a conductive material, removing the high transmittance photoresist, disposing a semiconductor chip on the first wiring structure, forming an encapsulant surrounding the semiconductor chip and the plurality of conductive posts, and forming a second wiring structure on the encapsulant, wherein the light transmittance of the high transmittance photoresist at a portion where the first wiring structure and the high transmittance photoresist contact each other is greater than or equal to 3.2%.

Classes IPC  ?

• H01L 21/48 - Fabrication ou traitement de parties, p.ex. de conteneurs, avant l'assemblage des dispositifs, en utilisant des procédés non couverts par l'un uniquement des groupes
• H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition
• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs sous-groupes différents du même groupe principal des groupes , ou dans une seule sous-classe de ,
• H10B 80/00 - Ensembles de plusieurs dispositifs comprenant au moins un dispositif de mémoire couvert par la présente sous-classe

Abrégé

A display device includes: a substrate; an active layer on the substrate; and a gate electrode on the active layer. The gate electrode includes a first metal layer, a second metal layer on the first metal layer, and a third metal layer on the second metal layer. The first metal layer includes aluminum, the second metal layer includes transparent conductive oxide, and the third metal layer includes a niobium-titanium alloy.

Classes IPC  ?

• H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant

Abrégé

Provided is an electronic device including a transceiver configured to output a first transmission signal, a first radio frequency (RF) module configured to amplify the first transmission signal obtained from the transceiver to generate an amplified first transmission signal, a first antenna configured to transmit the amplified first transmission signal, and a main coupler provided outside the first RF module along a transmission path between the first RF module and the first antenna, and configured to output a first coupling signal corresponding to the first transmission signal. The first RF module includes at least one power amplifier configured to amplify the first transmission signal, and a switch configured to connect one of a plurality of input ports, including at least one input port connected to the main coupler and configured to receive the first coupling signal output by the main coupler, with an output port connected to the transceiver.

Classes IPC  ?

• H04B 1/04 - Circuits
• H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
• H04B 1/44 - Commutation transmission-réception

Abrégé

A display device includes a display panel including a first non-folding region, a second non-folding region, and a folding region between the first and second non-folding regions, and a lower member below the display panel. The lower member includes a support layer below the display panel and including a first support part which overlaps the first non-folding region, a second support part which overlaps the second non-folding region, and a folding part which overlaps the folding region, where openings are defined in the folding part, a digitizer below the support layer and corresponding to the first and support parts, a cover layer between the support layer and the digitizer and attached below the folding part, and a lower adhesion layer between the support layer and the digitizer. The lower adhesion layer is between the first and second support parts.

Classes IPC  ?

• G06F 1/16 - TRAITEMENT ÉLECTRIQUE DE DONNÉES NUMÉRIQUES - Détails non couverts par les groupes et - Détails ou dispositions de structure

Abrégé

A display apparatus includes a substrate including a transmission area having a first through hole, a display area surrounding the transmission area, and a middle area disposed between the transmission area and the display area, a pixel circuit disposed on the display area, the pixel circuit including a first thin film transistor including a first semiconductor layer having polycrystalline silicon, and a second thin film transistor including a second semiconductor layer including an oxide semiconductor, a display element including a pixel electrode electrically connected to the pixel circuit, an opposite electrode disposed on the pixel electrode, and an intermediate layer disposed between the pixel electrode and the opposite electrode and including an emission layer, and a groove disposed in the middle area while surrounding the first through hole.

Classes IPC  ?

• H10K 59/121 - Affichages à OLED à matrice active [AMOLED] caractérisés par la géométrie ou la disposition des éléments de pixel
• H10K 50/844 - Encapsulations
• H10K 59/65 - OLED intégrées avec des capteurs d'images inorganiques
• H10K 71/00 - Fabrication ou traitement spécialement adaptés aux dispositifs organiques couverts par la présente sous-classe

Abrégé

The present disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. In addition, the present disclosure relates to a method carried out by a base station of a wireless communication system, and a device for carrying out same, the method comprising the steps of: determining whether a frequency band operated by a base station uses a bandwidth that is narrower than a preset bandwidth; if a bandwidth that is narrower than the preset bandwidth is used, determining a subcarrier spacing (SCS) that is narrower than a preset SCS; generating a synchronization signal block (SSB) using the determined SCS; and transmitting the SSB, wherein the determined SCS is smaller than 15 kHz.

Classes IPC  ?

• H04W 56/00 - Dispositions de synchronisation
• H04L 27/26 - Systèmes utilisant des codes à fréquences multiples
• H04W 76/28 - Transmission discontinue [DTX]; Réception discontinue [DRX]

Abrégé

A display panel includes first, second, and third emitting parts arranged along a first direction, first, second, and third transistors spaced apart from the first, second, and third emitting parts, and arranged along the first direction, and first, second, and third connection wirings each extending along the first direction and connecting the first, second, and third emitting parts to the first, second, and third transistors. The first, second, and third connection wirings include first, second, and third emission connection parts each connected to a corresponding emitting part, and first, second, and third driver connection parts each connected to a corresponding transistor. An arrangement order of the first, second, and third emission connection parts arranged in the first direction and an arrangement order of the first, second, and third driver connection parts arranged in the first direction are same as each other.

Classes IPC  ?

• H10K 59/131 - Interconnexions, p. ex. lignes de câblage ou bornes
• H10K 59/121 - Affichages à OLED à matrice active [AMOLED] caractérisés par la géométrie ou la disposition des éléments de pixel

Abrégé

A disclosed drum-type washing machine having a softening apparatus comprises: a cylindrical water tank accommodating laundry and having a rotating drum; a case for accommodating the water tank; and a softening apparatus having a hardness component remover for removing hardness components from washing water, and a regeneration agent accommodation unit spaced apart from the hardness component remover on opposite sides from a center of the tub, and for accommodating a regeneration agent that regenerates a function of the hardness component remover.

Classes IPC  ?

• D06F 39/00 - BLANCHISSAGE, SÉCHAGE, REPASSAGE, PRESSAGE OU PLIAGE D'ARTICLES TEXTILES - Détails des machines à laver dans la mesure où ils ne sont pas particuliers à un seul type de machines couvert par les groupes
• C02F 1/42 - Traitement de l'eau, des eaux résiduaires ou des eaux d'égout par échange d'ions
• D06F 23/02 - Machines à laver avec réceptacles, p.ex. perforés, et avec un mouvement rotatif, p.ex. oscillant, le réceptacle servant aussi bien pour le lavage que pour l'essorage centrifuge et tournant ou oscillant autour d'un axe horizontal
• D06F 34/22 - Caractéristiques du liquide de lavage, p.ex. turbidité
• D06F 39/02 - Dispositifs pour l'addition de savon ou autres agents de lavage
• D06F 39/12 - Cuvelages; Cuves

Abrégé

A semiconductor package, comprising: a first redistribution wiring layer including first and second surfaces opposite to each other, wherein the first redistribution wiring layer includes a first chip mounting region and a second chip mounting region adjacent to the first chip mounting region; a connection layer on the first surface of the first redistribution wiring layer; a first semiconductor chip on the first chip mounting region on the connection layer; a second semiconductor chip spaced apart from the first semiconductor chip on the second chip mounting region on the connection layer, wherein the second semiconductor chip includes through electrodes; a molding member on the first and second semiconductor chips on the connection layer; and a second redistribution wiring layer on the molding member, wherein the second redistribution wiring layer is electrically connected to the first redistribution wiring layer through the through electrodes.

Classes IPC  ?

• H01L 25/10 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs ayant des conteneurs séparés
• H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition
• H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p.ex. fils de connexion ou bornes
• H01L 23/538 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre la structure d'interconnexion entre une pluralité de puces semi-conductrices se trouvant au-dessus ou à l'intérieur de substrats isolants
• H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

A display apparatus is disclosed that includes a thin-film transistor including a semiconductor layer, an organic light-emitting element, and a passivation layer including a first contact hole connecting the thin-film transistor and the organic light-emitting element, wherein the passivation layer includes a first passivation layer, a second passivation layer, and a third passivation layer, which are sequentially stacked, and the first passivation layer includes SiON.

Classes IPC  ?

• H10K 59/124 - Couches isolantes formées entre les éléments TFT et les éléments OLED

Abrégé

A display device includes pixels connected to scan lines and data lines, each pixel including a driving transistor and at least one light emitting element, and a timing controller configured to generate output data using external input data. The timing controller includes a first compensator configured generate first data by correcting the external input data using at least one of optical measurement information, a threshold voltage of each of the driving transistors, mobility information, dimming information, and temperature information, and an afterimage compensator configured to generate second data based on age information of each light emitting element and the first data, generate third data based on a current amount corresponding to the first data and a current amount corresponding to the second data, and generate the age information by accumulating the third data.

Classes IPC  ?

• G09G 3/20 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice
• G09G 3/3233 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p.ex. utilisant des diodes électroluminescentes [LED] organiques, p.ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active avec un circuit de pixel pour commander le courant à travers l'élément électroluminescent

Abrégé

A robot, includes: a driver; a plurality of sensors; a memory; and at least one processor configured to transmit a first signal for identifying a presence or absence of an object within a sensing area of the plurality of sensors through a first sensor operating in the signal transmitting mode from among the plurality of sensors during a first time period, identify, a second sensor to transmit a second signal during a third time period after elapse of the second time period from among the plurality of sensors, transmit the second signal by operating the identified second sensor in the signal transmitting mode, identify a location of the object based on whether a second reflection signal corresponding to the second signal is received at the second sensor, and control the driver to travel by avoiding the object based on the identified location of the object.

Classes IPC  ?

• G05D 1/02 - Commande de la position ou du cap par référence à un système à deux dimensions

Abrégé

A deposition apparatus includes: a support module having a plurality of support parts coupled to a target substrate; a base substrate coupled to the support module; a connection member for connecting the plurality of support parts to the base substrate; and a mask assembly configured to mask a deposition material provided to the target substrate. The support module further includes position control parts, which control the plurality of support parts to be movable along a direction axis perpendicular to a major surface of each of the support parts, respectively.

Classes IPC  ?

• B05C 13/02 - Moyens pour manipuler ou tenir des objets, p.ex. des objets individuels pour des objets particuliers
• B05C 21/00 - Accessoires ou instruments employés pour l'application des liquides ou d'autres matériaux fluides à des surfaces, non prévus dans les groupes
• H01L 21/683 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le maintien ou la préhension
• H10K 71/16 - Dépôt d'une matière active organique en utilisant un dépôt physique en phase vapeur [PVD], p. ex. un dépôt sous vide ou une pulvérisation cathodique

Abrégé

A device for gathering image sets includes: N digital cameras including one or more ground truth cameras for capturing high quality ground truth images and one or more target cameras for capturing low quality target images, the N digital cameras being optically coupled via N−1 beam splitters, at least N−1 cameras of the N digital cameras being mounted on automatically adjustable mounts; and at least one computer readable storage device storing instructions executable by at least one processor. The instructions cause the at least one processor to adjust the at least N−1 cameras by actuating the automatically adjustable mounts on which the at least N−1 cameras are mounted; synchronize image capture by the digital cameras; and control the digital cameras to gather sets of N images. The at least N−1 cameras are adjusted based on at least one set of N images of the scene.

Classes IPC  ?

• H04N 23/55 - Pièces optiques spécialement adaptées aux capteurs d'images électroniques; Leur montage
• G02B 5/20 - Filtres
• G06T 3/40 - Changement d'échelle d'une image entière ou d'une partie d'image
• G06T 15/00 - Rendu d'images tridimensionnelles [3D]
• G06V 10/25 - Détermination d’une région d’intérêt [ROI] ou d’un volume d’intérêt [VOI]
• G06V 10/56 - Extraction de caractéristiques d’images ou de vidéos relative à la couleur
• H04N 23/54 - Montage de tubes analyseurs, de capteurs d'images électroniques, de bobines de déviation ou de focalisation

Abrégé

A transistor may include a first insulating layer disposed on a substrate, a dummy layer disposed on the first insulating layer, a semiconductor layer disposed on the dummy layer, the semiconductor layer including a first area, a second area, and a channel area disposed between the first and second areas, a second insulating layer disposed on the semiconductor layer, a gate electrode overlapping the channel area with the second insulating interposed therebetween, a third insulating layer disposed over the gate electrode, a first electrode disposed on the third insulating layer, the first electrode being electrically connected to the first area, and a second electrode disposed on the third insulating layer spaced apart from the first electrode, the second electrode being electrically connected to the second area. The dummy layer may include indium oxide, and the semiconductor layer may include indium gallium zinc oxide.

Classes IPC  ?

• H01L 29/786 - Transistors à couche mince
• H01L 29/66 - Types de dispositifs semi-conducteurs

Abrégé

Disclosed is a display panel including a first emitting part and a second emitting part spaced apart from each other. Each of the first and second emitting parts includes an separator and at least one emitting part. The separator includes a first isolation portion. The first isolation portion includes first portions spaced apart from each other and second portions, each of the second portions is bent from each of the first portions and is disposed between adjacent ones of the first portions.

Classes IPC  ?

• H10K 59/122 - Structures ou couches définissant le pixel, p. ex. bords
• H10K 59/131 - Interconnexions, p. ex. lignes de câblage ou bornes

Abrégé

An image sensor includes a semiconductor substrate in which a plurality of photo-sensing elements are integrated, an organic active layer on the semiconductor substrate, an interlayer between the organic active layer and the semiconductor substrate, and optionally a color filter layer on the organic active layer. The organic active layer includes a singlet fission material. The interlayer includes a dielectric selected from an oxide, a nitride, oxynitride, fluoride, oxyfluoride, and any combination thereof.

Classes IPC  ?

• H10K 39/32 - Capteurs d'images organiques

Abrégé

An electronic device includes a display, a rear cover, a first frame including a first portion in which at least one speaker hole is formed in a region and a second portion extending from the first portion in a first direction, a second frame coupled to the second portion of the first frame, a speaker disposed in a space between the second frame and the second portion of the first frame, an acoustic duct formed in the first frame, a film including a conductive pattern, and a wireless communication circuit electrically coupled to the first conductive pattern. The acoustic duct includes a first acoustic duct portion and a second acoustic duct portion, at least one region of the first film covers an entirety of the opening, and the wireless communication circuit is configured to feed power to a point of the first conductive pattern to receive a signal of a first frequency band.

Classes IPC  ?

• H01Q 1/24 - Supports; Moyens de montage par association structurale avec d'autres équipements ou objets avec appareil récepteur
• H01Q 1/38 - Forme structurale pour éléments rayonnants, p.ex. cône, spirale, parapluie formés par une couche conductrice sur un support isolant
• H01Q 1/44 - ANTENNES, c. à d. ANTENNES RADIO - Détails de dispositifs associés aux antennes utilisant un équipement ayant une autre fonction principale servant en outre d'antenne
• H04M 1/02 - Caractéristiques de structure des appareils téléphoniques

Abrégé

A display device includes a display unit including pixels connected to data lines and scan lines, first and second temperature sensors for sensing first and second temperatures of the display unit, a data driver configured to generate a data signal configured to be supplied to the data lines using output data, and attached to a first printed circuit board configured to be fixed to a rear surface of the display unit, a timing controller configured to generate the output data using input data, and attached to a second printed circuit board configured to be fixed to the rear surface of the display unit, and a storage having a temperature weight table including a weight corresponding to the first and second temperatures and a plurality of temperature tables including temperature information of the display unit corresponding to an attachment position of the second printed circuit board.

Classes IPC  ?

• G09G 3/32 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p.ex. utilisant des diodes électroluminescentes [LED]
• H05K 1/14 - Association structurale de plusieurs circuits imprimés
• H05K 1/18 - Circuits imprimés associés structurellement à des composants électriques non imprimés

Abrégé

An electronic apparatus includes a memory configured to store a neural network model including a first network and a second network. The electronic apparatus also includes at least one processor connected to the memory. The at least one processor is configured to obtain description information corresponding to a first image by inputting the first image to the first network, obtain a second image based on the description information, obtain a third image representing a region of interest of the first image by inputting the first image and the second image to the second network. The neural network model is a model trained based on a plurality of sample images, a plurality of sample description information corresponding to the plurality of sample images, and a sample region of interest of the plurality of sample images.

Classes IPC  ?

• G06V 10/82 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant les réseaux neuronaux
• G06T 3/40 - Changement d'échelle d'une image entière ou d'une partie d'image

Abrégé

An electronic device according to an embodiment includes: a scaling server configured to execute a first event occurring in a first region allocated a plurality of cells, at least one game server configured to execute a second event occurring in at least one second region adjacent to the first region, and at least one processor configured to process the scaling server and the at least one game server. The at least one processor configured to control at least one of the scaling server or the at least one game server so that at least one cell is transferred between the first region and the second region, based on a first load by the first event and a second load by the second event.

Classes IPC  ?

• A63F 13/77 - Aspects de sécurité ou de gestion du jeu incluant les données relatives aux dispositifs ou aux serveurs de jeu, p.ex. données de configuration, version du logiciel ou quantité de mémoire
• G06F 9/50 - Allocation de ressources, p.ex. de l'unité centrale de traitement [UCT]

Abrégé

A device may receive a first synchronization signal including at least one first synchronization signal block (SSB) from a serving base station and a second synchronization signal including at least one second SSB from a neighboring base station, where the second synchronization signal overlaps a slot through which data is transmitted from the serving base station. Additionally, the device may measure a first received power and a received reference signal received power (RSRP) of each of the first synchronization signal and the second synchronization signal received on the slot. The device may calculate an effective RSRP corresponding to at least one additional SSB received from the serving base station, the effective RSRP calculated based on a correlation power, where the correlation power is based on a cross correlation between the received RSRP, the first received power, the data, and the at least one additional SSB.

Classes IPC  ?

• H04W 56/00 - Dispositions de synchronisation
• H04B 17/318 - Force du signal reçu
• H04B 17/336 - Rapport signal/interférence ou rapport porteuse/interférence

Abrégé

A display device according to an embodiment includes: a substrate; a transistor on the substrate; a pixel electrode electrically connected to the transistor; a pixel defining layer on the pixel electrode and having a first opening overlapping the pixel electrode; an emission layer on the pixel electrode; a common electrode on the pixel definition layer and the emission layer; an encapsulation layer on the common electrode; a light extraction pattern on the encapsulation layer and having a first refractive index; and a reflection control layer covering the light extraction pattern and having a second refractive index different from the first refractive index.

Classes IPC  ?

• H10K 59/80 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comprenant au moins un élément organique émetteur de lumière couvert par le groupe - Détails de structure
• H10K 59/122 - Structures ou couches définissant le pixel, p. ex. bords
• H10K 59/40 - OLED intégrées avec écrans tactiles

Abrégé

A display device includes a light emitting element disposed on a substrate to include an emission layer; and a light controller disposed over the light emitting element, the light controller includes light blocking patterns to extend in a first direction and spaced apart in a second direction intersecting the first direction; and a transmission portion disposed between the light blocking patterns to extend in the first direction, and the transmission portion includes a first transparent organic layer; a transparent inorganic layer disposed on the first transparent organic layer; and a second transparent organic layer disposed on the transparent inorganic layer.

Classes IPC  ?

• H01L 33/44 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les revêtements, p.ex. couche de passivation ou revêtement antireflet
• H01L 25/075 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe

Abrégé

A display device including: a substrate; first to third light emitting portions on the substrate; a light sensing portion on the substrate and configured to sense an incident light, a light blocking layer having a light blocking opening that overlaps the light sensing portion; a first color filter on the first light emitting portion, and configured to transmit the first light, and block the second light and the third light; a second color filter on the second light emitting portion, overlapping the light blocking opening, and configured to transmit the second light, and block the first light and the third light; a third color filter on the third light emitting portion, and configured to transmit the third light, and block the first light and the second light; and a first light blocking pattern on the second color filter and overlapping a portion of the light blocking opening.

Classes IPC  ?

• H10K 59/60 - OLED intégrées avec des éléments inorganiques sensibles à la lumière, p. ex. avec des cellules solaires inorganiques ou des photodiodes inorganiques
• G06V 40/13 - Capteurs à cet effet
• H10K 59/38 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des filtres de couleur ou des supports changeant de couleur [CCM]
• H10K 59/80 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comprenant au moins un élément organique émetteur de lumière couvert par le groupe - Détails de structure

Abrégé

A display device includes a display panel, and a touch sensing unit on the display panel, the touch sensing unit including a first conductive pattern on the display panel, an insulating layer covering the first conductive pattern, and a second conductive pattern on the insulating layer, partially crossing the first conductive pattern, and having a thickness that is greater than a thickness of the first conductive pattern.

Classes IPC  ?

• G06F 3/044 - Numériseurs, p.ex. pour des écrans ou des pavés tactiles, caractérisés par les moyens de transduction par des moyens capacitifs
• G06F 3/041 - Numériseurs, p.ex. pour des écrans ou des pavés tactiles, caractérisés par les moyens de transduction
• G09G 3/3225 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p.ex. utilisant des diodes électroluminescentes [LED] organiques, p.ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active
• H10K 50/844 - Encapsulations
• H10K 59/40 - OLED intégrées avec écrans tactiles

Abrégé

The present disclosure relates to a 5G communication system or a 6G communication system for supporting higher data rates beyond a 4G communication system such as long term evolution (LTE). A method performed by a base station in a wireless communication system may include determining a first synchronization signal block (SSB) beam sweeping pattern, based on distribution of a plurality of user equipments (UEs), transmitting information indicating the first SSB beam sweeping pattern to a neighbor base station and the plurality of UEs, transmitting an SSB to the plurality of UEs, based on the first SSB beam sweeping pattern, receiving information about an SSB beam sweeping pattern of the neighboring base station from the neighbor base station, receiving parameter information for updating the first SSB beam sweeping pattern from a core network, updating the first SSB beam sweeping pattern to a second SSB beam sweeping pattern, based on second location information received in response to a request transmitted to the plurality of UEs, based on the parameter information, transmitting information indicating the second SSB beam sweeping pattern to the neighbor base station and the plurality of UEs, and transmitting an SSB to the plurality of UEs, based on the second SSB beam sweeping pattern.

Classes IPC  ?

• H04W 48/08 - Distribution d'informations relatives aux restrictions d'accès ou aux accès, p.ex. distribution de données d'exploration
• H04W 24/10 - Planification des comptes-rendus de mesures

Abrégé

A semiconductor device includes a first element separation structure, a second element separation structure, and a third element separation structure sequentially disposed along a first direction and extending in a second direction intersecting the first direction; a first active pattern extending in the first direction between the first element separation structure and the second element separation structure; a second active pattern extending in the first direction between the second element separation structure and the third element separation structure and separated from the first active pattern by the second element separation structure; a first gate electrode extending in the second direction on the first active pattern; and a plurality of second gate electrodes extending in the second direction on the second active pattern, wherein a width of the first active pattern in the second direction is greater than a width of the second active pattern in the second direction.

Classes IPC  ?

• H01L 27/092 - Transistors à effet de champ métal-isolant-semi-conducteur complémentaires
• H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
• H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique

Abrégé

An internal voltage generation circuit of a smart card to perform fingerprint authentication and a smart card includes a first contact switch, a second contact switch, a switched capacitor converter and a bidirectional switched capacitor converter. The first contact switch selectively switches a contact voltage to a first node based on a first switching enable signal, in a contact mode. The second contact switch selectively switches the contact voltage to a second node based on a second switching enable signal, in the contact mode. The bidirectional switched capacitor converter steps down a first driving voltage of the first node to provide a second voltage to the second node in the contactless mode and either steps down the first driving voltage or boosts a second driving voltage of the second node based on a level of the contact voltage to provide a boosted voltage to the first node in the contact mode.

Classes IPC  ?

• G06K 19/07 - Supports d'enregistrement avec des marques conductrices, des circuits imprimés ou des éléments de circuit à semi-conducteurs, p.ex. cartes d'identité ou cartes de crédit avec des puces à circuit intégré
• G06K 19/077 - Supports d'enregistrement avec des marques conductrices, des circuits imprimés ou des éléments de circuit à semi-conducteurs, p.ex. cartes d'identité ou cartes de crédit avec des puces à circuit intégré - Détails de structure, p.ex. montage de circuits dans le support
• H02M 3/335 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu avec transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrodes de commande pour produire le courant alternatif intermédiaire utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs

Abrégé

A display device includes a display panel, and a circuit film disposed under the display panel. The display panel includes a base layer, pixels disposed on the base layer, sensors disposed on the base layer, first connection lines disposed on the base layer and electrically connected to the pixels, second connection lines disposed on the base layer and electrically connected to the sensors, first pads electrically connected to the first connection lines, and second pads electrically connected to the second connection lines. The circuit film is electrically connected to the first pads and the second pads through an opening of the base layer, and each of the plurality of second connection lines has a straight shape extending along a first direction.

Classes IPC  ?

• H04M 1/02 - Caractéristiques de structure des appareils téléphoniques
• G09G 3/3258 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p.ex. utilisant des diodes électroluminescentes [LED] organiques, p.ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active avec un circuit de pixel pour commander la tension aux bornes de l'élément électroluminescent

Abrégé

An electronic device is provided. The electronic device includes a microphone. The electronic device includes a display. The electronic device includes a processor. The processor is configured to display, via the display, a screen including a plurality of executable objects. The processor is configured to enable the microphone for the executable object based on an executable object focused on among the plurality of executable objects, and display at least one visual object indicating that the microphone is enabled for receiving an input on the executable object among the plurality of executable objects, via the display. The processor is configured to identify whether a voice signal obtained via the microphone while the at least one visual object is displayed corresponds to a voice command allocated to the executable object. The processor is configured to execute a function of the executable object associated with the voice command, based on the voice signal corresponding to the voice command.

Classes IPC  ?

• G10L 15/22 - Procédures utilisées pendant le processus de reconnaissance de la parole, p.ex. dialogue homme-machine 
• G02B 27/01 - Dispositifs d'affichage "tête haute"
• G06F 3/01 - Dispositions d'entrée ou dispositions d'entrée et de sortie combinées pour l'interaction entre l'utilisateur et le calculateur
• G06F 3/04817 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] fondées sur des propriétés spécifiques de l’objet d’interaction affiché ou sur un environnement basé sur les métaphores, p.ex. interaction avec des éléments du bureau telles les fenêtres ou les icônes, ou avec l’aide d’un curseur changeant de comport utilisant des icônes
• G06F 3/0488 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] utilisant des caractéristiques spécifiques fournies par le périphérique d’entrée, p.ex. des fonctions commandées par la rotation d’une souris à deux capteurs, ou par la nature du périphérique d’entrée, p.ex. des gestes en fonction de la pression exer utilisant un écran tactile ou une tablette numérique, p.ex. entrée de commandes par des tracés gestuels

Abrégé

A display device is disclosed that includes a substrate, a light emitting device disposed on the substrate, an encapsulation layer covering the light emitting device, a light control film disposed on the encapsulation layer and including a plurality of light control patterns, and each of the light control patterns includes a first metal pattern disposed on the encapsulation layer, a first light transmission pattern disposed on the first metal pattern, a second metal pattern disposed on the first light transmission pattern and overlapping the first metal pattern, a second light transmission pattern disposed on the second metal pattern and overlapping the first light transmission pattern, a first light blocking pattern disposed on the same layer as the first metal pattern and overlapping the first light transmission pattern, and a second light blocking pattern disposed on the same layer as the second metal pattern and overlapping the second light transmission pattern.

Classes IPC  ?

• H01L 33/54 - Encapsulations ayant une forme particulière
• H01L 25/075 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
• H01L 33/44 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les revêtements, p.ex. couche de passivation ou revêtement antireflet
• H01L 33/62 - Dispositions pour conduire le courant électrique vers le corps semi-conducteur ou depuis celui-ci, p.ex. grille de connexion, fil de connexion ou billes de soudure

Abrégé

A method of operating a first node in a wireless communication network is provided. The method comprises: receiving an ingress data packet; determining routing; and transmitting the ingress data packet. Determining routing may comprise determining a next hop node for the ingress data packet taking account of first level routing information indicating target next hop nodes. Alternatively, determining routing may comprise determining, for a target next hop node, a channel on which to transmit the ingress data packet taking account of second level routing information.

Classes IPC  ?

• H04W 40/22 - Sélection d'itinéraire ou de voie de communication, p.ex. routage basé sur l'énergie disponible ou le chemin le plus court utilisant la retransmission sélective en vue d'atteindre une station émettrice-réceptrice de base [BTS Base Transceiver Station] ou un point d'accès
• H04W 28/02 - Gestion du trafic, p.ex. régulation de flux ou d'encombrement

Abrégé

In an overlay measurement method, an overlay mark having programmed overlay values is provided. The overlay mark is scanned with an electron beam to obtain a voltage contrast image. A defect function that changes according to the overlay value is obtained from voltage contrast image data. Self-cross correlation is performed on the defect function to determine an overlay.

Classes IPC  ?

• G01B 15/00 - Dispositions pour la mesure caractérisées par l'utilisation d'ondes électromagnétiques ou de radiations de particules, p.ex. par l'utilisation de micro-ondes, de rayons X, de rayons gamma ou d'électrons

Abrégé

A display device includes a support member including a first non-folding part including a glass, a second non-folding part including the glass, and a folding part disposed between the first non-folding part and the second non-folding part, a circuit element layer disposed on the support member, and including at least one transistor, a light emitting element layer disposed on the circuit element layer, and including at least one light emitting diode; an encapsulation layer disposed on the light emitting element layer, and including at least one of an organic encapsulation layer and an inorganic encapsulation layer, a touch sensing layer disposed on the encapsulation layer, and including at least one touch electrode, a first adhesive layer disposed on the touch sensing layer, a cover window disposed on the first adhesive layer, a protective film disposed on the cover window, and a second adhesive layer disposed on the support member.

Classes IPC  ?

• H10K 59/80 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comprenant au moins un élément organique émetteur de lumière couvert par le groupe - Détails de structure
• G06F 1/16 - TRAITEMENT ÉLECTRIQUE DE DONNÉES NUMÉRIQUES - Détails non couverts par les groupes et - Détails ou dispositions de structure
• H10K 59/40 - OLED intégrées avec écrans tactiles
• H10K 71/20 - Modification de la forme de la couche active dans les dispositifs, p. ex. mise en forme
• H10K 102/00 - DISPOSITIFS ÉLECTRIQUES À L’ÉTAT SOLIDE ORGANIQUES - Détails de structure relatifs aux dispositifs organiques couverts par la présente sous-classe

Abrégé

A display apparatus includes: digitizer; an adhesive layer disposed on the digitizer to contact the digitizer; and a substrate disposed on the adhesive layer to contact the adhesive layer. The substrate includes a first substrate in which a plurality of first structures, each including an opening or groove, are defined such that the first substrate is folded about a folding axis extending in a first direction, and the first substrate includes a glass material.

Classes IPC  ?

• G06F 3/041 - Numériseurs, p.ex. pour des écrans ou des pavés tactiles, caractérisés par les moyens de transduction