Abrégé

Provided is an integrated circuit including a cell region in which a plurality of cells are arranged, and a peripheral region in which a circuit configured to control the plurality of cells is arranged, wherein the cell region further includes a plurality of first gate lines over a substrate, a plurality of first patterns in a first wiring layer above the plurality of first gate lines, a plurality of second patterns extending in a first horizontal direction in a backside wiring layer under the substrate, and a plurality of first vias, each of the plurality of first vias passing through the substrate in a vertical direction, wherein each of the plurality of first vias includes a top surface connected to a respective one of the plurality of first patterns and a bottom surface connected to a respective one of the plurality of second patterns.

Classes IPC  ?

• H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p.ex. fils de connexion ou bornes
• H10B 10/00 - Mémoires statiques à accès aléatoire [SRAM]

Abrégé

A method of a local bundle assistant (LBA) negotiating a certificate with a secondary platform bundle manager (SPBM) in a wireless communication system including: transmitting a request message requesting information of certificates supported by a secondary secure platform (SSP) to a secondary platform bundle loader (SPBL) of the SSP; receiving the information of certificates supported by the SSP including information of certificate issuers corresponding to a family identifier from the SPBL; transmitting the information of certificates supported by the SSP to the SPBM; and receiving a certificate of the SPBM for key agreement, information of public key identifiers of certificate issuers to be used by the SSP, and information of the family identifier from the SPBM.

Classes IPC  ?

• H04W 12/0431 - Distribution ou pré-distribution de clés; Mise en accord de clés
• H04L 9/08 - Répartition de clés
• H04L 9/32 - Dispositions pour les communications secrètes ou protégées; Protocoles réseaux de sécurité comprenant des moyens pour vérifier l'identité ou l'autorisation d'un utilisateur du système
• H04L 9/40 - Protocoles réseaux de sécurité
• H04W 12/06 - Authentification
• H04W 28/18 - Négociation des paramètres de télécommunication sans fil
• H04W 72/56 - Critères d’affectation ou de planification des ressources sans fil sur la base de critères de priorité

Abrégé

A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a lower electrode provided on a substrate, a buffer layer provided on the lower electrode and including first indium, an oxide semiconductor layer provided on the buffer layer and including second indium, a gate electrode provided apart from the oxide semiconductor layer, and an upper electrode provided on the oxide semiconductor layer, wherein a content of the first indium is greater than a content of the second indium.

Classes IPC  ?

• H01L 29/786 - Transistors à couche mince
• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
• H01L 29/66 - Types de dispositifs semi-conducteurs

Abrégé

An electronic device including: a regulator circuit configured to output a regulated voltage based on a reference voltage and a feedback voltage; and an oscillator configured to generate an output frequency signal based on a reference frequency signal and the regulated voltage output from the regulator circuit, wherein the regulator circuit includes: a feedback loop configured to output the regulated voltage based on a difference between the reference voltage and the feedback voltage; a first capacitor; a precharge circuit connected to the feedback loop, and configured to charge the first capacitor with a second voltage which is based on a first voltage; a first switch configured to connect the precharge circuit with the first capacitor; and a second switch configured to connect the first capacitor with the feedback loop.

Classes IPC  ?

• G06F 1/26 - Alimentation en énergie électrique, p.ex. régulation à cet effet
• G05F 1/56 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en série avec la charge comme dispositifs de réglage final
• G06F 1/04 - Génération ou distribution de signaux d'horloge ou de signaux dérivés directement de ceux-ci
• H03K 3/037 - Circuits bistables

Abrégé

A stretchable strain sensor includes a light-emitting element, an optical structure, and a photo-detective element. The stretchable strain sensor is located in a path of light emitted from the light-emitting element. The optical structure is configured to have optical properties that change in response to stretching of at least a portion of the stretchable strain sensor. The photo-detective element is configured to detect light transmitted through the optical structure or reflected through the optical structure.

Classes IPC  ?

• G01L 1/24 - Mesure des forces ou des contraintes, en général en mesurant les variations des propriétés optiques du matériau quand il est soumis à une contrainte, p.ex. par l'analyse des contraintes par photo-élasticité
• G01B 11/16 - Dispositions pour la mesure caractérisées par l'utilisation de techniques optiques pour mesurer la déformation dans un solide, p.ex. indicateur optique de déformation
• G01L 11/02 - Mesure de la pression permanente, ou quasi permanente d'un fluide ou d'un matériau solide fluent par des moyens non prévus dans les groupes ou par des moyens optiques

Abrégé

The disclosure relates to a 5th generation (5G) or 6th generation (6G) communication system for supporting a higher data transmission rate. A method and a device of measurement reporting related to user experience, and a method performed by a first node in a wireless communication network are provided. The method includes receiving, from a third node, third information, and receiving, from a second node, fifth information. The fifth information includes at least one of configuration information of a radio bearer, configuration information of a radio bearer carrying a measurement report, configuration information of a signaling radio bearer (SRB), configuration information related to a measurement, configuration information related to a duration, or information for requesting or indicating the duration. The third information includes information on at least one measured cell.

Classes IPC  ?

• H04W 24/10 - Planification des comptes-rendus de mesures

Abrégé

The disclosure relates to a 5th generation (5G) or 6th generation (6G) communication system for supporting a higher data transmission rate. A method performed by a user equipment (UE) in a wireless communication system is provided. The method includes receiving, from a base station, configuration information associated with a sidelink (SL) listen-before-talk (LBT) failure recovery, identifying a counter value associated with the SL LBT failure detection, based on an SL LBT failure indication received from a lower layer, and in a case where the counter value is greater than or equal to a threshold value, triggering the SL consistent LBT failure.

Classes IPC  ?

• H04W 74/08 - Accès non planifié, p.ex. accès aléatoire, ALOHA ou accès multiple par détection de porteuse [CSMA Carrier Sense Multiple Access]

Abrégé

To control tension of a string of a tension control apparatus, a target operation mode of the tension control apparatus may be received, a first tension value may be generated by measuring tension of a string connected to a sensor using the sensor, a first control signal for controlling a motor connected to the string may be generated based on the first tension value and the target operation mode, and tension of the string may be controlled by controlling the motor based on the first control signal.

Classes IPC  ?

• A63B 21/005 - Appareils de gymnastique pour développer ou fortifier les muscles ou les articulations du corps en surmontant des résistances, avec ou sans dispositifs de mesure utilisant des dispositifs résistants électromagnétiques ou électriques
• A63B 21/00 - Appareils de gymnastique pour développer ou fortifier les muscles ou les articulations du corps en surmontant des résistances, avec ou sans dispositifs de mesure
• A63B 24/00 - Commandes électriques ou électroniques pour les appareils d'exercice des groupes

Abrégé

The disclosure relates to a method for performing conditional handover (CHO) for a group of user equipment's (UE) connected to a moving node. The method comprises determining, by a source node, whether a conditional handover (CHO) is configured for the moving node, transmitting, by the source node, a conditional handover request message along with information to one or more target nodes based on the determination, wherein the information indicates a number of a plurality of user equipment (UEs) and the associated capability of each of the plurality of user equipments (UEs) in the group of UEs connected to the moving node, determining whether the one or more target nodes support the conditional handover for the moving node based on the received information, and performing the conditional handover for the moving node based on the determination, wherein performing the conditional handover for the moving node also comprises performing the handover for the group of UEs connected to the moving node.

Classes IPC  ?

• H04W 36/36 - Contrôle de resélection par un équipement d'abonné ou un équipement terminal
• H04W 36/00 - Dispositions pour le transfert ou la resélection
• H04W 36/08 - Resélection d'un point d'accès
• H04W 76/20 - Gestion de connexions établies

Abrégé

Apparatuses and methods for codebook subset restriction for coherent joint transmission in wireless networks. A method includes receiving information about a channel state information (CSI) report associated with NTRP>1 groups of antenna ports. The information indicates (i) a coherent joint transmission (CJT) codebook, (ii) a rank restriction, and (iii) NTRP codebook subset restrictions (CBSRs). The method further includes identifying, based on the rank restriction, a set S1 of one or more rank values allowed for the CSI report; identifying, based on the NTRP CBSRs, sets S2,1, . . . , S2,NTRP; determining the CSI report associated with the NTRP groups of antenna ports based on the CJT codebook, the set S1, and the sets S2,1, . . . , S2,NTRP; and transmitting the CSI report. For n=1, . . . , NTRP, the set S2,n is associated with n-th groups of antenna ports of the NTRP groups of antenna ports. The set S2,n includes spatial-domain (SD) basis vectors that are allowed for the CSI report.

Classes IPC  ?

• H04B 7/06 - Systèmes de diversité; Systèmes à plusieurs antennes, c. à d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission

Abrégé

A system and a method for determining semantic points in a human-to-human conversation is provided. The method includes identifying the human-to-human conversation including a plurality of dialogue turns and determining natural language (NL) attributes form each dialogue turn. Further, the method includes deriving a transient state, based on the one or more NL attributes. Further, the method includes deriving one or more conversation nuances associated with the human-to-human conversation based on the one or more NL attributes. Moreover, the method includes dynamically storing information associated with the human-to-human conversation based on the one or more NL attributes, the transient state, and the one or more conversation nuances associated with each dialogue turn and determining one or more semantic relations and associated dialogue timelines within the human-to-human conversation based on the dynamically stored information. Additionally, the method includes generating semantic points corresponding to the determined one or more semantic relations and the associated dialogue timelines within the human-to-human conversation.

Classes IPC  ?

• G06F 40/35 - Représentation du discours ou du dialogue
• G06F 40/166 - Traitement de texte Édition, p.ex. insertion ou suppression

Abrégé

A fine dust measurement module includes a fluid inlet through which a fluid including fine dust is introduced, a first channel through which first fine dust having at least a first diameter, among the fine dust introduced into the fluid inlet, passes, a second channel through which second fine dust having a second diameter that is less than the first diameter, among the fine dust introduced into the fluid inlet, passes, a fine dust detection sensor for sensing fine dust flowing into the second channel, a heater above the fine dust detection sensor, and an orifice upstream of a flow of the second fine dust from the fine dust detection sensor and the heater.

Classes IPC  ?

• G01N 15/02 - Recherche de la dimension ou de la distribution des dimensions des particules
• G01N 15/06 - Recherche de la concentration des suspensions de particules

Abrégé

A generalized low-density parity-check (G-LDPC) encoder, including a plurality of generalized constraint (GC) encoders configured to perform a plurality of GC encoding operations in parallel based on a GC code having a quasi-cyclic (QC) structure including information variable nodes, inner parity variable nodes, and super check nodes configured to perform multiple condition checks, wherein each GC encoder of the plurality of GC encoders includes a plurality of first logic circuits configured to perform a GC encoding operation of the plurality of GC encoding operations; and an LDPC encoder configured to perform an LDPC encoding operation based on an LDPC code having the QC structure, wherein the LDPC encoder includes a plurality of single check nodes configured to perform a single parity check, wherein the each GC encoder is configured to receive information bits, and to determine parity bits of a portion of inner parity bits corresponding to the information bits by enabling only a portion of the plurality of first logic circuits to perform the GC encoding operation, and wherein the LDPC encoder is configured to: obtain the inner parity bits by combining the parity bits obtained from the plurality of GC encoders, determine outer parity bits corresponding to the information bits and the inner parity bits by performing the LDPC encoding operation, and output the information bits, the inner parity bits, and the outer parity bits as a codeword.

Classes IPC  ?

• H03M 13/11 - Détection d'erreurs ou correction d'erreurs transmises par redondance dans la représentation des données, c.à d. mots de code contenant plus de chiffres que les mots source utilisant un codage par blocs, c.à d. un nombre prédéterminé de bits de contrôle ajouté à un nombre prédéterminé de bits d'information utilisant plusieurs bits de parité

Abrégé

An electronic device is provided. The electronic device includes a hinge housing extending in a direction of a rotational axis, a first housing connected to one side of the hinge housing in a direction perpendicular to the rotational axis to rotate about the rotational axis relative to the hinge housing, a second housing connected to an opposite side of the hinge housing in a direction perpendicular to the rotational axis to rotate about the rotational axis relative to the hinge housing, and a flexible display including a bending area at least partially disposed in the hinge housing and formed to be a flat surface or a curved surface, a first area extending from the bending area in one direction perpendicular to the rotational axis, and a second area extending from the bending area in an opposite direction perpendicular to the rotational axis.

Classes IPC  ?

• H05K 5/00 - Enveloppes, coffrets ou tiroirs pour appareils électriques
• H04M 1/02 - Caractéristiques de structure des appareils téléphoniques
• H04M 1/18 - Appareils téléphoniques spécialement adaptés à la marine, les mines ou d'autres endroits exposés aux dangers d'environnement
• H05K 5/02 - Enveloppes, coffrets ou tiroirs pour appareils électriques - Détails

Abrégé

A semiconductor package includes a package substrate, an interposer mounted on the package substrate via first conductive bumps; first and second semiconductor devices on the interposer and spaced apart from each other, mounted on the interposer via second conductive bumps and having concavo-convex patterns respectively formed in upper surfaces thereof; and a sealing member on the interposer covering the first and second semiconductor devices and exposing the concavo-convex patterns. The concavo-convex pattern of the first semiconductor device includes a plurality of first pillar structures provided in the upper surface of a first region of the first semiconductor device and having a first width, and a plurality of second pillar structures provided in the upper surface of a second region of the first semiconductor device and having a second width greater than the first width.

Classes IPC  ?

• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition
• H01L 23/367 - Refroidissement facilité par la forme du dispositif
• H01L 23/373 - Refroidissement facilité par l'emploi de matériaux particuliers pour le dispositif
• H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe

Abrégé

A semiconductor memory device may include a cell substrate; a mold structure including a plurality of gate electrodes stacked on the cell substrate; a channel structure penetrating the mold structure; a string select line on the mold structure; a string select channel structure penetrating the string select line and contacting the channel structure; an anti-arcing contact penetrating the mold structure; an insulating pattern between the anti-arcing contact and the plurality of gate electrodes; and an anti-arcing insulating pattern penetrating the string select line to be in contact with the anti-arcing contact.

Classes IPC  ?

• G11C 16/04 - Mémoires mortes programmables effaçables programmables électriquement utilisant des transistors à seuil variable, p.ex. FAMOS
• H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
• H10B 41/10 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la configuration vue du dessus
• H10B 41/27 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par les agencements tridimensionnels, p ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p.ex. avec des canaux inclinés les canaux comprenant des parties verticales, p.ex. des canaux en forme de U
• H10B 41/35 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la région noyau de mémoire avec un transistor de sélection de cellules, p.ex. NON-ET
• H10B 41/40 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la région de circuit périphérique
• H10B 43/10 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la configuration vue du dessus
• H10B 43/27 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par les agencements tridimensionnels, p ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p.ex. avec des canaux inclinés les canaux comprenant des parties verticales, p.ex. des canaux en forme de U
• H10B 43/35 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la région noyau de mémoire avec transistors de sélection de cellules, p.ex. NON-ET
• H10B 43/40 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la région de circuit périphérique
• H10B 80/00 - Ensembles de plusieurs dispositifs comprenant au moins un dispositif de mémoire couvert par la présente sous-classe

Abrégé

A method of providing information related to placing an object in a space includes obtaining three-dimensional spatial data corresponding to the space and object-related data for first objects in the space, obtaining a spatial graph including positional relations between the first objects in the space, based on the three-dimensional spatial data and the object-related data, receiving a user input for changing an object placement in the space, based on the user input, adding, to the spatial graph, an empty node representing a second object to be placed in an empty region in the space in which the first objects are not placed, updating the spatial graph by applying, to a graph neural network (GNN), the spatial graph to which the empty node has been added, and outputting object placement change-related information for the space, based on the updated spatial graph.

Classes IPC  ?

• G06T 19/20 - Transformation de modèles ou d'images tridimensionnels [3D] pour infographie Édition d'images tridimensionnelles [3D], p.ex. modification de formes ou de couleurs, alignement d'objets ou positionnements de parties
• G06T 7/13 - Détection de bords
• G06T 7/73 - Détermination de la position ou de l'orientation des objets ou des caméras utilisant des procédés basés sur les caractéristiques

Abrégé

An electronic device includes: a hinge structure; a first housing connected to the hinge structure and including a first surface and a second surface; a second housing connected to the hinge structure and including a third surface and a fourth surface; a flexible display; a touch sensor; memory; and a processor, wherein the memory stores instructions configured to cause, when executed by the processor, the electronic device to, identify first coordinate information of at least one object on a first area of the flexible display and second coordinate information of the at least one object on a second area of the flexible display by using the touch sensor; and on the basis of the identified first coordinate information and the identified second coordinate information, identify three-dimensional coordinate information of the at least one object in the space formed by the first surface and the third surface.

Classes IPC  ?

• G06F 3/041 - Numériseurs, p.ex. pour des écrans ou des pavés tactiles, caractérisés par les moyens de transduction
• G06F 1/16 - TRAITEMENT ÉLECTRIQUE DE DONNÉES NUMÉRIQUES - Détails non couverts par les groupes et - Détails ou dispositions de structure

Abrégé

A semiconductor design optimization system that includes: a data base configured to store design data, a training data preprocessing unit configured to preprocess the design data and generate training data, a data learning unit configured to generate a physical property prediction model by training using the training data, a physical property prediction unit configured to generate predicted physical property data including information associated with predicted physical property values for each region of a semiconductor device to be fabricated, wherein the physical property prediction unit is configured to input, into the physical property prediction model, input data including information associated with design drawings of the semiconductor device to be fabricated, and a layout generator configured generate a design layout optimized to distribute the predicted physical property values for each region of the semiconductor device to be fabricated by modifying the design drawings based on the predicted physical property data.

Classes IPC  ?

• G06F 30/392 - Conception de plans ou d’agencements, p.ex. partitionnement ou positionnement
• G06N 20/00 - Apprentissage automatique

Abrégé

A semiconductor memory device according to the present inventive concept includes: a semiconductor substrate; a common source semiconductor layer doped with impurities of a first conductivity type on the semiconductor substrate; a plurality of insulating layers and a plurality of word line structures alternately stacked on the common source semiconductor layer; and a memory cell dielectric layer penetrating the plurality of insulating layers and the plurality of word line structures and covering an internal wall of a channel hole extending in a vertical direction, and a memory cell structure filling the channel hole. The memory cell structure includes a channel layer, which has the memory cell dielectric layer thereon and fills at least a portion of the channel hole, and a drain layer covering an upper surface of the channel layer, doped with impurities of a second conductivity type, and filling some of an upper portion of the channel hole.

Classes IPC  ?

• G11C 11/402 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliers; Eléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des dispositifs à semi-conducteurs utilisant des transistors formant des cellules nécessitant un rafraîchissement ou une régénération de la charge, c. à d. cellules dynamiques avec régénération de la charge propre à chaque cellule de mémoire, c. à d. rafraîchissement interne
• G11C 11/39 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliers; Eléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des dispositifs à semi-conducteurs utilisant des thyristors
• H01L 27/102 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration répétitive comprenant des composants bipolaires
• H01L 29/66 - Types de dispositifs semi-conducteurs
• H01L 29/749 - Dispositifs du type thyristor, p.ex. avec un fonctionnement par régénération à quatre zones amorcés par effet de champ

Abrégé

Disclosed is a method for programming a storage device including a nonvolatile memory device and a storage controller for storing multi-bit data, programming, by the storage controller, the multi-bit data into the nonvolatile memory device based on a pre-programming operation, reading state group data of the multi-bit data generated in the nonvolatile memory device based on a program result of the pre-programming operation, and performing, by the storage controller, error correction decoding on the state group data.

Classes IPC  ?

• G11C 29/52 - Protection du contenu des mémoires; Détection d'erreurs dans le contenu des mémoires
• G11C 16/10 - Circuits de programmation ou d'entrée de données
• G11C 16/34 - Détermination de l'état de programmation, p.ex. de la tension de seuil, de la surprogrammation ou de la sousprogrammation, de la rétention

Abrégé

An apparatus including a receiver and a processor configured to generate a modulus switch ciphertext by performing modulus switching with respect to data received by the receiver, the modulus switching including mapping a component of an input ciphertext generated from the received data to an odd number, generate a blind rotated ciphertext by performing a blind rotation operation based on the modulus switched ciphertext, and generate encrypted data, as a homomorphic encryption operation result, by performing key switching based on the blind rotated ciphertext.

Classes IPC  ?

• H04L 9/00 - Dispositions pour les communications secrètes ou protégées; Protocoles réseaux de sécurité
• H04L 9/06 - Dispositions pour les communications secrètes ou protégées; Protocoles réseaux de sécurité l'appareil de chiffrement utilisant des registres à décalage ou des mémoires pour le codage par blocs, p.ex. système DES

Abrégé

An electronic device includes a display; a conductive plate supporting the display; a bracket including a surface and a structure at least partially removed from the surface, wherein the surface faces toward the conductive plate and is spaced apart from the conductive plate; a connecting member crossing the structure along the surface and connecting the conductive plate and the bracket, the connecting member including a first conductive portion and a second conductive portion; and a conductive tape between the connecting member and the bracket, wherein the first conductive portion overlaps with the structure when viewed from a first direction toward the display and is at least partially inserted into the structure, at least part of the first conductive portion contacts the conductive plate, and the second conductive portion extends from the first conductive portion along a surface of the bracket and has an end attached to the bracket through the conductive tape.

Classes IPC  ?

• G06F 1/16 - TRAITEMENT ÉLECTRIQUE DE DONNÉES NUMÉRIQUES - Détails non couverts par les groupes et - Détails ou dispositions de structure

Abrégé

Method and apparatuses for channel state information (CSI) reporting based on a window of basis vectors are provided. A method includes receiving a configuration about a CSI report including information about NTRP non-zero power (NZP) CSI-reference signal (RS) resources, where NTRP≥1, and a parameter codebookType set to type-II-CJT-r18 or type-II-PortSelection-CJT-r18. The method further includes determining, for each layer l=1, . . . , v, an indicator for indicating an index of a strongest coefficient among KlNZ coefficients, where KlNZ is a total number of non-zero coefficients that are associated with Z NZP CSI-RS resources and Z≤NTRP, and a number of bits Pl for the indicator. The method further includes transmitting the CSI report including, for each layer, Pl bits for the indicator. When codebookType=type-II-CJT-r18, a value of Pl depends on a value of KlNZ or a value of Σr=1Z Lr. When codebookType=type-II-PortSelection-CJT-r18, the value of Pl depends on a value of 2Mv Σr=1Z Lr.

Classes IPC  ?

• H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
• H04B 7/06 - Systèmes de diversité; Systèmes à plusieurs antennes, c. à d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission

Abrégé

The disclosure provides a method of supporting communication by using a satellite in a wireless communication system including transmitting, by a user equipment (UE), a registration request message for accessing a public land mobile network (PLMN) to an access and mobility management function (AMF) through a satellite radio access network (RAN), receiving, by the UE, a registration reject message from the AMF through the satellite RAN in response to the transmitted registration request message, and storing the PLMN in a PLMN list not allowed in a current location of the UE based on a cause value included in the received registration reject message.

Classes IPC  ?

• H04W 60/04 - Rattachement à un réseau, p.ex. enregistrement; Suppression du rattachement à un réseau, p.ex. annulation de l'enregistrement utilisant des événements déclenchés
• H04W 48/16 - Exploration; Traitement d'informations sur les restrictions d'accès ou les accès

Abrégé

A method for manufacturing a semiconductor device, including forming a step key on a substrate, forming a mold layer on the step key covering the step key, forming a first mask layer on the mold layer, forming a transparent layer in the first mask layer overlapping the step key, forming a second mask layer on the first mask layer and the transparent layer, etching the mold layer using the second mask layer, wherein the first mask layer includes a metal material.

Classes IPC  ?

• H01L 21/033 - Fabrication de masques sur des corps semi-conducteurs pour traitement photolithographique ultérieur, non prévue dans le groupe ou comportant des couches inorganiques
• G03F 7/00 - Production par voie photomécanique, p.ex. photolithographique, de surfaces texturées, p.ex. surfaces imprimées; Matériaux à cet effet, p.ex. comportant des photoréserves; Appareillages spécialement adaptés à cet effet
• H01L 23/544 - Marques appliquées sur le dispositif semi-conducteur, p.ex. marques de repérage, schémas de test
• H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
• H10B 43/27 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par les agencements tridimensionnels, p ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p.ex. avec des canaux inclinés les canaux comprenant des parties verticales, p.ex. des canaux en forme de U

Abrégé

An image sensor includes a substrate having a plurality of first pixel regions configured to generate image information and a plurality of second pixel regions configured to detect phase information, a grid pattern on the substrate and dividing a plurality of spaces corresponding to each of the plurality of first pixel regions and the plurality of second pixel regions. The image sensor also includes a plurality of color filters respectively in first spaces of the plurality of spaces, excluding second spaces corresponding to the plurality of second pixel regions, a plurality of polarization patterns respectively in the second spaces and partitioning the second spaces, and a microlens layer including a plurality of first microlenses respectively on the plurality of color filters.

Classes IPC  ?

• H01L 27/146 - Structures de capteurs d'images

Abrégé

Certain example embodiments relate to a method for selecting wireless ridelity (Wi-Fi) channel for mitigating and/or reducing interference, wherein the method may detect the presence of nearby access points and determine the number of access points by an access point detector module. The method may determine the minimum value of received signal strength indicator (RSSI) by the access point detector module, and may determine the congestion information from the nearby devices by a peer congestion observer module. Furthermore, the method may calculate at least one weighted parameter and select a preferred channel to create a hotspot for communication by a channel selector module.

Classes IPC  ?

• H04W 28/02 - Gestion du trafic, p.ex. régulation de flux ou d'encombrement

Abrégé

Disclosed is a memory device that includes a memory cell array having a plurality of memory blocks, a sense amplifier connected to the plurality of memory blocks and configured to perform an offset compensating operation in response to an offset compensation signal, and an offset time adjustment circuit connected to the sense amplifier and configured to adjust an execution time of the offset compensating operation based on a comparison result of a voltage at an equalization voltage node and a reference offset voltage.

Classes IPC  ?

• G11C 7/06 - Amplificateurs de lecture; Circuits associés
• G11C 5/14 - Dispositions pour l'alimentation
• G11C 7/22 - Circuits de synchronisation ou d'horloge pour la lecture-écriture [R-W]; Générateurs ou gestion de signaux de commande pour la lecture-écriture [R-W]

Abrégé

An electronic device according to various embodiments of the present invention may comprise: a housing comprising a first surface facing in a first direction and a second surface facing in a second direction that is opposite to the first direction, the first surface comprising an at least partially transparent part and at least one opening formed adjacent to the at least partially transparent part; a camera positioned inside the housing, the camera comprising an image sensor facing in the first direction through the at least partially transparent part of the housing; and an acoustic component arranged between the first surface and the second surface, the acoustic component comprising a vibration plate configured to generate a sound such that the same moves in at least one direction selected from the first and second directions, a first passage formed in a third direction that is substantially perpendicular to the first direction such that the generated sound passes through the same, and a second passage formed along a fourth direction that is different from the third direction so as to connect the first passage and the at least one opening; a wireless communication circuit positioned inside the housing and electrically connected to the acoustic component so as to provide the acoustic component with a signal regarding the sound; a display exposed through the first surface and positioned adjacent to the camera; and a processor positioned inside the housing and electrically connected to the camera, the acoustic component, the wireless communication circuit, and the display. Various other embodiments are also possible.

Classes IPC  ?

• H04R 1/02 - Boîtiers; Meubles; Montages à l'intérieur de ceux-ci
• H04M 1/03 - Caractéristiques de structure des microphones ou écouteurs, p.ex. appareils téléphoniques portatifs
• H04N 23/54 - Montage de tubes analyseurs, de capteurs d'images électroniques, de bobines de déviation ou de focalisation
• H04R 1/34 - Dispositions pour obtenir la fréquence désirée ou les caractéristiques directionnelles pour obtenir la caractéristique directionnelle désirée uniquement en utilisant un seul transducteur avec des moyens réfléchissant, diffractant, dirigeant ou guidant des sons
• H04R 3/00 - Circuits pour transducteurs

Abrégé

Apparatuses and methods for enhancement to standalone operation for higher frequency range in a wireless communication system. A method includes receiving a synchronization signals and physical broadcast channel (SS/PBCH) block and determining a set of configurations for a control resource set (CORESET#0) to receive a TypeO physical downlink control channel (Type0-PDCCH). The set of configurations includes a multiplexing pattern between the CORESET#0 and the SS/PBCH block; a number NRRBCORESET#0 of resource blocks (RBs) for the CORESET#0; a number NsymbolCORESET#0 of symbols for the CORESET#0; and a frequency offset between the CORESET#0 and the SS/PBCH block. For a first multiplexing pattern between the CORESET#0 and the SS/PBCH block, the frequency offset between the CORESET#0 and the SS/PBCH block is determined as one of 0, NRBCORESET#0−NRBSSB, or (NRBCORESET#0−NRBSSB)/2. The method further includes receiving the Type0-PDCCH based on the set of configurations for the CORESET#0 over a downlink channel.

Classes IPC  ?

• H04W 72/23 - Canaux de commande ou signalisation pour la gestion des ressources dans le sens descendant de la liaison sans fil, c. à d. en direction du terminal
• H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission

Abrégé

A semiconductor package includes a package substrate, a semiconductor chip on the package substrate, a transparent substrate on the semiconductor chip, a dam structure between the semiconductor chip and the transparent substrate, a dummy pad on a lower side of the dam structure and to which no wiring is connected, a planarization film extending along an upper surface of the semiconductor chip and a passivation film on the planarization film, wherein the planarization film is spaced apart from the dam structure.

Classes IPC  ?

• H01L 27/146 - Structures de capteurs d'images
• H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

Provided is a method of updating a firmware of a vacuum cleaner including a station and a cleaner body. The method includes receiving, by the cleaner body, a firmware update condition check request from the station when a new version of the firmware exists, checking, by the cleaner body, whether firmware update conditions have been satisfied, transmitting, by the cleaner body, a result of the checking to the station, and when the firmware update conditions are satisfied and a user agrees to update the firmware, receiving, by the cleaner body, the new version of the firmware, and installing, by the cleaner body, the received new version of the firmware. The firmware update conditions include at least one of a communication condition, a location condition, or a battery condition of the cleaner body.

Classes IPC  ?

• G06F 8/65 - Mises à jour
• A47L 9/00 - LAVAGE OU NETTOYAGE DOMESTIQUE; ASPIRATEURS EN GÉNÉRAL - Parties constitutives ou accessoires des aspirateurs, p.ex. moyens mécaniques pour commander l'aspiration ou pour entraîner une action de battement; Dispositifs de rangement spécialement conçus pour les aspirateurs ou les pièces de ceux-ci; Véhicules porteurs spécialement conçus pour les aspirateurs
• A47L 9/28 - Montage de l'équipement électrique, p.ex. adaptation ou fixation à l'aspirateur; Commande des aspirateurs par des moyens électriques
• G06F 9/451 - Dispositions d’exécution pour interfaces utilisateur

Abrégé

An electronic apparatus includes: one or more processors are configured to: display a list comprising (i) a first group that includes one or more first graphic user interface (GUI) items and (ii) a second group that includes one or more second GUI items, display a title of the first group on at least one of an upper end or a lower end of a display of the one or more first GUI items on the display, display a title of the second group on at least one of an upper end or a lower end of a display of the second group on the display, and display a modified title of one of the first group and the second group by changing a title width of at least one of the first group or the second group on the display.

Classes IPC  ?

• G06F 3/0482 - Interaction avec des listes d’éléments sélectionnables, p.ex. des menus
• G06F 3/04845 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] pour la commande de fonctions ou d’opérations spécifiques, p.ex. sélection ou transformation d’un objet, d’une image ou d’un élément de texte affiché, détermination d’une valeur de paramètre ou sélection d’une plage de valeurs pour la transformation d’images, p.ex. glissement, rotation, agrandissement ou changement de couleur
• G06F 3/0485 - Défilement ou défilement panoramique

Abrégé

A substrate treating apparatus includes a chamber having a gate through which a substrate is loaded into the chamber and unloaded from the chamber, a gas supply unit in an upper portion in the chamber and configured to supply gas into the chamber, a spin coater in a lower portion in the chamber and including a spin chuck configured to support and rotate the substrate on an upper surface thereof and a cup portion extending around the substrate and configured to collect and discharge a chemical liquid from the substrate, a chemical liquid supply unit configured to supply a chemical liquid onto the substrate, and a heater between the substrate and the gas supply unit and configured to heat the substrate.

Classes IPC  ?

• G03F 7/16 - Procédés de couchage; Appareillages à cet effet

Abrégé

A system may include a receiver to receive a task. The task may include a portion of an algorithm, and may include a task power level and a task precision. The system may also include a circuit including a circuit power level and a circuit precision. The system may include first software to identify the circuit, and second software to assign the task to the circuit to reduce total power. The circuit precision may be greater than the task precision.

Classes IPC  ?

• G06F 9/50 - Allocation de ressources, p.ex. de l'unité centrale de traitement [UCT]
• G06F 1/3228 - Surveillance d’exécution de tâches, p.ex. par utilisation de temporisations d’attente, de commandes d’arrêt ou de commandes d’attente
• G06F 1/329 - Gestion de l’alimentation, c. à d. passage en mode d’économie d’énergie amorcé par événements Économie d’énergie caractérisée par l'action entreprise par planification de tâches
• G06F 9/30 - Dispositions pour exécuter des instructions machines, p.ex. décodage d'instructions
• G06F 9/38 - Exécution simultanée d'instructions
• G06F 9/48 - Lancement de programmes; Commutation de programmes, p.ex. par interruption

Abrégé

Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a base semiconductor chip, a chip structure on the base semiconductor chip, a connection terminal between the base semiconductor chip and the chip structure, and a molding layer surrounding the chip structure and the connection terminal. The chip structure includes a first semiconductor chip including a first frontside pad and a first backside pad, and a second semiconductor including a second frontside pad and a second backside pad. A lateral surface of the first semiconductor chip is aligned with that of the second semiconductor chip. The first backside pad and the second frontside pad partially overlap each other when viewed in plan while being in direct contact with each other. The first backside pad and the second frontside pad include the same metal and are formed into a single unitary piece.

Classes IPC  ?

• H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition
• H01L 21/56 - Capsulations, p.ex. couches de capsulation, revêtements
• H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe

Abrégé

A semiconductor device includes: a substrate including an upper surface and a lower surface opposite to the upper surface; an active pattern disposed on the upper surface of the substrate and extending in a first direction; a field insulating film disposed on the upper surface of the substrate and covering a sidewall of the active pattern; a power rail disposed on the lower surface of the substrate and extending in the first direction; a trench formed in the substrate and exposing a portion of the power rail; and a metal pattern filling at least a portion of the trench and connected to the power rail, wherein a bottom surface of the trench is substantially coplanar with the lower surface of the substrate, wherein a sidewall of the trench has a convex shape, and wherein at least a portion of the field insulating film is disposed in the trench.

Classes IPC  ?

• H01L 23/528 - Configuration de la structure d'interconnexion
• H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
• H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
• H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique

Abrégé

One embodiment provides a computer-implemented method that includes receiving content having a first resolution. The processor splits the content into most significant bits and least significant bits. The processor further performs processing of the most significant bits of the content while preserving the least significant bits. The processor additionally performs a linear combination of outputs of the processing of the most significant bits with the preserved least significant bits for improving quality of the content.

Classes IPC  ?

• G06T 5/00 - Amélioration ou restauration d'image
• G06T 3/40 - Changement d'échelle d'une image entière ou d'une partie d'image

Abrégé

Provided is a method, performed by a server, of providing a personalized spatial map, the method comprising: obtaining a first spatial map including first map features representing spatial information about a space; obtaining a second spatial map based on sensor data obtained by measuring the space, the second spatial map including second map features; identifying third map features for map alignment from among the first map features and the second map features; aligning the first spatial map and the second spatial map, based on the identified third map features; identifying local areas in the space where at least one difference exists between the first spatial map and the second spatial map; and generating the personalized spatial map by identifying pieces of spatial information about the local areas based on the second map features.

Classes IPC  ?

• G01C 21/00 - Navigation; Instruments de navigation non prévus dans les groupes
• G01C 21/20 - Instruments pour effectuer des calculs de navigation
• G01C 21/32 - Structuration ou formatage de données cartographiques

Abrégé

A vertical semiconductor device includes; a pattern structure including a plurality of insulation patterns and a plurality of gate electrodes that are alternately and repeatedly stacked on a substrate, wherein the pattern structure includes a first gate electrode serving as a gate electrode of an erase transistor, wherein the first gate electrode is one of the plurality of gate electrodes; and a channel structure in a channel hole passing through the pattern structure, wherein the channel structure includes a data storage structure, a first channel, an undoped semiconductor liner, a doped semiconductor pattern, a filling insulation pattern and a capping pattern, wherein the data storage structure, the first channel, the undoped semiconductor liner, and the doped semiconductor pattern are sequentially disposed on a sidewall of the first gate electrode.

Classes IPC  ?

• H10B 43/27 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par les agencements tridimensionnels, p ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p.ex. avec des canaux inclinés les canaux comprenant des parties verticales, p.ex. des canaux en forme de U

Abrégé

A method of controlling an electronic device by using spatial information and an electronic device using spatial information are provided. The method includes selecting, based on spatial information about a space including at least one object and a task that the electronic device is set to perform, an object that obstructs the task from among objects located in a space corresponding to the task, providing a user of the electronic device with object movement guide information corresponding to attribute information about the selected object, determining a movement path used to perform the task, based on a user's response corresponding to the object movement guide information, and driving the electronic device according to the determined movement path.

Classes IPC  ?

• G06T 7/20 - Analyse du mouvement
• B25J 9/16 - Commandes à programme
• G06T 7/70 - Détermination de la position ou de l'orientation des objets ou des caméras
• G06T 17/05 - Modèles géographiques

Abrégé

A vertical memory device includes a substrate, first and second sub-semiconductor patterns, first and second common source contacts, and first and second cell structures. The substrate includes a first region and a second region having a same length as the first region in a first direction, the first region having a first width in a second direction perpendicular to the first direction, and the second region having a second width in the second direction that is less than the first width. The first sub-semiconductor pattern covers the first region, and a portion of the first sub-semiconductor pattern has a first thickness. The second sub-semiconductor pattern covers the second region and has a second thickness that is less than the first thickness. The first and second common source contacts are disposed on edges in the second direction of the first and second patterns, respectively.

Classes IPC  ?

• H10B 41/27 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par les agencements tridimensionnels, p ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p.ex. avec des canaux inclinés les canaux comprenant des parties verticales, p.ex. des canaux en forme de U
• H10B 41/10 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la configuration vue du dessus
• H10B 43/10 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la configuration vue du dessus
• H10B 43/27 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par les agencements tridimensionnels, p ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p.ex. avec des canaux inclinés les canaux comprenant des parties verticales, p.ex. des canaux en forme de U

Abrégé

A method of generating a three-dimensional (3D) model and a device for generating a 3D model are provided. The method includes generating a base 3D model of an object, determining a first target 3D model similar to the base 3D model from a 3D model database storing a plurality of 3D models, generating a first synthesized 3D model, determining a first similarity between the first synthesized 3D model and the at least one object image, determining a component having a low similarity between the first synthesized 3D model and the at least one object image, determining, as a second target 3D model, a 3D model having a high similarity to the first synthesized 3D model with respect to the component having the low similarity, from the 3D model database, and generating a second synthesized 3D model.

Classes IPC  ?

• G06T 17/00 - Modélisation tridimensionnelle [3D] pour infographie
• G06T 7/50 - Récupération de la profondeur ou de la forme
• G06T 7/70 - Détermination de la position ou de l'orientation des objets ou des caméras
• G06T 19/20 - Transformation de modèles ou d'images tridimensionnels [3D] pour infographie Édition d'images tridimensionnelles [3D], p.ex. modification de formes ou de couleurs, alignement d'objets ou positionnements de parties
• G06V 10/764 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant la classification, p.ex. des objets vidéo

Abrégé

Provided are a heterocyclic compound represented by Formula 1, an organic light-emitting device including the same, and a diagnostic composition including the heterocyclic compound as described in the detailed description. Provided are a heterocyclic compound represented by Formula 1, an organic light-emitting device including the same, and a diagnostic composition including the heterocyclic compound as described in the detailed description.

Classes IPC  ?

• C07F 5/02 - Composés du bore
• C09K 11/06 - Substances luminescentes, p.ex. électroluminescentes, chimiluminescentes contenant des substances organiques luminescentes
• H10K 50/12 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] comprenant des dopants
• H10K 85/60 - Composés organiques à faible poids moléculaire

Abrégé

Provided are a level sensor configured to detect a height level of a substrate, and a substrate processing apparatus including the level sensor. The level sensor includes a measurement light source configured to radiate measurement light toward the substrate, a prism configured to split reflected light of the measurement light into first polarized light and second polarized light and generate a first optical path length difference between the first polarized light and the second polarized light, an optical path length modulator configured to keep constant an optical path length of the first polarized light and periodically change an optical path length of the second polarized light, and a detector configured to detect the first optical path length difference based on an interference signal between the first polarized light and the second polarized light.

Classes IPC  ?

• G01B 11/06 - Dispositions pour la mesure caractérisées par l'utilisation de techniques optiques pour mesurer la longueur, la largeur ou l'épaisseur pour mesurer l'épaisseur
• G01B 9/02 - Interféromètres

Abrégé

A semiconductor package includes a first redistribution structure, a first semiconductor device mounted on the first redistribution structure, a molding layer surrounding the first semiconductor device, a second redistribution structure disposed on the molding layer and the first semiconductor device, a plurality of vertical connection conductors vertically extending in the molding layer and electrically connecting the first redistribution pattern to the second redistribution pattern, a second semiconductor device mounted on the second redistribution structure, the second semiconductor device and the first semiconductor device vertically and partially overlapping each other, a heat dissipation pad structure contacting an upper surface of the first semiconductor device, and a heat dissipation plate disposed on the heat dissipation pad structure and spaced apart from the second semiconductor device along a first straight line extending in a horizontal direction that is parallel to the upper surface of the first semiconductor device.

Classes IPC  ?

• H01L 23/538 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre la structure d'interconnexion entre une pluralité de puces semi-conductrices se trouvant au-dessus ou à l'intérieur de substrats isolants
• H01L 21/56 - Capsulations, p.ex. couches de capsulation, revêtements
• H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des groupes principaux , ou dans une seule sous-classe de , , p.ex. circuit hybrides
• H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs sous-groupes différents du même groupe principal des groupes , ou dans une seule sous-classe de ,
• H10B 80/00 - Ensembles de plusieurs dispositifs comprenant au moins un dispositif de mémoire couvert par la présente sous-classe

Abrégé

Broadly speaking, embodiments of the present techniques provide a method for reducing errors in the outputs of machine learning, ML, models on a potential output of the models to resolve any inconsistencies before outputting a final result from the models. The final result respects a set of rules or constraints, which may include logical constraints. Advantageously, this reduces the risk of a model outputting a result which violates some rules associated with the overall task of the model, which could be dangerous or provide a poor user experience.

Classes IPC  ?

• G06V 10/776 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant l’intégration et la réduction de données, p.ex. analyse en composantes principales [PCA] ou analyse en composantes indépendantes [ ICA] ou cartes auto-organisatrices [SOM]; Séparation aveugle de source Évaluation des performances
• G06V 10/77 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant l’intégration et la réduction de données, p.ex. analyse en composantes principales [PCA] ou analyse en composantes indépendantes [ ICA] ou cartes auto-organisatrices [SOM]; Séparation aveugle de source

Abrégé

An outdoor unit of an air conditioner, including a housing including an inlet and an outlet, wherein a flow path is formed between the inlet and the outlet inside the housing; a heat exchanger positioned on the flow path inside the housing; and a blower fan inside the housing between the inlet and the heat exchanger, and configured to flow air along the flow path, from the inlet, through the heat exchanger, and toward the outlet, wherein the blower fan includes a hub configured to be rotatable, and a plurality of blades extending from the hub and arranged along a circumference of the hub, each blade among the plurality of blades includes a leading edge at a side of a rotation direction of the hub, a trailing edge opposite to the leading edge, and a blade surface between the leading edge and the trailing edge and inclined toward the inlet from the trailing edge to the leading edge.

Classes IPC  ?

• F24F 1/38 - Climatiseurs individuels pour le conditionnement de l'air, p.ex. éléments séparés ou monoblocs ou éléments recevant l'air primaire d'une station centrale Éléments extérieurs séparés, p.ex. élément extérieur à relier à un élément intérieur séparé comprenant un compresseur et un échangeur de chaleur - Parties constitutives des ventilateurs des éléments extérieurs, p.ex. orifices d'admission évasés ou supports des ventilateurs
• F24F 1/56 - Carters ou capots des éléments extérieurs séparés, p.ex. grilles de protection de ventilateurs

Abrégé

A meta-searching method, including determining a target metaverse for a current search using intent classification based on an inquiry text included in a searching request of a user; extracting a searching clue and a clue type; selecting a current search engine for performing the current search using the target metaverse and the clue type by prioritizing a search engine associated with the target metaverse; performing identity authentication using the user account information of the user in the target metaverse prior to the search based on determining that user account information is required to search for the searching clue for performing a search using the current search engine, and performing the search using the current search engine based on the searching clue; and providing the search results to the user.

Classes IPC  ?

• G06F 16/953 - Requêtes, p.ex. en utilisant des moteurs de recherche du Web
• G06F 16/951 - Indexation; Techniques d’exploration du Web
• G06F 21/31 - Authentification de l’utilisateur

Abrégé

A wafer processing system includes an optical apparatus including a beam splitter configured to receive a laser beam and to split the laser beam into a first beam in a first state of linear polarization and a second beam in a second state of linear polarization; and a beam delayer configured to delay the second beam so that a pulse of the second beam has a delay time with respect to a pulse of the first beam.

Classes IPC  ?

• H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
• G02B 27/14 - Systèmes divisant ou combinant des faisceaux fonctionnant uniquement par réflexion
• G02B 27/28 - Systèmes ou appareils optiques non prévus dans aucun des groupes , pour polariser
• H01L 21/687 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le maintien ou la préhension en utilisant des moyens mécaniques, p.ex. mandrins, pièces de serrage, pinces

Abrégé

A method performed by a terminal in a wireless communication system is provided. The method includes receiving, from a base station, first information indicating at least one DMRS type, via an RRC signaling, receiving, from the base station, second information indicating whether to activate an enhanced DMRS type corresponding to the at least one DMRS type, via a MAC-CE signaling, and in case that the second information indicates activation of the enhanced DMRS type, receiving, from the base station, a PDSCH or transmitting, to the base station, a PUSCH based on the enhanced DMRS type.

Classes IPC  ?

• H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission

Abrégé

An electronic device includes a speaker; a display; a memory; and a processor operatively connected to the speaker, the display, and the memory. The processor is configured to: identify an input indicating to search a multimedia content stored in the memory, the multimedia content comprising a first text and a plurality of images, the input comprising a third text, generate a second text representing the plurality of images, identify, based on the first text and the second text, a portion of the multimedia content, which is matched to the third text, and output, via at least one of the speaker or the display, the portion of the multimedia content.

Classes IPC  ?

• H04L 51/10 - Informations multimédias
• G06F 40/30 - Analyse sémantique
• H04L 51/04 - Messagerie en temps réel ou quasi en temps réel, p.ex. messagerie instantanée [IM]

Abrégé

A smart repeater includes a transceiver configured to receive a reference signal, receive, from a base station (BS), a subcarrier allocation for a plurality of user equipments (UEs), receive, from the BS, a downlink (DL) beam associated with the plurality of UEs, and retransmit the DL beam. The smart repeater further includes a processor, operatively coupled to the transceiver, the processor configured to determine a beam split configuration for the DL beam based on the subcarrier allocation, and cause the transceiver to retransmit the DL beam according to the beam split configuration. To retransmit the DL beam according to the beam split configuration the transceiver is further configured to generate a frequency dependent beam for each of the plurality of UEs, and direct the frequency dependent beam for each of the plurality of UEs to a UE associated with the frequency dependent beam.

Classes IPC  ?

• H04W 16/28 - Structures des cellules utilisant l'orientation du faisceau
• H01Q 3/22 - Dispositifs pour changer ou faire varier l'orientation ou la forme du diagramme de directivité des ondes rayonnées par une antenne ou un système d'antenne faisant varier l'orientation suivant la variation de fréquence de l'onde rayonnée
• H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
• H04W 16/26 - Amplificateurs de cellules, p.ex. pour tunnels ou effet d'écran créé par des immeubles

Abrégé

A semiconductor device includes a substrate, a plurality of semiconductor patterns spaced apart from each other in a first horizontal direction on the substrate, where each of the plurality of semiconductor patterns has first side surfaces opposing each other in the first horizontal direction and second side surfaces opposing each other in a second horizontal direction, the first and second horizontal directions parallel to an upper surface of the substrate, the second horizontal direction perpendicular to the first horizontal direction, source/drain regions on the second side surfaces of each of the plurality of semiconductor patterns, a plurality of gate patterns surrounding upper surfaces, lower surfaces, and the first side surfaces of each of the plurality of semiconductor patterns, a plurality of conductive line patterns connecting the plurality of gate patterns to each other, and data storage structures in parallel to the plurality of semiconductor patterns in the second horizontal direction.

Classes IPC  ?

• H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]

Abrégé

According to an embodiment, a food waste disposer includes a housing having an opening formed on one end thereof, and a door coupled by hinge to open or close the opening of the housing. The door includes a door lever configured to be insertable into a fixing groove provided adjacent to the opening of the housing, a holder lever coupled to the door lever and configured to rotate about a rotation shaft, a pulling member configured to transmit a physical external force applied from the outside to the holder lever such that the holder lever rotates about the rotation shaft, one end of the pulling member being connected to the holder lever, and an actuator configured to generate a force to rotate the holder lever about the rotation shaft, based on an electrical signal.

Classes IPC  ?

• B65F 1/16 - Capots ou couvercles

Abrégé

A method of training an object recognition model by using spatial information is provided. The method includes obtaining spatial information including illumination information corresponding to a plurality of spots in a space, obtaining illumination information corresponding to at least one spot of the plurality of spots from the spatial information, obtaining training data by using the obtained illumination information and an image obtained by capturing the at least one spot, and training a neural network model for object recognition by using the training data.

Classes IPC  ?

• G06V 10/774 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant l’intégration et la réduction de données, p.ex. analyse en composantes principales [PCA] ou analyse en composantes indépendantes [ ICA] ou cartes auto-organisatrices [SOM]; Séparation aveugle de source méthodes de Bootstrap, p.ex. "bagging” ou “boosting”
• G06T 11/20 - Traçage à partir d'éléments de base, p.ex. de lignes ou de cercles
• G06V 10/26 - Segmentation de formes dans le champ d’image; Découpage ou fusion d’éléments d’image visant à établir la région de motif, p.ex. techniques de regroupement; Détection d’occlusion
• G06V 10/60 - Extraction de caractéristiques d’images ou de vidéos relative aux propriétés luminescentes, p.ex. utilisant un modèle de réflectance ou d’éclairage
• G06V 10/74 - Appariement de motifs d’image ou de vidéo; Mesures de proximité dans les espaces de caractéristiques
• G06V 10/82 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant les réseaux neuronaux
• G06V 20/50 - Contexte ou environnement de l’image
• G06V 20/70 - RECONNAISSANCE OU COMPRÉHENSION D’IMAGES OU DE VIDÉOS Éléments spécifiques à la scène Étiquetage du contenu de scène, p.ex. en tirant des représentations syntaxiques ou sémantiques

Abrégé

Provided is a semiconductor package including a lower redistribution structure, an internal semiconductor chip on an upper surface of the lower redistribution structure, an upper redistribution structure electrically connected to the lower redistribution structure through a conductive post, and a molding layer between the upper redistribution structure and the lower redistribution structure, the molding layer being adjacent to the internal semiconductor chip, wherein the upper redistribution structure includes an insulating layer including a redistribution pattern and a first material configured to transmit light, and a fiducial mark formed of the first material, and a lower surface of the fiducial mark is in contact with an upper surface of the molding layer.

Classes IPC  ?

• H01L 23/544 - Marques appliquées sur le dispositif semi-conducteur, p.ex. marques de repérage, schémas de test
• H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition
• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 25/10 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs ayant des conteneurs séparés

Abrégé

An electronic device is provided, which includes a first housing having a first surface, a second surface facing an opposite direction to the first surface, and a first lateral member surrounding a first space between the first surface and the second surface and a second housing, which is connected to the first housing to be foldable about a folding axis by using a hinge structure, and having, in an unfolded state, a third surface facing same direction as the first surface, a fourth surface facing an opposite direction to the third surface, and a second lateral member surrounding a second space between the third surface and the fourth surface. The electronic device includes a first display provided on at least a portion of the first surface and at least a portion of the third surface.

Classes IPC  ?

• H04M 1/72403 - Interfaces utilisateur spécialement adaptées aux téléphones sans fil ou mobiles avec des moyens de soutien local des applications accroissant la fonctionnalité
• G06F 3/041 - Numériseurs, p.ex. pour des écrans ou des pavés tactiles, caractérisés par les moyens de transduction
• H04M 1/02 - Caractéristiques de structure des appareils téléphoniques

Abrégé

An electronic device is provided. The electronic device includes a communication module, a display, and at least one processor operatively connected to the communication module and the display, wherein the at least one processor is configured to, in a state that full screen information on, for mirroring, a full screen displayed on the display is transmitted to an external device via the communication module, identify whether at least one configured condition is satisfied, based on an event occurring, and based on the at least one configured condition being satisfied, transmit, to the external device, information on an execution screen of at least one application among execution screens of applications being displayed on the display, in replacement of the full screen information so as to mirror only the execution screen of the application.

Classes IPC  ?

• G06F 3/14 - Sortie numérique vers un dispositif de visualisation

Abrégé

A refrigerator is disclosed. The refrigerator includes a temperature sensor, a cooling device, and a processor which controls the cooling device such that, when a user command to change the temperature of a storage compartment set to a first temperature to a second temperatures, is input, the temperature of the storage compartment is changed to the second temperature, based on the temperature of the storage compartment sensed by the temperature sensor, and controls the cooling device such that, when a certain period of time elapses after a point in time when the user command is input, the temperature of the storage compartment returns to the first temperature, based on the temperature of the storage compartment sensed by the temperature sensor.

Classes IPC  ?

• F25D 29/00 - Disposition ou montage de l'appareillage de commande ou de sécurité

Abrégé

An electronic device may include an image sensor, a processor, and a memory. The image sensor may include at least one photo diode, a transfer gate connecting the at least one photo diode to a first node (FD1 node), a first capacitor connected to the first node and having first capacitance, a dynamic range gate (DRG) connected between the first node and a second node (FD2 node), a second capacitor connected to the second node and having second capacitance, and a micro controller unit. Other various embodiments identified through the specification are possible.

Classes IPC  ?

• H04N 25/57 - Commande de la gamme dynamique
• H04N 23/51 - Boîtiers
• H04N 23/60 - Commande des caméras ou des modules de caméras
• H04N 25/40 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner
• H04N 25/615 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit le bruit provenant uniquement de l'objectif, p. ex. l'éblouissement, l'ombrage, le vignettage ou le "cos4" impliquant une fonction de transfert modélisant le système optique, p. ex. une fonction de transfert optique [OTF], une fonction de transfert de phase [PhTF] ou une fonction de transfert de modulation [MTF]
• H04N 25/706 - Pixels pour la mesure de l'exposition ou de la lumière ambiante
• H04N 25/772 - Circuits de pixels, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F

Abrégé

Methods and apparatuses for transmission configuration indication (TCI) state indication and association for control and data channels. A method performed by a user equipment (UE) includes receiving first information for first and second groups of configured TCI states; receiving, in a downlink control information (DCI), a first indicated TCI state of a TCI codepoint; and receiving second information for a first control resource set (CORESET). The method further includes identifying, based on the first information, whether the first indicated TCI state is associated with the first or second group of configured TCI states; identifying, based on the second information, whether the first CORESET is associated with the first or second group of configured TCI states; and based on identifying that the first indicated TCI state and the first CORESET are associated with the same group of configured TCI states, receiving physical downlink control channel (PDCCH) candidates in the first CORESET according to the first indicated TCI state.

Classes IPC  ?

• H04W 72/232 - Canaux de commande ou signalisation pour la gestion des ressources dans le sens descendant de la liaison sans fil, c. à d. en direction du terminal les données de commande provenant de la couche physique, p.ex. signalisation DCI
• H04W 72/1263 - Jumelage du trafic à la planification, p.ex. affectation planifiée ou multiplexage de flux

Abrégé

An image sensor includes a substrate and a pixel separation portion disposed in the substrate and separating first pixels and second pixels from each other. The first pixels and the second pixels are alternately arranged in a first direction and a second direction which intersect each other. Each of the first pixels has a first width in the first direction. Each of the second pixels has a second width in the first direction, which is narrower than the first width. The pixel separation portion includes a main separation portion between the first and second pixels, and protrusions, each of which protrudes from a side surface of the main separation portion in at least one of the first and second directions. Ones of the protrusions protrude into a respective one of the first pixels to divide the respective one of the first pixels into a plurality of sub-pixels.

Classes IPC  ?

• H01L 27/146 - Structures de capteurs d'images

Abrégé

Provided a semiconductor memory device. The semiconductor memory device includes a substrate, a gate electrode on the substrate, a bit line on the substrate, a cell semiconductor pattern on a side of the gate electrode and electrically connected to the bit line, a capacitor structure including a first electrode electrically connected to the cell semiconductor pattern, a second electrode on the first electrode, and a capacitor dielectric film between the first electrode and the second electrode, a bit line strapping line spaced apart from the bit line in the second direction, and electrically connected to the bit line, a bit line selection line between the bit line and the bit line strapping line, and a selection semiconductor pattern between the bit line and the bit line strapping line and electrically connected to all of the bit line, the bit line strapping line, and the bit line selection line.

Classes IPC  ?

• G11C 7/18 - Organisation de lignes de bits; Disposition de lignes de bits
• G11C 5/06 - Dispositions pour interconnecter électriquement des éléments d'emmagasinage
• G11C 7/12 - Circuits de commande de lignes de bits, p.ex. circuits d'attaque, de puissance, de tirage vers le haut, d'abaissement, circuits de précharge, circuits d'égalisation, pour lignes de bits

Abrégé

An organometallic compound represented by Formula 1: An organometallic compound represented by Formula 1: M1(L1)n1(L2)n2  Formula 1 wherein, M1 is a transition metal, L1 is a ligand represented by Formula 1A, and L2 is a ligand represented by Formula 1B, and n1 and n2 are each independently 1 or 2, An organometallic compound represented by Formula 1: M1(L1)n1(L2)n2  Formula 1 wherein, M1 is a transition metal, L1 is a ligand represented by Formula 1A, and L2 is a ligand represented by Formula 1B, and n1 and n2 are each independently 1 or 2, wherein X1 and X2 are each independently C or N, Y1 is O, S, Se, C(R5)(R6), or N(R7), X44 is N or C(R44), X45 is N or C(R45), X46 is N or C(R46), and X47 is N or C(R47), and the other substituent groups are as defined herein.

Classes IPC  ?

• C07F 15/00 - Composés contenant des éléments des groupes 8, 9, 10 ou 18 de la classification périodique
• C09K 11/06 - Substances luminescentes, p.ex. électroluminescentes, chimiluminescentes contenant des substances organiques luminescentes
• H10K 50/12 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] comprenant des dopants
• H10K 85/30 - Composés de coordination

Abrégé

Provided is a method of a terminal in a wireless communication system, including receiving DCI for scheduling physical uplink shared control channel (PUSCH) transmission, determining a number of coded modulation symbols per layer for transmission of CSI part 1, based on a number of code blocks associated with a UL-SCH, CUL-SCH, a value Kr for an r-th code block of the code blocks and a number of bits of the CSI part 1, OCSI-1, wherein in case that the DCI includes CBGTI and the CBGTI indicates that the r-th code block associated with the UL-SCH of the PUSCH transmission is not for transmission, the value Kr is determined as 0, and else, the value Kr is determined as a size of the r-th code block for the UL-SCH of the PUSCH transmission; and transmitting, to a base station, the CSI part 1 on the PUSCH based on the number of coded modulation symbols per layer.

Classes IPC  ?

• H04W 72/21 - Canaux de commande ou signalisation pour la gestion des ressources dans le sens ascendant de la liaison sans fil, c. à d. en direction du réseau
• H04L 1/1829 - Dispositions spécialement adaptées au point de réception
• H04W 72/23 - Canaux de commande ou signalisation pour la gestion des ressources dans le sens descendant de la liaison sans fil, c. à d. en direction du terminal

Abrégé

A semiconductor memory device comprises a substrate including a first source/drain region and a second source/drain region, a trench between the first source/drain region and the second source/drain region and formed in the substrate, a cell gate insulating layer on sidewalls and a bottom surface of the trench, a cell gate electrode on the cell gate insulating layer, a work function control pattern on the cell gate electrode, including N-type impurities and a cell gate capping pattern on the work function control pattern. The work function control pattern includes a semiconductor material. The work function control pattern includes a first region and a second region between the first region and the cell gate electrode. A concentration of the N-type impurities in the first region is greater than a concentration of the N-type impurities in the second region.

Classes IPC  ?

• H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]

Abrégé

Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a lower electrode on a substrate, a metal oxide on the lower electrode, a buffer on the metal oxide, an oxide channel in the buffer, a gate insulating layer in the oxide channel, a gate electrode in the gate insulating layer, and an upper electrode on the gate electrode, and the buffer may include a silicide material.

Classes IPC  ?

• H01L 29/45 - Electrodes à contact ohmique
• H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
• H01L 21/443 - Dépôt de matériaux conducteurs ou isolants pour les électrodes à partir d'un gaz ou d'une vapeur, p.ex. condensation
• H01L 29/66 - Types de dispositifs semi-conducteurs
• H01L 29/786 - Transistors à couche mince

Abrégé

A semiconductor package includes a buffer die, semiconductor chip stacks stacked on the buffer die, each of the semiconductor chip stacks including a plurality of first semiconductor chips and a second semiconductor chip on the plurality of first semiconductor chips, and a mold layer covering an upper surface of the buffer die and side surfaces of the semiconductor chip stacks. Each of the first semiconductor chips and the second semiconductor chip includes a wiring part including multilayer wirings, an upper connection structure on the wiring part and having a plurality of upper conductive pads and a lower connection structure under the wiring part and having a plurality of lower conductive pads, and the second semiconductor chip further includes a redistribution layer on the upper connection structure and having an insulating layer and a plurality of redistribution pads in the insulating layer.

Classes IPC  ?

• H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
• H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition
• H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
• H10B 80/00 - Ensembles de plusieurs dispositifs comprenant au moins un dispositif de mémoire couvert par la présente sous-classe

Abrégé

An electronic device is provided. The electronic device includes a display, a communication module, a memory, and at least one processor operatively connected to the display, the communication module, and the memory, wherein the at least one processor is configured to acquire device information of an external device by using the communication module, based on the device information, determine at least one item to be transmitted to the external device from among items displayed in an application being executed on the electronic device, generate view data of the external device, the view data including information on the determined item, and establish a communication connection with the external device so as to transmit view data for transmission.

Classes IPC  ?

• G06F 3/14 - Sortie numérique vers un dispositif de visualisation
• G06F 3/0482 - Interaction avec des listes d’éléments sélectionnables, p.ex. des menus
• G06F 3/0488 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] utilisant des caractéristiques spécifiques fournies par le périphérique d’entrée, p.ex. des fonctions commandées par la rotation d’une souris à deux capteurs, ou par la nature du périphérique d’entrée, p.ex. des gestes en fonction de la pression exer utilisant un écran tactile ou une tablette numérique, p.ex. entrée de commandes par des tracés gestuels

Abrégé

A processor-implemented method with lane line determination includes: determining, from an input image, road feature information comprising a surrounding object and a road surface marking comprising a lane line; matching the road feature information to lane lines of a driving road on which a vehicle is driving; detecting whether there is a change in a road structure based on a result of the matching, wherein the change in the road structure comprises any one or any combination of any two or more of a change of the lane line, a loss of the lane line, and a change of a road sign; and based on whether the change in the road structure is detected, determining lane line information of the driving road by using information on the surrounding object.

Classes IPC  ?

• G06V 20/56 - Contexte ou environnement de l’image à l’extérieur d’un véhicule à partir de capteurs embarqués
• G06V 20/58 - Reconnaissance d’objets en mouvement ou d’obstacles, p.ex. véhicules ou piétons; Reconnaissance des objets de la circulation, p.ex. signalisation routière, feux de signalisation ou routes

Abrégé

An electronic device according to an embodiment of the disclosure includes: a microphone, a communication module including a first communication circuit configured to provide a call channel with a first external electronic device and a second communication circuit configured to provide a communication channel with a second external electronic device, a processor electrically connected with the communication module. The processor is configured to: allow the electronic device operating in a first transmission mode and the first external electronic device to establish a call connection with each other through the first communication circuit, identify whether there is an utterance of a user wearing the second external electronic device, while the call connection is maintained, and operate in a second transmission mode different from the first transmission mode, based on a voice signal of the user to be transmitted to the first external electronic device not being recognized, while the call connection is maintained, and operate in the first transmission mode, based on the voice signal of the user to be transmitted to the first external electronic device being recognized, while the call connection is maintained.

Classes IPC  ?

• H04M 1/60 - COMMUNICATIONS TÉLÉPHONIQUES Équipement de sous-station, p.ex. pour utilisation par l'abonné comprenant des amplificateurs de parole
• G10L 15/02 - Extraction de caractéristiques pour la reconnaissance de la parole; Sélection d'unités de reconnaissance 
• G10L 19/005 - Correction d’erreurs induites par le canal de transmission, lorsqu’elles sont liées à l’algorithme de codage
• G10L 19/012 - Codage du bruit de confort ou du silence
• G10L 25/78 - Détection de la présence ou de l’absence de signaux de voix
• H04R 25/00 - Appareils pour sourds

Abrégé

A data processing system includes a host including a host memory storing file systems, each file system including file pages, and storage devices. Each storage device includes a memory device including memory blocks, and a memory controller dividing the memory blocks into superblocks, and controlling a memory operation of the memory device based on a result of dividing the memory blocks. The host requests a first storage device of the storage devices to write a first file page of a first file system of the file systems to a first memory block of the first storage device, and requests a second storage device of the storage devices to write a second file page of the first file system of the file systems to a first memory block of the second storage device. The first file system is configured in a RAID manner using at least some of the storage devices.

Classes IPC  ?

• G06F 3/06 - Entrée numérique à partir de, ou sortie numérique vers des supports d'enregistrement
• G06F 12/02 - Adressage ou affectation; Réadressage
• G06F 16/174 - Systèmes de fichiers; Serveurs de fichiers - Détails d’autres fonctions de systèmes de fichiers Élimination de redondances par le système de fichiers

Abrégé

A method of performing a multimodal tasks by using a multimodal model that includes a text encoder and a vision encoder, may include obtaining a text feature from the query via the text encoder; obtaining an image feature from the one or more input images via the vision encoder; and outputting a response to the query based on similarity between the text feature and the image feature, wherein weights vectors of the text encoder and the vision encoder are pruned and shared according to a sharing vector and a pruning vector that are generated by a hypernetwork, and wherein the hypernetwork and the multimodal model are jointly trained to minimize at least one of a difference between the weight vectors in the text encoder and the vision encoder, a difference between the weight vectors in different layers of the text encoder, and a number of parameters in the multimodal model.

Classes IPC  ?

• G06F 16/33 - Requêtes
• G06F 16/583 - Recherche caractérisée par l’utilisation de métadonnées, p.ex. de métadonnées ne provenant pas du contenu ou de métadonnées générées manuellement utilisant des métadonnées provenant automatiquement du contenu
• G06N 3/0985 - Optimisation d’hyperparamètres; Meta-apprentissage; Apprendre à apprendre

Abrégé

A semiconductor chip includes a write clock buffer, a voltage regulator, a process calibration circuit and a temperature calibration circuit. The voltage regulator generates plural regulated voltages. The process calibration circuit output one of the regulated voltages as a bias voltage of the write clock buffer, depending on a process variation of the semiconductor chip. The temperature calibration circuit track a temperature variation of the semiconductor chip in real time, performs analog calibration on the bias voltage from the process calibration circuit in real time depending on a result of the tracking, and outputs the analog-calibrated bias voltage to the write clock buffer.

Classes IPC  ?

• G11C 11/4093 - Dispositions d'interface d'entrée/sortie [E/S, I/O] de données, p.ex. mémoires tampon de données
• G11C 11/4074 - Circuits d'alimentation ou de génération de tension, p.ex. générateurs de tension de polarisation, générateurs de tension de substrat, alimentation de secours, circuits de commande d'alimentation
• G11C 11/4076 - Circuits de synchronisation

Abrégé

A processor-implemented method with checkpointing includes: performing an operation for learning of an artificial neural network (ANN) model; and performing a checkpointing to store information about a state of the ANN model, simultaneously with performing the operation for the learning of the ANN model.

Classes IPC  ?

• G06N 3/091 - Apprentissage actif
• G06N 3/084 - Rétropropagation, p.ex. suivant l’algorithme du gradient

Abrégé

A Doherty power amplifier of a wireless communication system is provided. The Doherty power amplifier includes a first stage including a first power amplifier and a second power amplifier. The Doherty power amplifier includes a second stage including a third power amplifier and a fourth power amplifier. The Doherty power amplifier includes a coupler between the first stage and the second stage. The Doherty power amplifier includes a load impedance connected to the second stage. A bias of the first power amplifier is applied differently from a bias of the second power amplifier. A bias of the third power amplifier is applied in the same manner as a bias of the fourth power amplifier.

Classes IPC  ?

• H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
• H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs
• H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie

Abrégé

A system is disclosed. An upstream interface enables communication with a processor; a downstream interface enables communication with a storage device. The system may also include an acceleration module implemented using hardware to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for data, and a storage device acceleration module to assist the acceleration module in executing the acceleration instruction.

Classes IPC  ?

• G06F 13/16 - Gestion de demandes d'interconnexion ou de transfert pour l'accès au bus de mémoire
• G06F 13/40 - Structure du bus
• G06F 13/42 - Protocole de transfert pour bus, p.ex. liaison; Synchronisation

Abrégé

A converter of a wireless communication system includes a first circuit configured to perform a buck operation, a second circuit configured to perform a boost operation, an inductor coupling the first circuit and the second circuit, and a third circuit including a first resistor and a first diode. The first circuit includes a first field effect transistor (FET), a second FET, a first capacitor, and a first drive circuit. The second circuit includes a third FET, a fourth FET, a second capacitor, a first Zener diode, and a second drive circuit, and the first Zener diode. The third circuit is coupled to a first node to which the first drive circuit and the first capacitor are coupled and is coupled to a second node to which the second drive circuit, the second capacitor, and the first Zener diode are coupled.

Classes IPC  ?

• H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p.ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
• H02M 1/08 - Circuits spécialement adaptés à la production d'une tension de commande pour les dispositifs à semi-conducteurs incorporés dans des convertisseurs statiques
• H02M 1/14 - Dispositions de réduction des ondulations d'une entrée ou d'une sortie en courant continu

Abrégé

A semiconductor device a first fin-shaped pattern provided at a first surface of a substrate and extending in a second direction, a first source/drain pattern disposed on the first fin-shaped pattern and connected thereto, a first source/drain contact disposed on the first source/drain pattern and connected thereto, a buried conductive pattern extending through the substrate and connected to the first source/drain contact, a contact connection via disposed between the first source/drain contact and the buried conductive pattern. The contact connection via is directly connected to the first source/drain contact and a back wiring line disposed on a second surface of the substrate and connected to the buried conductive pattern. A width of the contact connection via increases as the contact connection via extends away from the second surface. A width of the first source/drain contact decreases as the first source/drain contact extends away from the second surface of the substrate.

Classes IPC  ?

• H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
• H01L 21/8234 - Technologie MIS
• H01L 23/528 - Configuration de la structure d'interconnexion
• H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée

Abrégé

An electronic apparatus is provided. The electronic apparatus includes a memory configured to store a plurality of nodes corresponding to a plurality of user interface (UI) types, for each application, a display, and a processor connected with the memory and the display and controls the electronic apparatus, wherein the processor is configured to identify a first UI graph corresponding to the target application, acquire information on a target node that will perform the user command among a plurality of first nodes included in the first UI graph based on the user command and the at least one parameter, identify the current node corresponding to a UI displayed through the display, identify an action sequence from the current node to the target node based on the information on the current node and the target node, and perform an action corresponding to the user voice based on the action sequence.

Classes IPC  ?

• G10L 15/22 - Procédures utilisées pendant le processus de reconnaissance de la parole, p.ex. dialogue homme-machine 
• G10L 15/18 - Classement ou recherche de la parole utilisant une modélisation du langage naturel

Abrégé

A phase-locked loop device and its operating method are provided. The phase-locked loop device includes a voltage controlled oscillator configured to generate an output clock signal, a divider configured to divide the output clock signal into first and second phase division signals having a constant phase difference, a sampling phase frequency detector configured to sample a sampling voltage based on the first phase division signal and output any one of the sampling voltage, a first supply voltage, and a second supply voltage based on the second phase division signal, a transconductance circuit configured to output a conversion current based on a hold voltage, and a loop filter configured to generate a voltage control signal based on the conversion current and output the voltage control signal to the voltage controlled oscillator.

Classes IPC  ?

• H03L 7/091 - Commande automatique de fréquence ou de phase; Synchronisation utilisant un signal de référence qui est appliqué à une boucle verrouillée en fréquence ou en phase - Détails de la boucle verrouillée en phase concernant principalement l'agencement de détection de phase ou de fréquence y compris le filtrage ou l'amplification de son signal de sortie le détecteur de phase ou de fréquence utilisant un dispositif d'échantillonnage
• H03L 7/089 - Commande automatique de fréquence ou de phase; Synchronisation utilisant un signal de référence qui est appliqué à une boucle verrouillée en fréquence ou en phase - Détails de la boucle verrouillée en phase concernant principalement l'agencement de détection de phase ou de fréquence y compris le filtrage ou l'amplification de son signal de sortie le détecteur de phase ou de fréquence engendrant des impulsions d'augmentation ou de diminution

Abrégé

A method of fabricating a semiconductor device is provided. The method includes: loading a substrate into a substrate processing apparatus; and processing the substrate, using the substrate processing apparatus. The processing the substrate includes: providing a process gas; generating a process etchant from the process gas, using plasma ignition, the process etchant including a first etchant and a second etchant; processing the substrate, using the process etchant; identifying a composition rate of the process etchant; and controlling the processing of the substrate based on a process result according to the composition rate of the process etchant.

Classes IPC  ?

• H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
• H01J 37/32 - Tubes à décharge en atmosphère gazeuse
• H01L 21/285 - Dépôt de matériaux conducteurs ou isolants pour les électrodes à partir d'un gaz ou d'une vapeur, p.ex. condensation
• H01L 21/3065 - Gravure par plasma; Gravure au moyen d'ions réactifs

Abrégé

A semiconductor device includes a gate electrode structure, a memory channel structure, a first division pattern, and first support patterns. The gate electrode structure includes gate electrodes spaced apart from each other on a substrate in a first direction perpendicular to an upper surface of the substrate, and each of the gate electrodes extends in a second direction parallel to the upper surface of the substrate. The memory channel structure extends through the gate electrode structure on the substrate. The first division pattern is formed on a sidewall of the gate electrode structure in a third direction parallel to the upper surface of the substrate and crossing the second direction, and extends in the second direction. The first support patterns are spaced apart from each other in the second direction on the first division pattern, and each of the first support patterns includes a conductive material.

Classes IPC  ?

• H10B 43/27 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par les agencements tridimensionnels, p ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p.ex. avec des canaux inclinés les canaux comprenant des parties verticales, p.ex. des canaux en forme de U
• H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H10B 41/10 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la configuration vue du dessus
• H10B 41/27 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par les agencements tridimensionnels, p ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p.ex. avec des canaux inclinés les canaux comprenant des parties verticales, p.ex. des canaux en forme de U
• H10B 41/35 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la région noyau de mémoire avec un transistor de sélection de cellules, p.ex. NON-ET
• H10B 43/10 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la configuration vue du dessus
• H10B 43/35 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la région noyau de mémoire avec transistors de sélection de cellules, p.ex. NON-ET

Abrégé

A method for positioning based system design for smart repeaters with adaptive beamforming capabilities is implemented by an electronic device. In certain embodiments, the electronic device is a smart repeater. The method includes obtaining user equipment (UE) location information indicating a location of a UE. The method includes translating, based on a prediction engine, the UE location information to a beam index associated with a beam to serve the UE at the location of the UE. The method includes receiving, from an external communication device via a first wireless communication channel, traffic intended for the UE. The method includes forward-transmitting, via a second wireless communication channel, the traffic via the beam formed at a transmit (TX) antenna of the electronic device.

Classes IPC  ?

• H04B 7/06 - Systèmes de diversité; Systèmes à plusieurs antennes, c. à d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
• H04B 7/155 - Stations terrestres
• H04W 64/00 - Localisation d'utilisateurs ou de terminaux pour la gestion du réseau, p.ex. gestion de la mobilité

Abrégé

A semiconductor device includes active patterns disposed on a substrate and including central portions, respectively, bit lines extending in a first direction on the central portions of the active patterns, word lines intersecting the active patterns in a second direction intersecting the first direction, fence patterns disposed between the bit lines adjacent to each other on the word lines, a contact trench region intersecting the active patterns and the word lines in a third direction intersecting the first and second directions, and bit line contacts and filling insulation patterns alternately arranged in the third direction in the contact trench region. The first to third directions are parallel to a bottom surface of the substrate. The filling insulation patterns are disposed between the word lines and the fence patterns, respectively.

Classes IPC  ?

• H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]

Abrégé

The disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting a data transmission rate higher than that of a 4th generation (4G) system, such as long-term evolution (LTE). The disclosure provides a method for operating a terminal in a wireless communication system, the method including: performing communication with an access and mobility management function (AMF) in a first network; and transmitting a radio resource control (RRC) message including information on the AMF in a second network.

Classes IPC  ?

• H04W 76/12 - Gestion de la connexion Établissement de la connexion Établissement de tunnels de transport
• H04W 60/06 - Annulation de l'enregistrement ou détachement

Abrégé

A thermal image sensor includes a substrate; a composite layer including an absorption layer and a sensor array layer provided below the absorption layer, the sensor array layer including a plurality of temperature sensing cells, the composite layer having a pattern formed therein, and the pattern including at least one hole penetrating through the absorption layer; and a support separating the substrate from the composite layer.

Classes IPC  ?

• H04N 25/21 - Circuits de capteurs d'images à l'état solide [capteurs SSIS]; Leur commande pour transformer uniquement le rayonnement infrarouge en signaux d'image pour transformer le rayonnement infrarouge thermique en signaux d'image
• G01K 7/36 - Mesure de la température basée sur l'utilisation d'éléments électriques ou magnétiques directement sensibles à la chaleur utilisant des éléments magnétiques, p.ex. des aimants, des bobines

Abrégé

A sterilizing apparatus and a home appliance comprising the same are provided. The sterilizing apparatus may include: a lamp body containing a gas configured to emit ultraviolet rays through electric discharge and having a cylindrical shape, a plurality of external electrodes disposed on an outer circumferential surface of the lamp body and extending in a longitudinal direction of the lamp body, and a cover including an inner wall and an outer wall, and provided in a radial direction of the lamp body to allow the inner wall to face the outer circumferential surface of the lamp body and outer surfaces of the plurality of external electrodes, wherein the lamp body includes a light-emitting region provided on the outer circumferential surface of the lamp body, the light-emitting region disposed between the plurality of external electrodes and configured to allow light emitted from the lamp body to be transmitted, wherein the cover is configured to cover at least a portion of the light-emitting region to scatter the light emitted from the lamp body.

Classes IPC  ?

• A61L 9/20 - Désinfection, stérilisation ou désodorisation de l'air utilisant des phénomènes physiques des radiations des ultraviolets

Abrégé

A mask including a mask body and a blower. The mask body includes a first coupling part, and a second coupling part spaced apart from the first coupling part. The blower includes a third coupling part configured to be detachably couplable to the first coupling part and prevented from being coupled to the second coupling part, and a fourth coupling part configured to be detachably couplable to the second coupling part and prevented from being coupled to the first coupling part. With the third coupling part detachably coupled to the first coupling part and the fourth coupling part detachably coupled to the second coupling part, the blower is disposed to a rear of the mask body and is operable to force air to flow into and out of the mask.

Classes IPC  ?

• A62B 18/00 - Masques ou casques respiratoires, p.ex. pour assurer une protection contre les agents chimiques ou pour l'emploi à hautes altitudes
• A62B 23/02 - Filtres en vue de la protection des voies respiratoires pour appareils respiratoires

Abrégé

A semiconductor device includes first lower nanosheets; an upper isolation layer on the first lower nanosheets; first upper nanosheets on the upper isolation layer; a first upper source/drain region on the first upper nanosheets; a second upper source/drain region on the first upper nanosheets; a first gate electrode surrounding the first lower nanosheets, the upper isolation layer, and the first upper nanosheets; a first gate cut on a side of the first gate electrode and extending from a lower surface of the first gate electrode to an upper surface of the first gate electrode; a first through via inside the first gate cut and insulated from the first gate electrode; a first upper source/drain contact on and electrically connected to the first upper source/drain region; and a second upper source/drain contact on the first upper source/drain region and electrically connecting the second upper source/drain region with the first through via.

Classes IPC  ?

• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
• H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
• H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
• H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 29/66 - Types de dispositifs semi-conducteurs
• H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
• H01L 29/786 - Transistors à couche mince

Abrégé

Provided are systems, methods, and apparatuses for transferring programs from a host to a computational storage device is described. The method can include: determining a program to transfer from a host to a computational storage device, determining that a size of the program exceeds a predetermined threshold, and transferring, based on the size, at least a portion of the program to the computational storage device.

Classes IPC  ?

• G06F 3/06 - Entrée numérique à partir de, ou sortie numérique vers des supports d'enregistrement

Abrégé

The present disclosure relates to a 5G communication system or a 6G communication system for supporting higher data rates beyond a 4G communication system such as long term evolution (LTE). Particularly, a method for operating a UE in a wireless communication system according to various embodiments of the present disclosure may include a step of receiving, from a base station, information indicating that CLI measurement is triggered by identifying the UE as a victim UE, a step of receiving one or more cell-level reference signals from one or more UEs in a second cell adjacent to a first cell in which the UE is positioned, after the CLI measurement is triggered, and a step of transmitting, to the base station, a cell-level measurement report including a result of measuring RSRP of the one or more received cell-level RSs.

Classes IPC  ?

• H04W 24/10 - Planification des comptes-rendus de mesures
• H04B 17/318 - Force du signal reçu
• H04B 17/336 - Rapport signal/interférence ou rapport porteuse/interférence

Abrégé

An electronic device includes: a plate; a side frame provided at an edge of the plate, the side frame including a first sidewall extending in at least one axial direction and including at least one conductive portion; a printed circuit board provided on a surface of the plate and including at least one ground area; a key assembly provided on the side frame and including a first flexible circuit board connected to the printed circuit board; and at least one antenna module including: the at least one conductive portion; a first connection member provided inside the first sidewall, the first connection member being electrically connected to the at least one conductive portion and the first flexible circuit board; a second connection member provided inside the first sidewall and spaced apart from the first connection member, the second connection member being electrically connected to the at least one conductive portion and the first flexible circuit board; and a third connection member between the first connection member and the second connection member, the third connection member being electrically connected to the at least one conductive portion and the at least one ground area.

Classes IPC  ?

• H01Q 1/24 - Supports; Moyens de montage par association structurale avec d'autres équipements ou objets avec appareil récepteur
• H01Q 21/30 - Combinaisons d'unités d'antennes séparées, fonctionnant sur des bandes d'ondes différentes et connectées à un système d'alimentation commun

Abrégé

A semiconductor device may include a first film and a second film defining parts of a trench, a plug conductive film, a via, and a wiring in the trench. The trench may include a second sub-trench having a second width below a first sub-trench having a first width. The plug conductive film may extend from a first side of the first film to penetrate a bottom face of the trench. An uppermost face of the plug conducive film may be in the trench. The via may include an insulating liner between the plug conductive film and the first film. The uppermost face of the plug conductive film and at least a part of a side wall of the plug conductive film may be in contact with the wiring. An upper face of the insulating liner may be exposed by a bottom face of the second sub-trench.

Classes IPC  ?

• H01L 23/535 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions internes, p.ex. structures d'interconnexions enterrées
• H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
• H01L 23/528 - Configuration de la structure d'interconnexion
• H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
• H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique

Abrégé

An automated gas supply system includes a gas cylinder transfer unit configured to transfer a cradle in which one or more gas cylinders storing a gas therein are stored; a gas cylinder inspection unit configured to check properties of the gas stored in the gas cylinder transferred from the gas cylinder transfer unit and check whether the gas leaks from the gas cylinder; a storage queue configured to receive the gas cylinder from the gas cylinder inspection unit by a mobile robot and configured to classify and store the transferred gas cylinders according to the properties of the gas stored in the gas cylinder; and a gas cabinet configured to receive the gas cylinder from the storage queue by the mobile robot and fasten a gas pipe, which is connected to a semiconductor manufacturing process line, to a gas spray nozzle, which is disposed at one side of the received gas cylinder, to supply the gas stored in the gas cylinder to the semiconductor manufacturing process line, wherein the gas cabinet includes a residual gas detector configured to detect a residual amount of the gas stored in the gas cylinder fastened to the gas pipe, and when the residual amount of the gas detected by the residual gas detector is less than or equal to a set residual amount of gas, the mobile robot recovers the gas cylinder from inside the gas cabinet and transfers a gas cylinder stored in the storage queue to the gas cabinet.

Classes IPC  ?

• B25J 9/16 - Commandes à programme
• B25J 5/02 - Manipulateurs montés sur roues ou sur support mobile se déplaçant le long d'un chemin de guidage
• B25J 9/00 - Manipulateurs à commande programmée
• B25J 13/08 - Commandes pour manipulateurs au moyens de dispositifs sensibles, p.ex. à la vue ou au toucher

Abrégé

One embodiment provides a method comprising detecting at least one object displayed within at least one input frame of an input video. The method further comprises cropping, from the at least one input frame, at least one cropped image including the at least one object. The method further comprises generating at least one training image by overlaying simulated text on the at least one cropped image. The method further comprises providing the at least one training image to a pruned convolutional neural network (CNN). The pruned CNN learns, from the at least one training image, to reconstruct objects and textual regions during image super-resolution.

Classes IPC  ?

• G06V 10/774 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant l’intégration et la réduction de données, p.ex. analyse en composantes principales [PCA] ou analyse en composantes indépendantes [ ICA] ou cartes auto-organisatrices [SOM]; Séparation aveugle de source méthodes de Bootstrap, p.ex. "bagging” ou “boosting”
• G06T 3/40 - Changement d'échelle d'une image entière ou d'une partie d'image
• G06T 7/13 - Détection de bords
• G06T 7/73 - Détermination de la position ou de l'orientation des objets ou des caméras utilisant des procédés basés sur les caractéristiques
• G06V 10/26 - Segmentation de formes dans le champ d’image; Découpage ou fusion d’éléments d’image visant à établir la région de motif, p.ex. techniques de regroupement; Détection d’occlusion
• G06V 10/82 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant les réseaux neuronaux
• G06V 20/40 - RECONNAISSANCE OU COMPRÉHENSION D’IMAGES OU DE VIDÉOS Éléments spécifiques à la scène dans le contenu vidéo
• G06V 20/62 - Texte, p.ex. plaques d’immatriculation, textes superposés ou légendes des images de télévision

Abrégé

The disclosure relates to a method and system for adaptive antenna configuration in a user equipment comprising one or more antenna modules, each of the one or more antenna modules comprising a plurality of patch elements. The method comprises: determining whether a signal strength of the UE is above a signal threshold, determining whether a mobility of the UE is below a mobility threshold based on determining that the signal strength is above the signal threshold, determining at least one active antenna module based on determining that the mobility of the UE is below the mobility threshold, and deactivating at least one patch element in the at least one antenna module.

Classes IPC  ?

• H04B 7/06 - Systèmes de diversité; Systèmes à plusieurs antennes, c. à d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
• G01S 5/02 - Localisation par coordination de plusieurs déterminations de direction ou de ligne de position; Localisation par coordination de plusieurs déterminations de distance utilisant les ondes radioélectriques
• H04B 7/0404 - Systèmes de diversité; Systèmes à plusieurs antennes, c. à d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées la station mobile comprenant plusieurs antennes, p.ex. pour mettre en œuvre une diversité en voie ascendante
• H04W 24/08 - Réalisation de tests en trafic réel
• H04W 52/02 - Dispositions d'économie de puissance
• H04W 68/00 - Avertissement aux utilisateurs, p.ex. alerte ou messagerie, sur l'arrivée d'une communication, un changement de service ou similaires

Abrégé

A heat exchanger including a heat exchange fin; a refrigerant pipe passing through the heat exchange fin, the refrigerant pipe having a first thickness; a connecting member coupled to the refrigerant pipe; and a distribution pipe coupled to the connecting member at an outside of the heat exchange fin, the distribution pipe having a second thickness greater than the first thickness, wherein the connecting member is positioned between the refrigerant pipe and the distribution pipe so that a refrigerant is flowable through the connecting member between the refrigerant pipe and the distribution pipe, and has a thickness in a range of 95% or more and 105% or less of the second thickness.

Classes IPC  ?

• F28F 9/02 - Boîtes de distribution; Plaques d'extrémité
• F28F 9/18 - Dispositions pour obturer des éléments dans les boîtes de distribution ou plaques d'extrémité par joints permanents, p.ex. par dudgeonnage par soudage