A pore device is used with a measurement device. The pore device includes a pore chip and a chip case which has a chamber partitioned by the pore chip. A measurement terminal group is provided to apply an electric signal from the measurement device to the chamber and output an electric signal generated in the chamber to the measurement device. Interface means is connected to a nonvolatile memory such that the nonvolatile memory is accessible from an outside of the pore device.
A tester system includes a test computer system for coordinating and controlling testing of a plurality of devices under test (DUTs) and a hardware interface module coupled to the test computer system and controlled by the test computer system, the hardware interface module operable to apply test input signals to the plurality of DUTs and operable to receive test output signals from the plurality of DUTs. The hardware interface module includes a memory for storing instructions and data, a high performance processor coupled to the memory, the high performance processor operable to perform testing functionality at high speed for application of test signals to the plurality of DUTs, the high performance processor operable to perform the testing functionality under control of instructions and data from the memory and under control from software commands from the test computer system, wherein further the high performance processor is not natively capable of low power mode operation. The test system also includes a low power module coupled to and external to the high performance processor, the low power module capable of operating in at least one low power mode, the high performance processor for directing the low power module to configure the plurality of DUTs into at least one low power mode and further for testing the plurality of DUTs using commands and data in low power. The test system further includes driver hardware for applying the commands and data in low power to the plurality of DUTs which are configured for low power operation during the testing.
Provided is a testing apparatus including: a light emission control unit which causes a plurality of light emitting elements to be tested to emit light; a light measurement unit which receives the light emitted from the plurality of light emitting elements and measures wavelengths of the received light; and a determination unit which determines whether there is an abnormality in at least one light emitting element on the basis of intensity distributions of the wavelengths of the light, which is emitted from the plurality of light emitting elements, measured by the light measurement unit. The testing apparatus may further include: a light source; an optical system which irradiates the plurality of light emitting elements with light emitted from the light source; and an electrical measurement unit which measures a photoelectric signal obtained by each of the plurality of light emitting elements photoelectrically converting the light radiated by the optical system.
A magnetic field measuring apparatus for measuring a to-be-measured magnetic field includes a magnetic impedance element with an impedance change rate that changes depending on the to-be-measured magnetic field, a drive signal providing section and a measurement range setting section. The drive signal providing section provides a drive signal to the magnetic impedance element. A measurement range setting section sets a measurement range in which the to-be-measured magnetic field can be measured. A relationship between the to-be-measured magnetic field and the impedance change rate is arranged to change depending on a frequency of the drive signal. The measurement range setting section is arranged to set the measurement range by setting the frequency.
A method for reserving a cloud-based instrument and adapted to a system for reserving an instrument is provided. The system includes a group of remote instruments with a plurality of remote instruments, a system for reserving an instrument, and a bastion server. The reservation information includes a plurality of reservable time periods and a plurality of reserved time periods. The method for reserving the cloud-based instrument includes: establishing a secure connection between the bastion server and the remote instrument designated in any one of the reserved time periods, establishing a dedicated connection between the designated remote instrument and a user workstation designated in any one of the reserved time periods at start of any one of the reserved time periods according to pairing information and the reservation information, and terminating the secure connection and the dedicated connection at end of any one of the reserved time periods.
Presented embodiments facilitate efficient and effective flexible implementation of different types of testing procedures in a test system. In one embodiment, a test system configuration adapter includes a tester side socket, a break out pin, and a device under test side slot. The tester side socket is configured to couple with a test equipment socket. The break out pin is configured to couple with the supplemental equipment. The device under test side slot is configured to couple with the tester side socket, the break out pin, and a device under test, wherein the tester side socket. The test system configuration adapter is configured to enable communication between test equipment coupled to the test equipment socket and supplemental equipment coupled to the breakout pin while the device under test remains coupled to the device under test side slot. In one exemplary implementation, the breakout pin and tester side socket are selectively coupled to the device under test side slot. The test system configuration adapter can include a switch configured to switch a portion of the coupling of the device under test side slot to the tester side socket and the break out pin.
Efficient and effective testing systems and methods are presented. In one embodiment, a system includes: a user interface configured to enable user interaction with the system; a test board configured to communicatively couple with a plurality of devices under test (DUTs), wherein the DUTs are compute express link (CXL) protocol compliant; and a tester configured to direct testing of the plurality of DUTs, wherein the tester is configured to enable hot add of one of the plurality of DUTs without interfering with testing of the other DUTS. In one exemplary implementation, the DUTs are memory devices and the DUTs can operate as extended memory. The user interface can be utilized to indicate a pause to remove a DUT and to indicate a DUT has been added and to trigger a re-start. The added one of the plurality of DUTs can be automatically recognized by a host in a way that is transparent to users. The tester automatically directs the hot add in response to a user trigger. In one embodiment, basic input/output system (BIOS) operations direct detection of characteristics associated with the added one of the plurality of DUTs.
Efficient and effective testing systems and methods are presented. In one embodiment, a testing system includes: a user interface configured to enable user interaction with the system; a test board configured to communicatively couple with a plurality of devices under test (DUTs), wherein the DUTs are compute express link (CXL) protocol compliant; and a tester configured to direct testing of the plurality of DUTs, wherein the tester manages testing of the plurality of DUTs, including managing CXL protocol aspects of the testing. In one exemplary implementation, the tester prevents testing of a first one of the plurality of DUTs from detrimentally interfering with testing of a second one of the plurality of DUTs.
G06F 11/22 - Détection ou localisation du matériel d'ordinateur défectueux en effectuant des tests pendant les opérations d'attente ou pendant les temps morts, p.ex. essais de mise en route
G06F 11/273 - Matériel de test, c. à d. circuits de traitement de signaux de sortie
9.
LOW POWER ENVIRONMENT FOR HIGH PERFORMANCE PROCESSOR WITHOUT LOW POWER MODE
A tester system includes a test computer system for coordinating and controlling testing of a plurality of devices under test (DUTs) and a hardware interface module coupled to the test computer system and controlled by the test computer system, the hardware interface module operable to apply test input signals to the plurality of DUTs and operable to receive test output signals from the plurality of DUTs. The hardware interface module includes a memory for storing instructions and data, a high performance processor coupled to the memory, the high performance processor operable to perform testing functionality at high speed for application of test signals to the plurality of DUTs, the high performance processor operable to perform the testing functionality under control of instructions and data from the memory and under control from software commands from the test computer system, wherein further the high performance processor is not natively capable of low power mode operation. The test system also includes a low power module coupled to and external to the high performance processor, the low power module capable of operating in at least one low power mode, the high performance processor for directing the low power module to configure the plurality of DUTs into at least one low power mode and further for testing the plurality of DUTs using commands and data in low power. The test system further includes driver hardware for applying the commands and data in low power to the plurality of DUTs which are configured for low power operation during the testing.
A tester system includes a test computer system for coordinating and controlling testing of a plurality of devices under test (DUTs), and a hardware interface board coupled to the test computer system and controlled by the test computer system. The hardware interface board is operable to apply test input signals to the plurality of DUTs and operable to receive test output signals from the plurality of DUTs, the hardware interface board including: a processor operable to access test pattern data for application to a DUT. The tester system also includes a memory coupled to the processor and including a plurality of buffers, the plurality of buffers organized into a first-in-first-out (FIFO) memory queue including a buffer front end and a buffer back end, the plurality of buffers operable to receive the test pattern data from the processor at the buffer front end, a direct memory access (DMA) engine coupled to the memory and operable for reading data out of the buffer back end and supplying test pattern data to the DUT, a buffer table for maintaining a buffer sequence within the plurality of buffers and for maintaining vacancy and occupancy information regarding the plurality of buffers, and driver hardware coupled to the DMA engine and operable to receive the test pattern data and for driving the test input signals to the plurality of DUTs.
A signal vector derivation apparatus receives measurement results from a plurality of sensors that receive signals each represented by a vector having a predetermined direction and measure triaxial components orthogonal to each other and derives the direction of the vector. The measurement results from the sensors are each proportional to a sum of the triaxial components of the vector multiplied, respectively, by first coefficients. The signal vector derivation apparatus includes a spectrum deriving section and a direction deriving section. The spectrum deriving section derives a spectrum obtained based on the measurement results from the sensors and a sum of the first coefficients multiplied, respectively, by second coefficients, the spectrum having local maximum values within voxels in which signal sources that output the respective signals exist. The direction deriving section derives the direction of the vector based on the second coefficients used to obtain the spectrum.
Embodiments of the present invention can selectively enable 16 lane (×16) or 8 lane (×8) device testing using multiplexor circuitry disposed between a CXL1.1 CPU and the DUTs during testing. In this way, parallelism and testing efficiency are significantly improved compared to existing approaches that can only test devices using 8 lanes of the CXL 1.1 CPU.
Efficient and effective testing systems and methods are presented. In one embodiment, a test system includes: a user interface configured to enable user interaction with the system; a test board configured to communicatively couple with a plurality of devices under test (DUTs), wherein the DUTs are compute express link (CXL) protocol compliant; and a tester configured to direct testing of the plurality of DUTs, wherein the tester manages testing of the plurality of DUTs, including managing flexible and independent parallel testing across the plurality of DUTs. In one exemplary implementation, the tester generates and manages workloads independently for DUTs included in the plurality of DUTs. The DUTs can be memory devices the tester is configured to test different memory spaces in parallel. The different memory spaces can have various implementations (e.g., included in the plurality of DUTs, different memory spaces are within one of the DUTs included in the plurality of DUTs, etc.). Workloads can be generated based upon individual characteristics of the DUTS and managed separately. The testing can include performance testing. (e.g., bandwidth testing, latency testing, error testing, etc.).
G06F 11/263 - Génération de signaux d'entrée de test, p.ex. vecteurs, formes ou séquences de test
G06F 11/22 - Détection ou localisation du matériel d'ordinateur défectueux en effectuant des tests pendant les opérations d'attente ou pendant les temps morts, p.ex. essais de mise en route
14.
SYSTEMS AND METHODS UTILIZING DAX MEMORY MANAGEMENT FOR TESTING CXL PROTOCOL ENABLED DEVICES
Efficient and effective testing systems and methods are presented. In one embodiment, a test system includes: a user interface configured to enable user interaction with the system; a test board configured to communicatively couple with a plurality of devices under test (DUTs), wherein the DUTs are compute express link (CXL) protocol compliant; and a tester configured to direct testing of the plurality of DUTs, wherein the tester includes a direct access device (DAX) interface that prevents corruption of DUTs. In one exemplary implementation, the tester isolates testing of a particular CXL enabled DUT from undesirable interference and corruption. The tester can prevent inappropriate writing over the DUT's memory. The DUTs reside in the separate per-device space of a Linux operating system rather than an extension of memory space. One of the plurality of DUTs can be a CXL type 3 memory expander device. In one exemplary implementation, the direct access device (DAX) interface creates a unique DAX instance for each individual DUT included in the plurality of DUTs
G06F 11/273 - Matériel de test, c. à d. circuits de traitement de signaux de sortie
G06F 21/53 - Contrôle des usagers, programmes ou dispositifs de préservation de l’intégrité des plates-formes, p.ex. des processeurs, des micrologiciels ou des systèmes d’exploitation au stade de l’exécution du programme, p.ex. intégrité de la pile, débordement de tampon ou prévention d'effacement involontaire de données par exécution dans un environnement restreint, p.ex. "boîte à sable" ou machine virtuelle sécurisée
15.
AUTOMATED TEST EQUIPMENT COMPRISING A DEVICE UNDER TEST LOOPBACK AND AN AUTOMATED TEST SYSTEM WITH AN AUTOMATED TEST EQUIPMENT COMPRISING A DEVICE UNDER TEST LOOPBACK
An embodiment is an automated test equipment (ATE) for testing a device under test (DUT) which is connected to the ATE via a load board. The ATE comprises a stimulus module, a measurement module, a loopback, a first switch, a second switch, and a load board interface. The load board interface comprises a first radio frequency port and a second radio frequency port. The first and second radio frequency ports are configured to be coupled to the respective ports of the load board. The first switch is configured to couple the first radio frequency port to the stimulus module in a first switching state of the first switch and the second switch is configured to couple the second radio frequency port to the measurement module in a first switching state of the second switch. Further, the first switch is configured to couple the first radio frequency port to a first end of the loopback in a second switching state of the first switch and the second switch is configured to couple the second radio frequency port to a second end of the loopback in a second switching state of the second switch. When the first and second switches are in their respective second switching state, a loopback signal path is formed between the first and second radio frequency ports.
Embodiments according to the disclosure comprise an automated test equipment component, ATE component, e.g., a handler component, e.g., a handler arm, comprising a first antenna adapted to establish a wireless, e.g., near field, coupling with a device under test (DUT), e.g., comprising an antenna, e.g., comprising an antenna array, when the DUT is arranged on a loadboard, e.g., a DUT loadboard. Furthermore, the ATE component comprises a second antenna for establishing a wireless, e.g., near field, coupling with a characterizing device, e.g., a golden device, e.g., comprising an antenna, e.g., comprising an antenna array, when the characterizing device is arranged, e.g., placed, on the loadboard, wherein the DUT and the characterizing device are, for example, placed at different positions on the DUT loadboard. Moreover, the first antenna is electrically coupled, e.g., connected with a rigid electrical connection, with the second antenna, to allow for a forwarding of a signal, e.g., of a plurality of signals, provided, e.g., transmitted, by the DUT to the characterizing device, e.g., reference device, and/or vice versa, e.g., to allow for a forwarding of a signal, e.g., of a plurality of signals, provided, e.g., transmitted, by the characterizing device to the DUT. Optionally, a relative position of the second antenna with respect to the first antenna may be fixed, or for example, a relative position of the second antenna with respect to the first antenna may be variable.
An interface apparatus is provided between a test head and a DUT. The interface apparatus includes a frontend module configured of multiple pin electronics ICs in the form of a module.
An interface device is provided between a test head and a DUT. The interface device includes pin electronics ICs, RAM, a pin controller, and nonvolatile memory. The RAM stores data based on a device signal received from the DUT by means of the multiple pin electronics ICs. The pin controller controls the multiple pin electronics ICs according to a control signal from the test head. The multiple pin electronics ICs, the RAM, and the pin controller are mounted on a pin electronics PCB.
An interface device is provided between a test head and a device under test (DUT). A socket board includes sockets each configured to mount a DUT, and a socket PCB having a first face that mounts the sockets and a second face provided with multiple back face electrodes. An interposer has a first face provided with multiple deformable electrodes and a second face provided with multiple non-deformable electrodes and is configured such that the multiple deformable electrodes are in contact with the multiple back face electrodes of the socket PCB. An FPC cable has multiple electrode pads to be coupled with the multiple non-deformable electrodes on the second face of the first interposer.
An electronic component testing apparatus for testing a device under test (DUT) includes: a socket unit that is electrically connected to the DUT; a first wiring board that includes a board opening; and a tester that includes a test head in which the first wiring board is mounted. The socket unit includes a first socket that faces a first main surface of the DUT and is electrically connected to the DUT and the first wiring board. The second socket that is exposed from the first wiring board through the board opening, contacts a second main surface of the DUT on a side opposite to the first main surface, and includes: a base that contacts the second main surface; and a test antenna unit that is electrically connected to the tester and faces a device antenna unit of the DUT.
N (N≥2) D/A converters convert respective input data at a sampling frequency FS. A digital signal processing unit generates N items of sub-band waveform data. Each of N items of sub-band waveform data is generated by frequency-shifting corresponding one of N sub-band components included in digital waveform data that represents the analog output signal, such that each sub-band waveform data has its maximum frequency below FS/2. A local signal generating circuit generates N local signals having different frequencies.
An ultrasonic measurement apparatus includes a lens, an ultrasonic measuring section, an ultrasonic determining section, and a lens moving section. The lens receives an ultrasonic wave output from a measuring target. The ultrasonic measuring section measures the ultrasonic wave received by the lens in relation to time. The ultrasonic determining section determines whether or not the ultrasonic wave is included in a result of measurement by the ultrasonic measuring section at an elapsed time point when the time required for the ultrasonic wave to travel a focal distance of the lens has elapsed after the ultrasonic wave is output from the measuring target. The lens moving section moves the lens such that it is determined that the ultrasonic wave is included in the result of measurement by the ultrasonic measuring section.
G01H 9/00 - Mesure des vibrations mécaniques ou des ondes ultrasonores, sonores ou infrasonores en utilisant des moyens sensibles aux radiations, p.ex. des moyens optiques
G10K 11/30 - Procédés ou dispositifs pour transmettre, conduire ou diriger le son pour focaliser ou pour diriger le son, p.ex. balayage utilisant la réfraction, p.ex. lentilles acoustiques
24.
SIGNAL/NOISE DETERMINATION APPARATUS, METHOD, AND RECORDING MEDIUM
A signal/noise determination apparatus includes a plurality of sensors, a determination model recording section, and a signal/noise determining section. The plurality of sensors measure a signal and a noise. The determination model recording section records a determination model used to determine whether components of results of measurement by the sensors expected with hypothetical signal information and hypothetical noise information are from a signal source or a noise source. The determination model is generated by machine learning with the measurement results, the hypothetical signal information, and the hypothetical noise information as training data. The signal/noise determining section determines whether components of the measurement results are from the signal source or the noise source based on the measurement results and the determination model. The signal information includes the position of the signal source and the signal, and the noise information includes the position of the noise source and the noise.
An electronic component handling apparatus pressing the DUT against a socket electrically connected to a tester, includes: a first receiver that receives, from the tester, a first signal indicating a detection value of a temperature detection circuit; a calculator that calculates a temperature of the DUT based on the first signal; a calibrator that calibrates the calculated temperature; a second receiver that receives, from the tester, a second signal that causes the calibrator to start a first calibration; and a temperature adjuster that adjusts the temperature of the DUT. The second receiver receives the second signal before the tester turns on the DUT, once the second signal is received, the calibrator calculates a first calibrated temperature by executing the first calibration with respect to the calculated temperature, and the temperature adjuster adjusts the temperature of the DUT based on the first calibrated temperature.
A heater drive controlling apparatus for an electronic component testing apparatus includes a breaker disposed between a power source and heaters, and a controller that controls electric currents supplied from the power source to the heaters in order according to a first priority set for the heaters such that a sum of the supplied electric currents is within a rated current of the breaker. The electronic component testing apparatus includes a test chamber, a thermal-stress applying chamber, and a thermal-stress removing chamber each of which includes the heaters.
Embodiments according to the disclosure comprise a control device for controlling an ATE for testing a DUT which is electrically coupled to the ATE using, or for example via, a device under test (DUT) contacting structure, e.g. using or via a probe needle, or for example using or via a DUT socket. The control device is configured to figure out a temperature of the DUT contacting structure using a thermal model, e.g. using a thermal model of the DUT contacting structure or using, for example, a thermal model comprising a thermal model of the DUT contacting structure. In addition, the control device is configured to influence, e.g. to control, to regulate, to deactivate and/or to limit, a signal applied to the DUT contacting structure based on the figured out, or for example modeled, temperature. The figured out temperature comprises at least one of a determined temperature or an estimated temperature.
Power supply units of multiple channels each include an output stage that generates an output voltage across positive/negative outputs OUTP and OUTN, and a voltage detector that generates a voltage detection signal that indicates the output voltage. A feedback signal generating unit of the power supply unit of a master channel that is one of the multiple channels receives voltage detection signals from the power supply units of the remaining multiple channels, i.e., the slave channels, and generates a feedback signal based on the voltage detection signals of all the channels. A feedback controller generates a control signal such that the feedback signal approaches a target value. An output stage of each slave channel operates based on the control signal generated by the master channel.
H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p.ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
H02M 1/00 - APPAREILS POUR LA TRANSFORMATION DE COURANT ALTERNATIF EN COURANT ALTERNATIF, DE COURANT ALTERNATIF EN COURANT CONTINU OU VICE VERSA OU DE COURANT CONTINU EN COURANT CONTINU ET EMPLOYÉS AVEC LES RÉSEAUX DE DISTRIBUTION D'ÉNERGIE OU DES SYSTÈMES D'ALI; TRANSFORMATION D'UNE PUISSANCE D'ENTRÉE EN COURANT CONTINU OU COURANT ALTERNATIF EN UNE PUISSANCE DE SORTIE DE CHOC; LEUR COMMANDE OU RÉGULATION - Détails d'appareils pour transformation
H02M 3/157 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p.ex. régulateurs à commutation avec commande numérique
29.
MEASUREMENT ARRANGEMENT FOR CHARACTERIZING A RADIO FREQUENCY ARRANGEMENT HAVING A PLURALITY OF ANTENNAS
An embodiment provides a measurement arrangement for characterizing a radio frequency arrangement comprising a plurality of antennas. Measurement arrangement comprises a dielectric waveguide slab with a plurality of frequency converting structures, arranged in or on the dielectric waveguide slab. Measurement arrangement further comprises a plurality of waveguide transitions arranged at different positions of the dielectric waveguide slab and are coupled to respective radio frequency components. Radio frequency components are configured to transmit and/or receive radio signals. Frequency converting structures are associated with respective antennas of the plurality of antennas, and are configured to perform a frequency conversion on signals received, resulting in frequency-converted signals. Frequency converting structures are further configured to couple respective antennas with the dielectric slab in a frequency converting manner to establish a frequency-converting coupling between the antennas and the plurality of waveguide transitions to cause a frequency-converting coupling between the antennas and the radio frequency components.
Provided is a test method including: placing, on a placement unit, a panel level package formed with a plurality of unsingulated devices; bringing at least one contact electrically connected to at least one terminal of a test circuit into contact with at least one terminal of at least one device of the plurality of devices, respectively, the terminal being exposed on a second surface on a side opposite to a first surface on the placement unit side in the panel level package; and testing, by the test circuit, the at least one device electrically connected via the at least one contact.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
G01R 31/28 - Test de circuits électroniques, p.ex. à l'aide d'un traceur de signaux
H01L 21/78 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels
31.
TEST METHOD, MANUFACTURING METHOD, PANEL LEVEL PACKAGE, AND TEST APPARATUS
Provided is a test method including: placing, on a placement unit, a panel level package in which a plurality of unsingulated devices are formed in a matrix; bringing a plurality of contacts electrically connected to a plurality of terminals of a test circuit into contact with a plurality of contact terminals provided on one side in the panel level package in a row direction of the matrix and connected via a plurality of lead-out wirings to an internal circuit of each device in each row of the plurality of devices, respectively; and testing, by the test circuit, each device in the each row electrically connected via the plurality of contacts.
H01L 21/683 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le maintien ou la préhension
H01L 23/498 - Connexions électriques sur des substrats isolants
32.
ELECTRONIC COMPONENT HANDLING APPARATUS, AND ELECTRONIC COMPONENT TEST APPARATUS
An electronic component handling apparatus includes: a pressing device that presses a device under test (DUT) or a carrier containing the DUT against a socket while a test tray having an insert containing the DUT or the carrier is in a vertical state. The pressing device includes: a pusher that contacts the DUT or the carrier; and an abutting part that abuts the insert.
Embodiments provide an apparatus including at least one of at least one transmission line or a phase shifting device. Further, the apparatus includes a measurement device operable to couple to a signal source via the at least transmission line to receive from the signal source a first signal comprising at least a first frequency. The measurement device is operable to output a measurement result based on the received first signal. The at least one transmission line and the phase shifting device are operable to induce a respective phase shift to the first signal. Also, the apparatus includes a measurement processing component operable to average a first measurement result and a second measurement result to generate a processed measurement result related to the first signal to mitigate an influence of a mismatch loss in a measurement setup environment.
A temperature control device controls a temperature of a device under test (DUT) including a device flow path in testing the DUT, and includes: a first flow path that has a first connection port to be connected to an inlet of the device flow path; and a fluid supply system that is connected to the first flow path and supplies a first fluid for temperature control to the device flow path.
An electronic component handling apparatus that handles a DUT or a carrier accommodating the DUT, including: a pressing device that: electrically connects the DUT to a socket by pressing the DUT or the carrier toward the socket, and includes: a temperature control device that: controls a temperature of the DUT, and includes: a heater unit that is a heat source, the heater unit including: a flat heater; a first heat transfer material disposed on a first main surface of the flat heater; and a second heat transfer material disposed on a second main surface of the flat heater.
A temperature adjusting device adjusts a temperature of a device under test (DUT) electrically connected to a socket, and includes: a fluid connector connected to a fluid supply source that supplies a fluid; a heat exchanger thermally connected to at least one of the DUT and a carrier holding the DUT in a state that the at least one of the DUT and the carrier is pressed against the socket; a first flow path passing through an inside of the heat exchanger; and a first swirl flow forming part that swirls a flow of the fluid to form a first swirl flow and supplies the first swirl flow to the first flow path, the first swirl swirling along an inner surface of the first flow path around a first central axis of the first flow path.
G01R 31/28 - Test de circuits électroniques, p.ex. à l'aide d'un traceur de signaux
F28F 13/12 - Dispositions pour modifier le transfert de chaleur, p.ex. accroissement, diminution en affectant le mode d'écoulement des sources de potentiel calorifique en créant une turbulence, p.ex. par brassage, par augmentation de la force de circulation
37.
METHODS AND DEVICES FOR TESTING A DEVICE UNDER TEST USING MULTIPLE SIGNALS TRANSMITTED VIA A BIDIRECTIONAL REAL-TIME INTERFACE
Embodiments of the present invention provide an automated test equipment (a “tester”) for testing a device under test, including a bidirectional dedicated real-time handler interface. Some embodiments include an interface having a trigger function, a fixed endpoint interface, an interface arranged on a test head, and/or a number of lines/communication channels adapted to a specific communication task, without separate signal lines, for example. The bidirectional dedicated real-time handler interface can be used to transmit a multiple signals, such as a thermal control signal, synchronization signal, and/or other information to the handler in real-time, and the transmitted signals can be test site specific. The real-time signaling advantageously improves testing accuracy and efficiency.
A power supply apparatus includes multiple channels of power supply units coupled in a stack connection. Each power supply unit includes an output stage configured to generate an output voltage across a positive output and a negative output according to a control signal. A current detector of a master channel generates a current detection signal that indicates an output current of the output stage. A feedback controller generates the control signal such that the current detection signal approaches a target value.
H02M 3/335 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu avec transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrodes de commande pour produire le courant alternatif intermédiaire utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs
H02M 1/00 - APPAREILS POUR LA TRANSFORMATION DE COURANT ALTERNATIF EN COURANT ALTERNATIF, DE COURANT ALTERNATIF EN COURANT CONTINU OU VICE VERSA OU DE COURANT CONTINU EN COURANT CONTINU ET EMPLOYÉS AVEC LES RÉSEAUX DE DISTRIBUTION D'ÉNERGIE OU DES SYSTÈMES D'ALI; TRANSFORMATION D'UNE PUISSANCE D'ENTRÉE EN COURANT CONTINU OU COURANT ALTERNATIF EN UNE PUISSANCE DE SORTIE DE CHOC; LEUR COMMANDE OU RÉGULATION - Détails d'appareils pour transformation
39.
METHODS AND DEVICES FOR TESTING A DEVICE UNDER TEST USING A SYNCHRONIZATION SIGNAL
Embodiments of the present invention provide an automated test equipment (a “tester”) for testing a device under test, including a bidirectional dedicated real-time handler interface. Some embodiments use the bidirectional dedicated real-time handler interface to transmit a synchronization signal between the handler and the automated test equipment to synchronize a function of the handler in real-time, which advantageously improves testing efficiency and accuracy.
A container holds a liquid sample containing a substrate to be detected. A reactant member is provided in the inner part of the container. The reactant member contains an enzyme and a resin in a state in which they are not mixed.
C12M 1/34 - Mesure ou test par des moyens de mesure ou de détection des conditions du milieu, p.ex. par des compteurs de colonies
G01N 25/48 - Recherche ou analyse des matériaux par l'utilisation de moyens thermiques en recherchant la production de quantités de chaleur, c. à d. la calorimétrie, p.ex. en mesurant la chaleur spécifique, en mesurant la conductivité thermique sur une solution, sorption ou réaction chimique n'impliquant pas une oxydation par combustion ou catalyse
41.
ELECTRONIC COMPONENT HANDLING APPARATUS AND ELECTRONIC COMPONENT TESTING APPARATUS
An electronic component handling apparatus that handles a pressed body including a DUT or a carrier accommodating the DUT, includes: a pressing device that electrically connects the DUT to a socket by pressing the pressed body toward the socket, and includes: a contact plate that contacts the pressed body; and a retainer that holds the contact plate, the contact plate being separated from the retainer while the contact plate contacts the pressed body, and the contact plate being held by the retainer while the contact plate is separated from the pressed body.
G01R 31/28 - Test de circuits électroniques, p.ex. à l'aide d'un traceur de signaux
42.
MULTI-SECTION DIRECTIONAL COUPLER, A METHOD FOR MANUFACTURING A MULTI-SECTION DIRECTIONAL COUPLER AND A METHOD FOR OPERATING A MULTI-SECTION DIRECTIONAL COUPLER
The disclosure describes a multi-section directional coupler comprising: a plurality of conductive lines, each conductive line comprises a plurality of line sections; a plurality of coupled line sections, each coupled line section comprises a first line section of a first conductive line and a second line section of a second conductive line, the coupled line sections comprise different coupling strength values, the coupled line sections facilitate signal coupling; and at least one grounded conductive coupling reduction structure arranged adjacent to a selected coupled line section and operable to reduce a coupling value between a respective line section of the first conductive line and a respective line section of the second conductive line of the selected coupled line section. The selected coupled line section comprises a smaller coupling strength value than another one of the coupled line sections. Methods of manufacturing and operating the multi-section directional coupler are also provided.
H01P 5/18 - Dispositifs à accès conjugués, c. à d. dispositifs présentant au moins un accès découplé d'un autre accès consistant en deux guides couplés, p.ex. coupleurs directionnels
43.
METHODS AND DEVICES FOR TESTING A DEVICE UNDER TEST USING TEST SITE SPECIFIC THERMAL CONTROL SIGNALING
Embodiments of the present invention provide an automated test equipment (a “tester”) for testing a device under test, including a bidirectional dedicated real-time handler interface. Some embodiments include an interface having a trigger function, a fixed endpoint interface, an interface arranged on a test head, and/or a number of lines/communication channels adapted to a specific communication task, without separate signal lines, for example. The bidirectional dedicated real-time handler interface can be used to transmit thermal control signals, and the transmitted signals can be test site specific. The real-time signaling advantageously improves testing accuracy and efficiency.
The present invention discloses a detection method, a system, an electronic equipment, and a storage medium of product test data, where the detection method includes: obtaining historical test data of historical batches of products; screening the historical test data to obtain intermediate test data; grouping the intermediate test data based on preset test parameters to obtain first groups; obtaining distribution patterns of the first groups based on the intermediate test data of the first groups; when the distribution pattern is a preset distribution pattern, using the first group corresponding to the distribution pattern as a target group; and obtaining a target test limit value based on the intermediate test data corresponding to the target group. In the present invention, the test limit value can be adjusted dynamically and adaptively, and chip test data with abnormal data can be effectively detected in real time, which improves test quality of the chip.
Embodiments of the present invention provide an automated test equipment (a “tester”) for testing a device under test, including a bidirectional dedicated real-time handler interface. Some embodiments include an interface having a trigger function, a fixed endpoint interface, an interface arranged on a test head, and/or a number of lines/communication channels adapted to a specific communication task, without separate signal lines, for example. The bidirectional dedicated real-time handler interface can be used to transmit a synchronization signal or other information to the handler in real-time, and the transmitted signal can be test site specific. The real-time signaling advantageously improves testing accuracy and efficiency.
Methods and systems for determining whether a measurement system is used in a valid state, includes: automatically reading out a plurality of information items; automatically obtaining information on current operating environmental conditions; automatically reading reference information items identifying the measurement system components and/or representing one or more characteristics of the measurement system components and information on reference operating environmental conditions; and comparing the read out information items identifying the measurement system components and/or representing one or more characteristics of the measurement system components with the reference information items identifying the measurement system components and/or representing one or more characteristics of the measurement system components, and checking whether the current operating environmental conditions comprise an allowable value or are within an allowable range defined by the information on the reference operating environmental conditions, in order to determine whether the measurement system comprising the plurality of measurement system components is used in the valid state.
G06K 7/10 - Méthodes ou dispositions pour la lecture de supports d'enregistrement par radiation corpusculaire
47.
TEST ARRANGEMENT FOR TESTING ONE OR MORE DEVICES, TEST SUPPORT MODULE FOR SUPPORTING TESTING ONE OR MORE DEVICES, AND METHOD FOR OPERATING AN AUTOMATED TEST EQUIPMENT
The disclosure describes a test support module for supporting a test of at least one device under test (DUT). The test support module comprises a plurality of pogo pins configured to establish a connection to at least one of a load board or a probe card of an automated test equipment and at least one electronic support component configured to support a test of at least one DUT. The at least one electronic support component is electrically coupled to the pogo pins. The test support module is configured to be inserted into a pogo block frame of the automated test equipment to position the pogo pins in an alignment position to contact at least one of the load board or the probe card. The testing innovation is more efficient in view of customization, life duration of the components, high signal performance, tester channel resources, re-usability, and costs.
Embodiments of the present invention provide an automated test equipment (a “tester”) for testing a device under test, including a bidirectional dedicated real-time handler interface. Some embodiments include an interface having a trigger function, a fixed endpoint interface, an interface arranged on a test head, and/or a number of lines/communication channels adapted to a specific communication task, without separate signal lines, for example. The bidirectional dedicated real-time handler interface can be used to transmit a synchronization signal or other information to the handler in real-time, and the transmitted signal can be test site specific. The real-time signaling advantageously improves testing accuracy and efficiency.
The disclosure describes a method of protecting a measurement system from unauthorized changes. The method comprises automatically reading out a plurality of information items from the measurement system, wherein the measurement system comprises a plurality of measurement system components and at least one local storage device, wherein the plurality of information items include at least one of identity of the measurement system components or at least one characteristic of the measurement system components; automatically combining the read out information items of each of the plurality of the measurement system components into a data collection and generating a summary data which represents the data collection; creating a signature based on the summary data; and storing the summary data and the signature in the at least one local storage device of the measurement system. This method provides more efficient and secure protection of measurement system and its components from an unauthorized change.
An automated test equipment comprises a main test flow control configured to operate a test flow in multiple device communication units and/or to provide the trigger configuration information to a local compute unit. The automated test equipment further comprises a device communication unit comprising a trigger generation unit configured to generate a trigger signal. The trigger generation unit further configured to extract payload data from a protocol-based data stream received from the device under test, and to generate the trigger signal in response to the extracted payload data or in response to one or more protocol events. A method and a computer program for testing one or more devices under test in an automated test equipment are also disclosed.
A test carrier that accommodates a device under test (DUT) and has a through-hole facing the DUT, including: a movable valve that: opens by suction through the through hole such that the DUT is sucked through the through hole.
G01R 31/28 - Test de circuits électroniques, p.ex. à l'aide d'un traceur de signaux
G01R 1/04 - Boîtiers; Organes de support; Agencements des bornes
52.
APPARATUS FOR TESTING A COMPONENT, METHOD OF TESTING THE COMPONENT, COMPUTER-READABLE STORAGE DEVICE FOR IMPLEMENTING THE METHOD, AND TEST ARRANGEMENT USING A MAGNETIC FIELD
The disclosure describes an apparatus for testing a component, wherein the apparatus is configured to apply a magnetic field with a magnetic field orientation from a set of magnetic field orientations to the component. The apparatus is further configured to perform a test on the component in the presence of the respective magnetic fields with the respective magnetic field orientations from the set of magnetic field orientations to obtain an information characterizing an operation of the component. The apparatus is also configured to determine a test result based on the information characterizing the operation of the component in the presence of different magnetic fields with different magnetic field orientations from the set of magnetic field orientations. The disclosure also describes a method of testing and a computer-readable storage device for implementing the method and provides more efficiency in view of reliability and costs.
Embodiments of the present invention provide systems and methods for multidimensional parts average testing for testing devices and analyzing testing results to detect outliers according to embodiments of the present invention. The testing can include calculating multivariate (e.g., bivariate) statistics using delta measurements of like devices, a ratio of measurements, or principal component analysis that identifies eigenvectors and eigenvalues to define meta parameters, for example. Raw test result data can be converted to residual space and robust regression can be performed to prevent outlier results from influencing regression, thereby reducing overkill advantageously.
There is provided a calibration device including: a calibration signal supply unit configured to supply, as a calibration input signal, a multitone signal having tones at a plurality of frequency bands to a converter configured to multiply an input signal by each of a plurality of signal patterns and limit a band to obtain each of a plurality of bandpass signals, and reconstruct an output signal in accordance with the input signal from the plurality of bandpass signals; a calibration bandpass signal acquisition unit configured to acquire a plurality of calibration bandpass signals obtained by the converter in response to the multitone signal; and a calibration processing unit configured to calibrate a parameter for the reconstruction in the converter based on the plurality of calibration bandpass signals.
An electronic component testing apparatus that tests a DUT (device under test) disposed in a carrier includes: a test head including a socket; and an electronic component handling apparatus that presses the DUT in the carrier against the socket. The socket includes: contactors disposed to correspond to terminals of the DUT that are exposed to the socket via a first opening of the carrier; and a first wall projecting toward the carrier along a pressing direction of the DUT. The electronic component handling apparatus aligns the terminals with the contactors by pressing the DUT against the socket such that a first pressing mechanism of the carrier presses the DUT against the first wall.
G01R 31/28 - Test de circuits électroniques, p.ex. à l'aide d'un traceur de signaux
56.
INTEGRATED CIRCUIT, AN APPARATUS FOR TESTING AN INTEGRATED CIRCUIT, A METHOD FOR TESTING AN INTEGRATED CIRCUIT AND A COMPUTER PROGRAM FOR IMPLEMENTING THIS METHOD USING MAGNETIC FIELD
The invention describes an integrated circuit, comprising a functional circuit structure which is configured to provide a functionality; and a test structure configured to set a signal, which is coupled to the functional circuit structure, to a test value in response to a magnetic field impulse, to control a test of the integrated circuit. The invention also describes an apparatus and a method for testing an integrated circuit and a computer program implementing the method. This invention provides a time-effective and cost-effective concept of component testing using magnetic interaction.
An automated test equipment comprises a tester control configured to broadcast and/or specific upload to matching module input data and/or device-specific data including keys and/or credentials and/or IDs and/or configuration information. The automated test equipment further comprises a channel processing unit configured to transform input data using device specific data in order to obtain device-under-test adapted data for testing the device under test. The channel processing unit further configured to process the DUT data using device specific data in order to evaluate the DUT data. A method and a computer program for testing one or more devices under test in an automated test equipment are also disclosed.
Provided is a stacked device comprising: a plurality of circuit layers each having a circuit portion; an insulating layer configured to cover a plurality of circuit portions included in a part of circuit layers of the plurality of circuit layers, and a plurality of conductive vias provided in the insulating layer and electrically connected to the plurality of circuit portions, wherein the conductive via electrically connected to a partial circuit portion of the plurality of circuit portions is electrically insulated on an end surface on an opposite side to the plurality of circuit portions and the partial circuit portion is broken at least partially along a stacking direction.
H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p.ex. fils de connexion ou bornes
H01L 23/60 - Protection contre les charges ou les décharges électrostatiques, p.ex. écrans Faraday
59.
Automated test equipment for testing one or more devices-under-test and method for operating an automated test equipment
An automated test equipment for testing one or more DUTs comprises a test head and a DUT interface. The DUT interface comprises a plurality of blocks of spring-loaded pins, for example groups or fields of spring-loaded pins. For example, the DUT interface is configured for establishing an electronic signal path between the test head and a DUT board or load board, which holds the DUT or which provides a connection to the DUT. The automated test equipment is configured to allow for a variation of a distance between at least two blocks of spring-loaded pins.
G01R 1/02 - MESURE DES VARIABLES ÉLECTRIQUES; MESURE DES VARIABLES MAGNÉTIQUES - Détails ou dispositions des appareils des types couverts par les groupes ou Éléments structurels généraux
G01R 1/04 - Boîtiers; Organes de support; Agencements des bornes
A circuit for calibrating a plurality of automated test equipment channels comprises a central measurement unit configured to provide a current to one of the ATE channels and/or to measure a current from one of the ATE channels. The central measurement unit comprises a central measurement port, which is coupled with the plurality of ATE channels via respective diodes circuited between the central measurement port of the central measurement unit and respective DUT ports of the ATE channels.
An automated test equipment for testing one or more DUTs comprises a test head and a DUT interface. The DUT interface comprises a plurality of blocks of spring-loaded pins, for example groups or fields of spring-loaded pins. For example, the DUT interface is configured for establishing an electronic signal path between the test head and a DUT board or load board, which holds the DUT or which provides a connection to the DUT. The automated test equipment is configured to allow for a variation of a distance between at least two blocks of spring-loaded pins.
G01R 1/02 - MESURE DES VARIABLES ÉLECTRIQUES; MESURE DES VARIABLES MAGNÉTIQUES - Détails ou dispositions des appareils des types couverts par les groupes ou Éléments structurels généraux
G01R 1/04 - Boîtiers; Organes de support; Agencements des bornes
A distortion display apparatus includes a distortion recording section and a distortion display section. The distortion recording section records the distortion of a golf club shaft during swinging in a first direction and a second direction at each time point when the distortion is measured. The distortion display section displays the distortion with a horizontal axis representing one of the first direction and the second direction and a vertical axis representing the other. The first direction is a direction in which a golf ball is hit by swinging the golf club. The second direction is a direction orthogonal to the shaft and the first direction.
Provided is a measurement apparatus including a signal source configured to output a binary digital signal configuring a multi-tone waveform, a waveform acquisition unit configured to acquire an analog signal waveform generated in response to application of the digital signal to a device under test, and a computation unit configured to calculate a frequency characteristic of the device under test from the waveform acquired by the waveform acquisition unit, in which the signal source is configured to repeatedly output a signal upconverted by multiplying a pseudo-random binary sequence (PRBS) signal by a repeating rectangular wave with a reference frequency and a reference duty ratio.
G01R 23/02 - Dispositions pour procéder à la mesure de fréquences, p.ex. taux de répétition d'impulsions; Dispositions pour procéder à la mesure de la période d'un courant ou d'une tension
G01R 31/28 - Test de circuits électroniques, p.ex. à l'aide d'un traceur de signaux
An optical testing apparatus is used in testing an optical measuring instrument that provides incident light from a light source to an incident object and receives reflected light of the incident light at the incident object. The apparatus includes an incident light receiving section, a light signal providing section, an imaging section, and an optical axis misalignment deriving section. The incident light receiving section receives incident light. The light signal providing section provides a light signal to an incident object after a predetermined delay time since the incident light receiving section has received the incident light. The imaging section images the incident light. The optical axis misalignment deriving section derives misalignment of the optical axis of the incident light with respect to the incident light receiving section based on misalignment between the incident light receiving section and the imaging section as well as an imaging result with the imaging section.
An electronic component handling apparatus handles a DUT and includes: an acquiring device that acquires current three-dimensional shape data of a DUT container having a plurality of accommodating portions each capable of accommodating the DUT; and a computer device that: calculates a first correction amount from the current three-dimensional shape data and corrects the current three-dimensional shape data based on the first correction amount; extracts, from the corrected three-dimensional shape data, at least one of a height and a slope of each of predetermined regions of the DUT container; and determines an accommodation state of the DUT based on an extraction result. The first correction amount represents at least one of a movement amount and a rotation amount in a planar direction of the current three-dimensional shape data with respect to an initial state of the DUT container set in advance.
According to the present invention, a filtering apparatus includes an FIR filter that has multipliers arranged to multiply input digital data having their respective different input time points by respective variable tap coefficients. The variable tap coefficients are each switched from a first tap coefficient to a second tap coefficient sequentially for the input digital data from later to earlier input time points. The first tap coefficient is arranged to cause the FIR filter to serve as a low-pass filter with the cut-off frequency set at a first frequency. The second tap coefficient is arranged to cause the FIR filter to serve as a low-pass filter with the cut-off frequency set at a second frequency different from the first frequency.
A61B 5/00 - Mesure servant à établir un diagnostic ; Identification des individus
A61B 5/243 - Détection de champs biomagnétiques, p.ex. de champs magnétiques produits par des courants bioélectriques spécialement adaptée aux signaux magnétocardiographiques [MCG]
A semiconductor device includes a power supply and ground layer and a semiconductor chip disposed over the power supply and ground layer. The power supply and ground layer includes a substrate and a wiring part. The substrate has one or more grooves whose openings are directed toward the semiconductor chip, and the wiring part is disposed within the one or more grooves via an insulating layer and is formed in a predetermined pattern. The substrate is connected to ground wiring of the semiconductor chip and the wiring part is connected to power supply wiring of the semiconductor chip. The wiring part is not exposed from a back surface of the substrate.
Frequency ranges may be converted by an apparatus including a converter configured to shift an original frequency range of an input data signal to a target frequency range, an input band selective filter bank configured to route the input data signal through a bandpass filter of a selected subrange within the target frequency range, the input selective filter bank including a plurality of bandpass filters, each bandpass filter having a corresponding subrange within the target frequency range.
Embodiments of the present invention provide systems and methods for automatically performing DUT testing on a large number of ZNS SSDs in parallel and in accordance with the configuration and restrictions associated with the various zones that comprise the address space of the ZNS SSDs. A computer process detects ZNS devices and their characteristics (e.g., zone parameters) and uses novel methods of executing read and write tests that can test unique features of ZNS devices. For example, some embodiments perform efficient and effective testing controls that account for numerous differences in ZNS characteristics and geometries between different device models. Embodiments can track the states of a large number of zones and handle each zone based on predetermined test specifications.
A measurement apparatus comprising: a clock generator configured to generate a sampling clock having a longer sampling cycle than a symbol cycle in a pattern under test including a symbol with a predefined number of symbols; a sampler configured to sample, according to the sampling clock, the pattern under test that is repeatedly inputted; and a measuring section configured to measure a sampling result of the sampler according to the sampling clock of a time point corresponding to a symbol transition that becomes subject to jitter measurements in the pattern under test that is repeatedly inputted.
According to the present invention, a somatic cell meter includes a somatic cell concentration measuring section, a time constant recording section, and a somatic cell concentration deriving section. The somatic cell concentration measuring section measures the somatic cell concentration of centrifuged raw milk in association with the duration of the centrifugation. The time constant recording section records a time constant in the association relationship between the somatic cell concentration and the duration. The somatic cell concentration deriving section derives the somatic cell concentration based on a measurement result from the somatic cell concentration measuring section and a recorded content from the time constant recording section.
A burn-in board includes: a board; sockets mounted on the board; a connector mounted on the board; and wiring systems disposed in the board and connecting the sockets and the connector. The wiring systems comprise: a first wiring system that transmits a first signal; and a second wiring system that transmits a second signal different from the first signal, and a type of a first connection form of the first wiring system is different from a type of a second connection form of the second wiring system.
G01R 31/10 - Localisation de défauts dans les câbles, les lignes de transmission ou les réseaux en augmentant la destruction à l'endroit du dérangement, p.ex. combustion au moyen d'un générateur d'impulsions appliquant un programme spécial
G01R 31/28 - Test de circuits électroniques, p.ex. à l'aide d'un traceur de signaux
A burn-in board includes: a board; a socket mounted on the board; a connector attached to the board; a wiring system that is disposed in the board and that connects the socket and the connector; and a compensation circuit that connects to the wiring system and that compensates a frequency characteristic of a signal transmitted through the wiring system.
A biosensor includes: a flow channel through which a liquid sample flows, the liquid sample containing a specific component; a holding sheet that is disposed in the flow channel and holds a substance corresponding to the specific component; and a first temperature sensor that is disposed to correspond to the holding sheet and detects a reaction heat generated by a contact reaction between the specific component and the corresponding substance. The biosensor acquires information on the specific component based on the reaction heat.
C12Q 1/00 - Procédés de mesure ou de test faisant intervenir des enzymes, des acides nucléiques ou des micro-organismes; Compositions à cet effet; Procédés pour préparer ces compositions
C12Q 1/26 - Procédés de mesure ou de test faisant intervenir des enzymes, des acides nucléiques ou des micro-organismes; Compositions à cet effet; Procédés pour préparer ces compositions faisant intervenir une oxydoréductase
B01L 3/00 - Récipients ou ustensiles pour laboratoires, p.ex. verrerie de laboratoire; Compte-gouttes
A test apparatus inspects an antenna element or a device including the antenna element as a DUT by OTA. A front-end unit includes a plurality of electric field detection elements provided to face a plurality of points on a radiation surface of the antenna element of the DUT. The plurality of electric field detection elements can simultaneously detect the electric fields formed at the corresponding points by the DUT, respectively. A tester body receives a plurality of detection signals from the front-end unit and evaluates the DUT.
Embodiments of the present invention provide an electrical filter structure having a direct-coupled-stub filter (DCSF). The lengths of the transmission line portions can be arranged such that electrical lengths of the transmission line portions are shorter, by at least 10 percent, than a fourth of a wavelength of a signal having a frequency of a passband center frequency of the electrical filter structure. Moreover, lengths of the stubs can be selected so that the electrical lengths of the stubs are longer, by at least 2%, than a fourth of a wavelength of a signal having a frequency of a passband center frequency of the electrical filter structure. The filter structures of embodiments of the present invention can advantageously improve filter characteristics without changing the topological structure of the filter.
Devices for testing a DUT having a circuit coupled to an antenna are disclose. The device can include a DUT location for receiving a DUT, and an adapter or probe is used to wirelessly “over-the-air” (OTA) electronically test a DUT with an embedded antenna or antenna array with the measurement probe 140 located in close proximity to the DUT. The probe can be located very close to the DUT (e.g., in the near-field region). Although the probe is located in close proximity to the DUT antenna or antenna array elements it does not significantly disturb or interfere with probe during testing.
There is provided a determination apparatus including: a result acquisition unit configured to acquire test results of tests on a plurality of items which are performed on a device under measurement; and a first determination unit configured to determine whether to retest a device under measurement that has failed the test, in which the first determination unit is configured to perform the determination based on reproducibility of the test results in a case where the tests have been performed on a plurality of devices under measurement multiple times in advance.
Embodiments of the present invention provide systems and methods for performing tests on a device under test (DUT) based on training data derived from a set of training DUTs using nearfield measurement data. Nearfield measurement data can be mapped to performance metrics that approximate performance metrics derived from the far-field measurement data. Nearfield measurements can then be performed on a DUT to generate second nearfield measurement data, and performance metrics of the DUT are generated using the second nearfield measurement data and the mapped performance metrics derived from the training DUTs.
G01R 27/32 - Mesure de l'atténuation, du gain, du déphasage ou des caractéristiques qui en dérivent dans des réseaux électriques quadripoles, c. à d. des réseaux à double entrée; Mesure d'une réponse transitoire dans des circuits comportant des constantes réparties
According to the present invention, an identification information readout apparatus includes an identification information readout section, a somatic cell concentration measuring section, and a measurement result recording section. The identification information readout section reads cow identification information out of a recording medium with the cow identification information recorded therein. The somatic cell concentration measuring section measures the somatic cell concentration of milk obtained from a cow. The measurement result recording section records the somatic cell concentration and the cow identification information in association with each other. The recording medium is attached to the cow.
Embodiments of the present invention provide a digital signal processing apparatus, including an interpolator, an interpolating convolver, or the like, for providing a plurality of output samples or output values in parallel, such as P output samples provided by P Farrow cores, based on a set of input samples or input values, such as 2P+M−2 samples. The digital signal processing apparatus includes a sample distribution logic or structure configured to provide a plurality of subsets of the set of input samples to a plurality of processing cores, such as interpolation cores (e.g., Farrow cores) that perform processing operations associated with different time shifts, for example with respect to a reference time (e.g., a time associated with the input samples). The sample distribution logic includes a hierarchical tree structure having a plurality of hierarchical levels of splitting nodes.
Embodiments of the present invention provide a digital signal processing apparatus including a combiner logic and a plurality of processing cores. Input samples of the digital signal processing apparatus are provided to the plurality of processing cores. Sets of output samples of the processing cores are provided to the combiner logic as input samples, and the sets of samples are provided to the combiner nodes c of the highest hierarchical level (h=0). A digital signal processing apparatus or a parallel decimating digital convolver may be used as a building block of a signal processor application-specific integrated circuit (ASIC) and/or part of other instruments for generating output samples. Furthermore, applications of the digital signal processing apparatus described herein can be addressed on a parallel DSP, in a response time of real-time or near to real-time, for flexible (or almost arbitrary high) sample rates.
G06F 15/80 - Architectures de calculateurs universels à programmes enregistrés comprenant un ensemble d'unités de traitement à commande commune, p.ex. plusieurs processeurs de données à instruction unique
G06F 9/48 - Lancement de programmes; Commutation de programmes, p.ex. par interruption
84.
Test arrangement for testing high-frequency components, particularly silicon photonics devices under test
The invention relates to a probe card (PC) for use with an automatic test equipment (ATE), wherein the probe card (PC) comprises a probe head (PH) on a first side thereof, and wherein the probe card (PC) is adapted to be attached to an interface (IF) and wherein the probe card (PC) comprises a plurality of contact pads on a second side in a region opposing at least a region of the interface (IF), arranged to contact a plurality of contacts of the interface (IF), and wherein the probe card (PC) comprises one or more coaxial connectors (CCPT) arranged to mate with one or more corresponding coaxial connectors (CCPT) of the interface (IF). The invention relates further to pogo tower (PT) for connecting a wafer probe interface (WPI) of an automatic test equipment with the probe card (PC).
According to the present invention, an optical testing apparatus is used in testing an optical measuring instrument. The optical measuring instrument provides an incident light pulse from a light source to an incident object and receives a reflected light pulse as a result of reflection of the incident light pulse at the incident object. The optical testing apparatus includes a testing light source and a rise time control section. The testing light source is arranged to generate a testing light pulse to be provided to the optical measuring instrument. The rise time control section is arranged to control the rise time of the testing light pulse.
G02F 1/11 - Dispositifs ou dispositions pour la commande de l'intensité, de la couleur, de la phase, de la polarisation ou de la direction de la lumière arrivant d'une source lumineuse indépendante, p.ex. commutation, ouverture de porte ou modulation; Optique non linéaire pour la commande de l'intensité, de la phase, de la polarisation ou de la couleur basés sur des éléments acousto-optiques, p.ex. en utilisant la diffraction variable par des ondes sonores ou des vibrations mécaniques analogues
G02F 1/03 - Dispositifs ou dispositions pour la commande de l'intensité, de la couleur, de la phase, de la polarisation ou de la direction de la lumière arrivant d'une source lumineuse indépendante, p.ex. commutation, ouverture de porte ou modulation; Optique non linéaire pour la commande de l'intensité, de la phase, de la polarisation ou de la couleur basés sur des céramiques ou des cristaux électro-optiques, p.ex. produisant un effet Pockels ou un effet Kerr
86.
Test apparatus, test method, and computer-readable storage medium
A test apparatus includes: an electrical connection unit electrically connected to a terminal of each of a plurality of light emitting devices to be tested; a light source unit for collectively irradiating the plurality of light emitting devices with light; an electrical measurement unit for measuring a photoelectric signal obtained by photoelectrically converting the light irradiated from the light source unit by each light emitting device; a light emission control unit for causing at least one light emitting device to be subjected to light emission processing to emit light; a light measuring unit for measuring light emitted by the at least one light emitting device to be subjected to the light emission processing; and a determination unit determining a quality of each light emitting device on the basis of a measurement result of the electrical measurement unit and a measurement result of the light measuring unit.
An electronic circuit for converting a signal between digital and analog in a burst mode, including a processor configured to utilize a synchronizing clock signal, a converter configured to convert a signal data between digital and analog using a converter clock signal, a phase comparator configured to determine a phase relationship between the synchronizing clock signal and the converter clock signal, and a digital signal processor coupled to the phase comparator and configured to receive an information about the phase relationship, wherein the digital signal processor is configured to apply a delay to the signal data being exchanged between the processor and. The synchronizing clock signal and the converter clock signal have a predetermined frequency relationship.
A measurement unit comprising a converter unit and a processing unit and configured to provide a measurement result value, based on a first input signal. The converter unit is configured to provide first digital, quantized values based on the first input signal. The measurement unit is further configured to calculate second values, which represents a reference quantity or a reference value, for a plurality of quantization step sizes associated with different values of the control signal. The measurement unit is configured to change the control signal of the converter unit between determination of different first values and/or a determination of the different second values, such that different first values and/or different second values are provided using different converter quantization step sizes. The processing unit is configured to provide a measurement result value from a predefined number of first values and a predefined number of second values.
Embodiments of the present invention provide systems and methods for storing calibration data for a test system operable to test a device under test (DUT). The test system includes one or more channel modules and a device interface. A first part of the calibration data is stored on a non-volatile memory. The non-volatile memory can be disposed in different parts of the test system. The non-volatile memory is located on the device interface and can also be located on one or more of the channel modules, as well as an attachment of the test system. The non-volatile memory is associated with the one or more channel modules. The second part of the calibration data is stored on a non-volatile memory associated with the device-under-test interface.
A high frequency power divider circuit for distributing an input signal to two or more signal output ports, comprising: a rat race coupler, wherein the rat race coupler is configured to couple an input signal provided at an input port of the rat race coupler to a first output of the rat race coupler and to a second output of the rat race coupler; a first coupling structure coupled to the first output of the rat race coupler, to couple the first output of the rat race coupler with a first signal output port; and a second coupling structure coupled to the second output of the rat race coupler, to couple the second output of the rat race coupler with a second signal output port; wherein a characteristic impedance of a first transmission line portion between the input port and the first output of the rat race coupler deviates from a nominal ring impedance of the rat race coupler in a first direction, and wherein a characteristic impedance of a second transmission line portion between the input port and the second output of the rat race coupler deviates from the nominal ring impedance of the rat race coupler in a second direction, which is opposite to the first direction.
A control device controls a magnetic field generated by a magnetic field generator, and includes a magnetic field controller that controls the magnetic field generator based on a detected value by a magnetic field sensor. The magnetic field controller receives a command value generated by the magnetic field generator, and the detected value. The magnetic field controller generates an error signal based on an error between the command value and the detected value and outputs to the magnetic field generator a control signal amplified by a control gain against the error. The control gain includes: a first gain that becomes smaller as a frequency of the error signal gets higher; and a second gain that gets larger as an amplitude of the error signal gets larger.
The invention concerns a circuit for transferring a data from one clock domain to another clock domain, the circuit comprising: a digital circuit configured to generate a data signal synchronized with a source clock signal, and to receive such data by sampling the data signal synchronized with a target clock signal; a phase comparator which is configured to determine a phase relationship between the source clock signal and the target clock signal; and a data signal synchronization circuit configured to receive data signal transitions that are synchronized with the source clock signal, and to provide a synchronized data signal transitions of which are synchronized with the target clock signal.
A measurement unit comprising a converter unit and a processing unit is configured to provide a measurement result value, based on a first input signal and a second input signal.
A measurement unit comprising a converter unit and a processing unit is configured to provide a measurement result value, based on a first input signal and a second input signal.
The converter unit is configured to provide a first digital, quantized values based on the first input signal or derived from the first input signal and the second input signal. The converter unit is further configured to provide second digital, quantized values based on the second input signal. The measurement unit is configured to change the one or more control signals of the converter unit between determination of different first values or a determination of the different second values, wherein different first values and/or different second values are provided using different converter quantization step sizes. The processing unit is configured to provide a measurement result value from a predefined number of first values and a predefined number of second values.
Embodiments of the present invention provide systems and methods for performing device testing using automatic test equipment that can advantageously utilize relatively large numbers of test scenarios and activities including multiple test steps and resources and that prevents test parameters from conflicting or colliding to improve test performance and accuracy. The test activities of a given test scenario can be configured to be executed concurrently. The test activities can be associated with one or more test parameters characterized by respective test parameter values and/or are associated with one or more constraints
A nanopore device includes a pore and an electrode pair. A current measurement unit applies a bias voltage that corresponds to a voltage setting command across an electrode pair and generates digital current data that corresponds to a current signal that flows through the nanopore device. A data processing apparatus generates the voltage setting command, acquires the current data and voltage data including information with respect to the waveform of the bias voltage Vb in a form in which they are associated on the time axis, and judges the kind of particles stored in the nanopore device based on the current data and the voltage data.
A directional coupler arrangement, comprising: a directional coupler comprising a direct path and a first coupled port and a second coupled port; a compensation arrangement configured to provide a coupling between signals of the first coupled port and of the second coupled port; wherein the compensation arrangement is configured to improve a directivity when compared to a directivity of the directional coupler by the coupling.
H01P 5/18 - Dispositifs à accès conjugués, c. à d. dispositifs présentant au moins un accès découplé d'un autre accès consistant en deux guides couplés, p.ex. coupleurs directionnels
H01P 5/02 - Dispositifs de couplage du type guide d'ondes à coefficient de couplage invariable
97.
Automated test equipment comprising a device under test loopback and an automated test system with an automated test equipment comprising a device under test loopback
An embodiment is an automated test equipment (ATE) for testing a device under test (DUT) which is connected to the ATE via a load board. The ATE comprises a stimulus module, a measurement module, a loopback, a first switch, a second switch, and a load board interface. The load board interface comprises a first radio frequency port and a second radio frequency port. The first and second radio frequency ports are configured to be coupled to the respective ports of the load board. The first switch is configured to couple the first radio frequency port to the stimulus module in a first switching state of the first switch and the second switch is configured to couple the second radio frequency port to the measurement module in a first switching state of the second switch. Further, the first switch is configured to couple the first radio frequency port to a first end of the loopback in a second switching state of the first switch and the second switch is configured to couple the second radio frequency port to a second end of the loopback in a second switching state of the second switch. When the first and second switches are in their respective second switching state, a loopback signal path is formed between the first and second radio frequency ports.
An electrical filter structure for forwarding an electrical signal from a first port, e.g. P1, to a second port, e.g. P2, in a frequency selective manner, wherein the filter is a microwave filter, the electrical filter structure comprising: a plurality of pairs of an open stub and a short-circuited stub coupled electrically in parallel to a transmission line comprising a plurality of transmission line portions at a plurality of respective junctions between adjacent transmission line portions, e.g. Cross junction; and wherein the first port is connected with a first of the junctions having a first pair comprising a first open stub and a first short-circuited stub; wherein the second port is connected with a last of the junctions having a last pair comprising a last open stub and a last short-circuited stub; wherein lengths of the pair of the open stub and the short-circuited stub coupled to a same of the junctions are chosen such that electrical lengths of the open stub and short-circuited stub of the respective pairs are equal within a tolerance of +/−10%.
A test apparatus includes: an electrical connection unit configured to be electrically connected to a light emitting device panel having a plurality of cells each including a light emitting device and arranged in a row direction and a column direction; a light source unit configured to collectively irradiate the plurality of cells with light; a reading unit configured to read, for each row of the light emitting device panel, a photoelectric signal obtained by photoelectrically converting the light in each of two or more of the cells arranged in the column direction by the light emitting device; a measuring unit configured to measure a photoelectric signal read from each of the plurality of cells; and a determination unit configured to determine a quality of each of the plurality of cells on a basis of a measurement result of the measuring unit.
G09G 3/32 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p.ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p.ex. utilisant des diodes électroluminescentes [LED]
H05B 45/50 - Circuits pour faire fonctionner des diodes électroluminescentes [LED] sensibles à la vie des LED; Circuits de protection
H05B 45/345 - Stabilisation du courant; Maintien d'un courant constant
H05B 45/34 - Stabilisation de la tension; Maintien d'une tension constante
100.
TEST APPARATUS, TEST METHOD, AND COMPUTER-READABLE STORAGE MEDIUM
A test apparatus includes: an electrical connection unit to be electrically connected to a terminal of each of a plurality of light emitting devices to be tested; a light source unit for collectively irradiating the plurality of light emitting devices with light; a measuring unit for measuring a photoelectric signal obtained by photoelectrically converting light irradiated by the light source unit and output via the electrical connection unit by each light emitting device; an acquisition unit for acquiring a correction map including a correction value for correcting a variation in intensity of light with which a position of each light emitting device is irradiated by the light source unit; and a determination unit for determining a quality of each light emitting device on a basis of a measurement result by the measuring unit and the correction map acquired by the acquisition unit.
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