Toshiba Corporation

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[Owner] Toshiba Corporation 12 015
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Date
Nouveautés (dernières 4 semaines) 268
2023 septembre (MACJ) 248
2023 août 109
2023 juillet 98
2023 juin 123
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Classe IPC
G06K 9/00 - Méthodes ou dispositions pour la lecture ou la reconnaissance de caractères imprimés ou écrits ou pour la reconnaissance de formes, p.ex. d'empreintes digitales 696
A61B 6/00 - Appareils pour diagnostic par radiations, p.ex. combinés avec un équipement de thérapie par radiations 588
G03G 15/00 - Appareils pour procédés électrographiques utilisant un dessin de charge 545
A61B 6/03 - Tomographes assistés par ordinateur 531
G03G 15/20 - Appareils pour procédés électrographiques utilisant un dessin de charge pour le fixage, p.ex. par la chaleur 525
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Classe NICE
09 - Appareils et instruments scientifiques et électriques 242
42 - Services scientifiques, technologiques et industriels, recherche et conception 110
07 - Machines et machines-outils 61
11 - Appareils de contrôle de l'environnement 47
35 - Publicité; Affaires commerciales 39
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En Instance 2 467
Enregistré / En vigueur 17 683
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1.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

      
Numéro d'application 17942019
Statut En instance
Date de dépôt 2022-09-09
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Okawa, Naoki

Abrégé

According to one embodiment, a semiconductor device includes a lead frame including a terminal; an element on a first surface of the lead frame; and a package member covering the lead frame and the semiconductor element. The terminal includes a back-side portion provided on a side of a second surface of the lead frame and exposed from the package member in a first direction perpendicular to the first surface, the second surface being opposite to the first surface, a lateral-side portion provided between the first surface and the back-side portion in the first direction and exposed from the package member in a second direction parallel to the first surface, and a recessed portion provided between the lateral-side portion and the back-side portion in the first direction.

Classes IPC  ?

  • H01L 23/498 - Connexions électriques sur des substrats isolants
  • H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition
  • H01L 23/495 - Cadres conducteurs
  • H01L 21/48 - Fabrication ou traitement de parties, p.ex. de conteneurs, avant l'assemblage des dispositifs, en utilisant des procédés non couverts par l'un uniquement des groupes
  • H01L 21/56 - Capsulations, p.ex. couches de capsulation, revêtements
  • H01L 21/66 - Test ou mesure durant la fabrication ou le traitement

2.

SEMICONDUCTOR DEVICE

      
Numéro d'application 18007227
Statut En instance
Date de dépôt 2021-07-26
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION (Japon)
Inventeur(s) Sugimoto, Yuta

Abrégé

A semiconductor device includes a semiconductor substrate, a first semiconductor layer on the semiconductor substrate, a second semiconductor layer on the first semiconductor layer, a first electrode on the second semiconductor layer, a second electrode arranged with the first electrode along a front surface of the second semiconductor layer, a third electrode between the first and second electrodes on the second semiconductor layer, a metal layer on a back surface of the semiconductor substrate at a side opposite to the first semiconductor layer, and a conductor extending inside the semiconductor substrate and electrically connecting the first electrode and the metal layer via the second semiconductor layer. The second semiconductor layer includes a first region including a first-conductivity-type impurity, and a second region including a first-conductivity-type impurity with a higher concentration than the first region; and the second region is between the conductor and the first electrode.

Classes IPC  ?

  • H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
  • H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
  • H01L 29/66 - Types de dispositifs semi-conducteurs
  • H01L 29/40 - Electrodes
  • H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p.ex. fils de connexion ou bornes

3.

PRINTED CIRCUIT BOARD AND DISK DEVICE

      
Numéro d'application 17899385
Statut En instance
Date de dépôt 2022-08-30
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Akutsu, Kazuyoshi

Abrégé

According to one embodiment, a printed circuit board includes a substrate and a shared pad group provided on the substrate and including a plurality of shared pads. The shared pads include a first area, a second area smaller in size than the first area, a port of which is overlap the first area and an other port of which is located to protrude from the first area to a side of another one of the shared pads, and a second side edge located on a side of another shared pad. The second pad side edge includes a first side edge defining the first area, a second side edge defining the second area and displaced on a side of another shared pad with respect to the first side edge, and a sloping side edge connecting the first side edge and the second side edge to each other.

Classes IPC  ?

  • H05K 1/11 - Eléments imprimés pour réaliser des connexions électriques avec ou entre des circuits imprimés
  • H05K 1/02 - Circuits imprimés - Détails
  • G11B 5/82 - Disques

4.

MULTIPLICATION DEVICE, MULTIPLY-ACCUMULATE OPERATION DEVICE, MATRIX OPERATION DEVICE, AND RESERVOIR DEVICE

      
Numéro d'application 17820224
Statut En instance
Date de dépôt 2022-08-16
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s)
  • Marukame, Takao
  • Mizushima, Koichi
  • Nishi, Yoshifumi
  • Nomura, Kumiko

Abrégé

A multiplication device according to one embodiment includes a short-term memory circuit, a long-term memory circuit, a conversion circuit, and a control circuit. The short-term memory circuit generates a first control voltage in accordance with a weight value. The long-term memory circuit generates a second control voltage by a circuit with a larger time constant than the short-term memory circuit. The conversion circuit outputs an output current by multiplying an input voltage by a conductance. The output current is output by that, the first control voltage is applied to a control terminal of the conversion circuit, and an input voltage according to an input value is applied to an input terminal of the conversion circuit. The control circuit executes a calibration process of matching the first control voltage with the second control voltage by transferring an electric charge from the long-term memory circuit to the short-term memory circuit.

Classes IPC  ?

  • G06F 7/544 - Méthodes ou dispositions pour effectuer des calculs en utilisant exclusivement une représentation numérique codée, p.ex. en utilisant une représentation binaire, ternaire, décimale utilisant des dispositifs non spécifiés pour l'évaluation de fonctions par calcul
  • H03K 17/687 - Commutation ou ouverture de porte électronique, c. à d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ
  • G06F 17/16 - Calcul de matrice ou de vecteur

5.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17891671
Statut En instance
Date de dépôt 2022-08-19
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Kono, Hiroshi

Abrégé

A semiconductor device includes a first electrode, a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a second electrode, a third electrode, and a fourth semiconductor layer. The third electrode is located among the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer via an insulating film. The fourth semiconductor layer is located between the insulating film and the first semiconductor layer and between the insulating film and the second semiconductor layer. An impurity concentration of the fourth semiconductor layer is less than an impurity concentration of the first semiconductor layer and an impurity concentration of the second semiconductor layer.

Classes IPC  ?

  • H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
  • H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
  • H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
  • H01L 29/49 - Electrodes du type métal-isolant-semi-conducteur

6.

GENERATION SYSTEM, GENERATION METHOD, AND STORAGE MEDIUM

      
Numéro d'application 18168822
Statut En instance
Date de dépôt 2023-02-14
Date de la première publication 2023-09-28
Propriétaire Kabushiki Kaisha Toshiba (Japon)
Inventeur(s)
  • Zhou, Xinyi
  • Takaki, Masaya
  • Sugiyama, Naomi
  • Shinji, Sayaka
  • Oka, Kazuhiro

Abrégé

According to one embodiment, a generation system generates a production plan. The production plan is for producing products of product types by processes using production lines. The system includes an optimization calculation part, an input plan generator, and a verification part. The optimization calculation part generates a processing plan by an optimization calculation using first input data. The first input data includes a production plan amount of each of the product types and a processing capacity of each equipment. The input plan generator generates an input plan by using second input data. The second input data includes an input amount of workpieces to each of the production lines for each of the product types. The second input data further includes a processing route in the plurality of processes for each of the product types. The verification part determines an appropriateness of the processing plan and the input plan

Classes IPC  ?

  • G05B 19/418 - Commande totale d'usine, c.à d. commande centralisée de plusieurs machines, p.ex. commande numérique directe ou distribuée (DNC), systèmes d'ateliers flexibles (FMS), systèmes de fabrication intégrés (IMS), productique (CIM)

7.

MAGNETIC DISK DEVICE AND METHOD

      
Numéro d'application 17903870
Statut En instance
Date de dépôt 2022-09-06
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s) Maruyama, Syosuke

Abrégé

According to an embodiment, on a first track of a magnetic disk, a plurality of first sectors in each of which a data segment is stored, and a second sector in which a parity for first error correction is stored are arranged in this order from a first position. A controller executes a first operation of sequentially reading a first data segment from each of the plurality of first sectors, and storing a group of the read first data segments in a buffer memory. The controller obtains a first parity from the group of the read first data segments. The controller starts a second operation of writing each first data segment in the group of the first data segments stored in the buffer memory, to a first sector that is a read source among the plurality of first sectors, and writing the first parity to the second sector, before the magnetic head reaches the first position.

Classes IPC  ?

  • G11B 5/09 - Enregistrement numérique
  • G11B 5/008 - Enregistrement, reproduction ou effacement sur des bandes ou des fils magnétiques

8.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17942510
Statut En instance
Date de dépôt 2022-09-12
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s)
  • Tsai, Yuning
  • Takahashi, Yoshiko

Abrégé

According to one embodiment, a semiconductor device includes a package substrate including a package member and a first conductive portion; a semiconductor package provided on a first surface of the package substrate inside the package member and coupled to the first conductive portion; a first semiconductor chip provided on the first surface of the package substrate inside the package member and including a first terminal; a second semiconductor chip provided on the first surface of the package substrate inside the package member and including a second terminal; and a connection component that couples the first and second terminals to the first conductive portion inside the package member.

Classes IPC  ?

  • H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des groupes principaux , ou dans une seule sous-classe de , , p.ex. circuit hybrides
  • H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

9.

SILICON CARBIDE SEMICONDUCTOR DEVICE

      
Numéro d'application 17897753
Statut En instance
Date de dépôt 2022-08-29
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s)
  • Suzuki, Takuma
  • Kono, Hiroshi
  • Tanaka, Katsuhisa

Abrégé

According to one embodiment, a silicon carbide semiconductor device includes a first electrode, a second electrode, a first semiconductor layer, a plurality of first semiconductor pillar regions of a first conductivity type, a second semiconductor pillar region of a second conductivity type. The first semiconductor pillar regions include a first region has a first impurity concentration and second region has a second impurity concentration higher than the first impurity concentration. The second semiconductor pillar regions include a third region has a third impurity concentration and a fourth region has a fourth impurity concentration higher than the third impurity concentration.

Classes IPC  ?

  • H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
  • H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices

10.

MAGNETIC DISK DEVICE AND METHOD

      
Numéro d'application 17931647
Statut En instance
Date de dépôt 2022-09-13
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Tawada, Fuyuki

Abrégé

According to an embodiment, a magnetic disk is provided with a track, and the track is provided with a data sector. The data sector includes a plurality of servo regions in which servo data is written, and a plurality of first data regions. Each of the plurality of first data regions is disposed between two servo regions of the plurality of servo regions. The controller executes a first write operation of writing data sequentially to the plurality of first data regions using the magnetic head. After the first write operation, the controller executes a second write operation of retrying the writing to a second data region in which the write error is detected among the plurality of first data regions, and not retrying the writing to a third data region in which the write error is not detected among the plurality of first data regions.

Classes IPC  ?

  • G11B 19/04 - Dispositions prévenant, évitant ou signalant la surimpression sur le même support, ou d'autres fonctionnements défectueux de l'enregistrement ou de la reproduction
  • G11B 20/18 - Détection ou correction d'erreurs; Tests

11.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17940373
Statut En instance
Date de dépôt 2022-09-08
Date de la première publication 2023-09-28
Propriétaire
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
  • KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s)
  • Asaba, Shunsuke
  • Kono, Hiroshi

Abrégé

A semiconductor device includes: a first conductive type first silicon carbide region including a first region, a second region and a third region both on the first region, the second region having impurity concentration equal to or higher than the first region, and the third region having impurity concentration higher than the second region; a second conductive type second silicon carbide region on the first silicon carbide region, the second silicon carbide region including a fourth region in contact with the second region and a fifth region in contact with the third region, and the fifth region having impurity concentration higher than the fourth region; a third silicon carbide region of a first conductive type on the second silicon carbide region; a first gate electrode; a first electrode having a first portion in contact with the second silicon carbide region and the third silicon carbide region; and a second electrode.

Classes IPC  ?

  • H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
  • H01L 29/66 - Types de dispositifs semi-conducteurs
  • H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée

12.

COMMUNICATION RELAY APPARATUS SND STORAGE MEDIUM STORING COMPUTER PROGRAM

      
Numéro d'application 18153983
Statut En instance
Date de dépôt 2023-04-11
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • Toshiba Infrastructure Systems & Solutions Corporation (Japon)
Inventeur(s) Tango, Toshihiro

Abrégé

A communication relay apparatus and a storage medium storing a computer program that allow improvement of a quality of communication with a mobile station are provided. A communication relay apparatus includes a detector and a controller. The detector detects a mobile station located in a cover area formed by a plurality of remote units. The controller controls, for the remote units, communication resources used by the remote units for communication with the mobile station, based on a detection result of the detector.

Classes IPC  ?

  • H04B 7/026 - Diversité coopérative, p.ex. utilisant des stations fixes ou mobiles en tant que relais
  • H04B 7/155 - Stations terrestres

13.

SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVING DEVICE, VEHICLE, AND ELEVATOR

      
Numéro d'application 17823088
Statut En instance
Date de dépôt 2022-08-30
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s) Shimizu, Tatsuo

Abrégé

A semiconductor device according to an embodiment includes: a silicon carbide layer having a first surface and second surface parallel to a first direction and a second direction perpendicular to the first direction; a first trench and second trench extending in the first direction; an n-type first region in the silicon carbide layer; a p-type second region between the first region and the first surface in the silicon carbide layer; an n-type third region between the second region and the first surface in the silicon carbide layer; a p-type sixth region between the first region and the first trench in the silicon carbide layer; and a p-type eighth region located between the second region and the first trench, between the third region and the first trench, and in contact with the sixth region in the silicon carbide layer. The eighth regions are repeatedly disposed in the first direction.

Classes IPC  ?

  • H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
  • H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
  • H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
  • H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
  • H02P 27/06 - Dispositions ou procédés pour la commande de moteurs à courant alternatif caractérisés par le type de tension d'alimentation utilisant une tension d’alimentation à fréquence variable, p.ex. tension d’alimentation d’onduleurs ou de convertisseurs utilisant des convertisseurs de courant continu en courant alternatif ou des onduleurs

14.

MULTILAYER JUNCTION PHOTOELECTRIC CONVERSION ELEMENT AND METHOD FOR MANUFACTURING THE SAME

      
Numéro d'application 18317466
Statut En instance
Date de dépôt 2023-05-15
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Gotanda, Takeshi
  • Tobari, Tomohiro
  • Saita, Yutaka

Abrégé

The present embodiment provides a semiconductor element that can generate power with high efficiency and has high durability. The present embodiment provides a semiconductor element that can generate power with high efficiency and has high durability. A multilayer junction photoelectric conversion element according to an embodiment comrises: a first electrode; a first photoactive layer including a perovskite semiconductor; a first passivation layer; a first doped layer; a second photoactive layer containing silicon; and a second electrode, in this order. The multilayer junction photoelectric conversion element further comprises a light scattering layer including a plurality of mutually separated silicon alloy layers that penetrate a part of the passivation layer and electrically connect the first photoactive layer and the first doped layer. The element can be manufactured by a method including forming a bottom cell including a second active layer and then forming a first photoactive layer by coating.

Classes IPC  ?

  • H01L 31/0224 - Electrodes
  • H01L 31/18 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives

15.

METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE AND SILICON CARBIDE SEMICONDUCTOR DEVICE

      
Numéro d'application 17892809
Statut En instance
Date de dépôt 2022-08-22
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s) Suzuki, Takuma

Abrégé

According to one embodiment, a method for manufacturing a silicon carbide semiconductor device. The method includes forming a semiconductor layer on a substrate. The method includes forming a first semiconductor region by implanting an impurity of a first conductivity type into the semiconductor layer. The first semiconductor region has a first concentration of the first conductivity type. The method includes forming a first semiconductor pillar portion and a second semiconductor pillar portion by implanting an impurity of a second conductivity type into a plurality of locations of the first semiconductor region. The first semiconductor pillar portion is of the first conductivity type. The second semiconductor pillar portion has a second concentration of the second conductivity type and is adjacent to the first semiconductor pillar portion. The method includes repeating the forming of the semiconductor layer, forming of the first semiconductor region, and the first and second semiconductor pillar portions.

Classes IPC  ?

  • H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
  • H01L 29/66 - Types de dispositifs semi-conducteurs
  • H01L 21/04 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives les dispositifs présentant au moins une barrière de potentiel ou une barrière de surface, p.ex. une jonction PN, une région d'appauvrissement, ou une région de concentration de porteurs de charges
  • H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices

16.

DETECTION CIRCUIT AND COMMUNICATION SYSTEM

      
Numéro d'application 17943007
Statut En instance
Date de dépôt 2022-09-12
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Uo, Toyoaki

Abrégé

According to one embodiment, there is provided a detection circuit including a first insulating element, a second insulating element, a first transmission test circuit, a second transmission test circuit, and a reception test circuit. The first transmission test circuit is connected to the first insulating element. The second transmission test circuit is connected to the second insulating element. The reception test circuit is connected to each of the first insulating element and the second insulating element to output a detection signal corresponding to a difference between a voltage of the first insulating element and a voltage of the second insulating element.

Classes IPC  ?

  • H04B 1/16 - Circuits
  • H01Q 1/38 - Forme structurale pour éléments rayonnants, p.ex. cône, spirale, parapluie formés par une couche conductrice sur un support isolant
  • H04B 1/18 - Circuits d'entrée, p.ex. pour le couplage à une antenne ou à une ligne de transmission

17.

MAGNETIC DISK APPARATUS AND METHOD

      
Numéro d'application 17943015
Statut En instance
Date de dépôt 2022-09-12
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Ogawa, Kenji

Abrégé

According to one embodiment, a magnetic disk apparatus includes a magnetic disk, a magnetic head, and a controller. The magnetic disk is provided with a track including a plurality of first sectors. The controller accesses the magnetic disk by using the magnetic head. The plurality of first sectors includes a plurality of second sectors where data segments are written and a third sector where parity and first information indicating effectiveness or ineffectiveness of protection by the parity are written.

Classes IPC  ?

  • G11B 5/012 - Enregistrement, reproduction ou effacement sur des disques magnétiques

18.

CRIMPING DETERMINATION DEVICE, CRIMPING DETERMINATION METHOD, CRIMPING DETERMINATION PROGRAM, WIRE HARNESS PROCESSING DEVICE, AND WIRE HARNESS PROCESSING METHOD

      
Numéro d'application 18168761
Statut En instance
Date de dépôt 2023-02-14
Date de la première publication 2023-09-28
Propriétaire Kabushiki Kaisha Toshiba (Japon)
Inventeur(s)
  • Tanaka, Akira
  • Watanabe, Masashi
  • Sato, Emi
  • Yang, Juhong

Abrégé

A crimping determination device according to an embodiment includes a dropping unit, an image acquisition unit, and a control unit. The dropping unit drops a test solution to a wire harness. The wire harness includes a crimped portion in which an electric wire is crimped by a crimping terminal, a first electric wire portion in which the electric wire is exposed on a distal end side, and a second electric wire portion in which the electric wire is exposed on a proximal end side. The dropping unit drops the test solution to either one of the first electric wire portion and the second electric wire portion. The image acquisition unit acquires an image including the other one of the first electric wire portion and the second electric wire portion. The control unit determines a quality of a crimped state of the crimped portion based on the image.

Classes IPC  ?

  • G01N 15/08 - Recherche de la perméabilité, du volume des pores ou de l'aire superficielle des matériaux poreux
  • G06T 7/00 - Analyse d'image

19.

PHOTODETECTOR

      
Numéro d'application 17891799
Statut En instance
Date de dépôt 2022-08-19
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Yasuda, Kensuke

Abrégé

A photodetector according to an embodiment includes a plurality of cell regions disposed in an array, and an element isolation region provided between the cell regions, each of the cell regions including: a semiconductor layer having a first face and a second face opposite to the first face; a first semiconductor region of a first conductivity type provided in the semiconductor layer; a second semiconductor region of a second conductivity type provided between the first semiconductor region and the first face; an electrode in contact with the second semiconductor region; and a plurality of metal regions having a part surrounded by the first semiconductor region and another part surrounded by the second semiconductor region.

Classes IPC  ?

  • H01L 31/107 - Dispositifs sensibles au rayonnement infrarouge, visible ou ultraviolet caractérisés par une seule barrière de potentiel ou de surface la barrière de potentiel fonctionnant en régime d'avalanche, p.ex. photodiode à avalanche
  • H01L 31/0224 - Electrodes
  • H01L 31/108 - Dispositifs sensibles au rayonnement infrarouge, visible ou ultraviolet caractérisés par une seule barrière de potentiel ou de surface la barrière de potentiel étant du type Schottky
  • G01T 1/24 - Mesure de l'intensité de radiation avec des détecteurs à semi-conducteurs

20.

ROTOR AND ROTATING ELECTRICAL MACHINE

      
Numéro d'application 18325935
Statut En instance
Date de dépôt 2023-05-30
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Uchida, Hidenori
  • Kano, Masaru

Abrégé

According to one embodiment, a rotor includes, for each magnetic pole of a rotor iron core, first and second outer circumferential side bridge portions, and first and second inner circumferential side bridge portions. The first and second outer circumferential side bridge portions are provided such that a mutual interval is decreased from an outer circumferential side of the rotor iron core to an inner circumferential side. The first and second inner circumferential side bridge portions are provided such that a mutual interval is decreased from the outer circumferential side of the rotor iron core to the inner circumferential side, and are connected to the first and second outer circumferential side bridge portions, respectively.

Classes IPC  ?

  • H02K 1/276 - Aimants encastrés dans le noyau magnétique, p.ex. aimants permanents internes [IPM]

21.

MAGNETIC DISK DEVICE AND METHOD

      
Numéro d'application 17897062
Statut En instance
Date de dépôt 2022-08-26
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Furuhashi, Kana

Abrégé

A magnetic disk device includes a magnetic disk including a track having a plurality of sectors, a motor configured to rotate the magnetic disk, a magnetic head, and a controller. The controller is configured to perform a first read operation of reading target sectors among the sectors of the track, with the magnetic head during a first revolution of the magnetic disk, detect an off-track state of the magnetic head during the first revolution of the magnetic disk, perform a first error correction with respect to data read from the target sectors during the first read operation, and perform a second read operation of selectively reading a part of the target sectors for which the off-track state has been detected or the first error correction is unsuccessful, with the magnetic head during a second revolution of the magnetic disk.

Classes IPC  ?

  • G11B 21/10 - Recherche de la piste ou alignement par déplacement de la tête
  • G11B 5/012 - Enregistrement, reproduction ou effacement sur des disques magnétiques

22.

MAGNETIC DISK DEVICE

      
Numéro d'application 17941702
Statut En instance
Date de dépôt 2022-09-09
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Yoshida, Susumu

Abrégé

According to one embodiment, a magnetic disk device includes a magnetic disk, a magnetic head, an actuator, a first stopper, an acceleration sensor, and a controller. The magnetic head is configured to record and reproduce data on and from the magnetic disk. The actuator is configured to rotate about a rotation axis to move the magnetic head. The first stopper is configured to block the actuator in rotation to restrict the actuator from rotating about the rotation axis in a first direction. The acceleration sensor is configured to output an electric signal corresponding to applied acceleration. The controller is configured to, at a time when the actuator abuts against the first stopper, apply a first drive signal to the actuator to measure a first electric signal output from the acceleration sensor, the first drive signal being for driving the actuator in the first direction.

Classes IPC  ?

  • G11B 19/04 - Dispositions prévenant, évitant ou signalant la surimpression sur le même support, ou d'autres fonctionnements défectueux de l'enregistrement ou de la reproduction
  • G11B 5/55 - Changement, sélection ou acquisition de la piste par déplacement de la tête
  • G11B 19/14 - Commande de fonctionnement, p.ex. commutation "enregistrement–reproduction" par détection du déplacement ou de la position de la tête, p.ex. moyens se déplaçant en correspondance avec les mouvements de la tête

23.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17941725
Statut En instance
Date de dépôt 2022-09-09
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s)
  • Kono, Hiroshi
  • Tanaka, Katsuhisa

Abrégé

A semiconductor device of an embodiment includes a trench in a silicon carbide layer and extending in a first direction, a gate electrode in the trench, first, second, third and fourth silicon carbide regions disposed in the silicon carbide layer in the first direction in this order, first and third silicon carbide regions having first conductive type, second and fourth silicon carbide regions having second conductive type, fifth, sixth, seventh and eighth silicon carbide regions disposed in the silicon carbide layer in the first direction in this order above the first to fourth silicon carbide regions, fifth and seventh silicon carbide regions having first conductive type higher than first and third silicon carbide regions, sixth and eighth silicon carbide regions having second conductive type higher than second and fourth silicon carbide regions, a ninth silicon carbide region of a first conductive type above the fifth to eighth silicon carbide regions.

Classes IPC  ?

  • H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
  • H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
  • H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée

24.

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR CIRCUIT

      
Numéro d'application 17941756
Statut En instance
Date de dépôt 2022-09-09
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s)
  • Matsudai, Tomoko
  • Iwakaji, Yoko
  • Gejo, Ryohei

Abrégé

A semiconductor device according to the embodiment includes: a transistor region including a first trench, a first gate electrode provided in the first trench, a second trench, a second gate electrode provided in the second trench, a third trench, and a third gate electrode provided in the third trench; a diode region including a fifth trench and a conductive layer provided in the fifth trench; a boundary region including a fourth trench and a fourth gate electrode provided in the fourth trench, the boundary region being provided between the transistor region and the diode region; a first electrode pad electrically connected to the first gate electrode; a second electrode pad electrically connected to the second gate electrode; and a third electrode pad electrically connected to the third gate electrode and the fourth gate electrode.

Classes IPC  ?

  • H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
  • H01L 29/861 - Diodes
  • H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ
  • H03K 17/567 - Circuits caractérisés par l'utilisation d'au moins deux types de dispositifs à semi-conducteurs, p.ex. BIMOS, dispositifs composites tels que IGBT

25.

DISK DEVICE

      
Numéro d'application 17900473
Statut En instance
Date de dépôt 2022-08-31
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Iwashiro, Masafumi

Abrégé

A disk device includes a first controller configured to determine a first operation amount of a first actuator based on a difference between a current position and a target position of a head, a second controller configured to determine a second operation amount of a second actuator based on the difference, and a processor. The processor is configured to perform a first filtering to calculate a first filter value based on a vibration detected at multiple points in time and filter coefficients, perform a second filtering to generate a second filter value based on the vibration detected at each of the multiple points in time, and update the filter coefficients based on the second filter values and a difference between the target position and an updated position of the head.

Classes IPC  ?

  • G11B 21/08 - Changement ou sélection de piste
  • G11B 5/012 - Enregistrement, reproduction ou effacement sur des disques magnétiques

26.

SEMICONDUCTOR DEVICE AND MOTOR DRIVE SYSTEM

      
Numéro d'application 17901318
Statut En instance
Date de dépôt 2022-09-01
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s)
  • Kobayashi, Kazuya
  • Odawara, Hiroshi

Abrégé

A semiconductor device includes first to fifth terminals, an amplification circuit including a first input end connectable to the first terminal and the third terminal, a second input end connectable to the second terminal and the fourth terminal, and an output end, and a switching circuit. The switching circuit is configured to switch between a first state in which the first input end is connected to the first terminal and insulated from the third terminal and the second input end is connected to the second terminal and insulated from the fourth terminal, and a second state in which the first input end is connected to the third terminal and insulated from the first terminal and the second input end is connected to the fourth terminal and insulated from the second terminal.

Classes IPC  ?

  • H02P 23/14 - Estimation ou adaptation des paramètres des moteurs, p.ex. constante de temps du rotor, flux, vitesse, courant ou tension

27.

FET SENSOR USING ANTIOXIDANT

      
Numéro d'application 17930415
Statut En instance
Date de dépôt 2022-09-07
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s)
  • Sugizaki, Yoshiaki
  • Miki, Hiroko

Abrégé

According to one embodiment, an FET sensor includes a sensitive film including a carbon allotrope, a liquid film disposed so as to cover the sensitive film, a source electrode and a drain electrode electrically connected to the sensitive film, and a gate electrode configured to apply an electric field to the sensitive film, wherein the liquid film comprises an antioxidant.

Classes IPC  ?

  • G01N 27/414 - Transistors à effet de champ sensibles aux ions ou chimiques, c. à d. ISFETS ou CHEMFETS

28.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

      
Numéro d'application 17901312
Statut En instance
Date de dépôt 2022-09-01
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s)
  • Inoue, Emiko
  • Kishida, Motoya
  • Hayase, Shigeaki
  • Maeda, Kazushi

Abrégé

A semiconductor device includes a semiconductor layer, a conductive film, a first insulating film, and a second insulating film. The semiconductor layer has an element region where a semiconductor element is provided and a termination region surrounding the element region. The conductive film is provided on the element region and the termination region. The first insulating film is provided on the conductive film on the termination region and a portion of the element region adjacent to the termination region. The second insulating film that is lower in resistivity than the first insulating film, and higher in resistivity than the conductive film, is provided on the first insulating film.

Classes IPC  ?

29.

ISOLATOR

      
Numéro d'application 17901997
Statut En instance
Date de dépôt 2022-09-02
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s)
  • Imaizumi, Yusuke
  • Liu, Jia
  • Tamura, Yoshinari

Abrégé

According to one embodiment, an isolator includes a first wiring board and a second wiring board. The first wiring board includes a first insulating layer including first and second principal surfaces; a first coil provided on the first principal surface; and a first pad provided on the first principal surface and electrically connected to the first coil. The second wiring board includes a second insulating layer including third and fourth principal surfaces; a second coil provided on the third principal surface; and a second pad provided on the fourth principal surface and electrically connected to the second coil. The first and second coils are arranged in such a manner as to face each other, and an external size of the second wiring board is smaller than an external size of the first wiring board.

Classes IPC  ?

  • H05K 1/16 - Circuits imprimés comprenant des composants électriques imprimés incorporés, p.ex. une résistance, un condensateur, une inductance imprimés
  • H05K 1/11 - Eléments imprimés pour réaliser des connexions électriques avec ou entre des circuits imprimés
  • H05K 1/14 - Association structurale de plusieurs circuits imprimés

30.

SECONDARY BATTERY

      
Numéro d'application 17932410
Statut En instance
Date de dépôt 2022-09-15
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s) Yamamoto, Kuniaki

Abrégé

According to one embodiment, a secondary battery includes an outer container including long side walls and a lid, an electrode assembly including a group of electrodes and a current collecting tab and accommodated in the outer container, an output terminal, a lead including a junction opposing the lid and connected to the output terminal, a first extension portion extending from the junction along an inner surface of one of the long side walls and a second extending portion extending from the junction along an inner surface of the other long side wall, a first insulator including an inner surface engaged with the outer surface of the first extending portion, and a second insulator including an inner surface engaged with the outer surface of the second extending portion.

Classes IPC  ?

  • H01M 50/572 - Moyens pour empêcher un usage ou une décharge indésirables
  • H01M 50/55 - Bornes caractérisées par la position des terminaux sur les cellules sur le même côté de la cellule
  • H01M 50/536 - Connexions d’électrodes dans un boîtier de batterie caractérisées par le procédé de fixation des conducteurs aux électrodes, p.ex. soudage

31.

SECONDARY BATTERY

      
Numéro d'application 17932422
Statut En instance
Date de dépôt 2022-09-15
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s) Yamamoto, Kuniaki

Abrégé

According to one embodiment, a secondary battery includes an outer container having a lid body, an electrode assembly including a current collecting tab and housed in the outer container, an output terminal provided in the lid body, and a lead provided between the electrode assembly and the lid body to electrically connect the current collecting tab and the output terminal. The output terminal includes a connection part that is exposed to the outside of the lid body and connectable with a connection member, an exposed part exposed to the outside of the lid body, and a through hole formed in the exposed part, and the exposed part is joined to the lead.

Classes IPC  ?

  • H01M 50/166 - Couvercles caractérisés par le procédé d’assemblage des boîtiers avec des couvercles
  • H01M 50/533 - Connexions d’électrodes dans un boîtier de batterie caractérisées par la forme des conducteurs ou des languettes
  • H01M 10/04 - Structure ou fabrication en général
  • H01M 50/566 - Bornes caractérisées par leur procédé de fabrication par soudage, brasage ou brasage tendre
  • H01M 50/103 - Boîtiers, fourreaux ou enveloppes primaires d’une seule cellule ou d’une seule batterie caractérisés par leur forme ou leur structure physique prismatique ou rectangulaire

32.

SECONDARY BATTERY

      
Numéro d'application 17932415
Statut En instance
Date de dépôt 2022-09-15
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s) Yamamoto, Kuniaki

Abrégé

According to one embodiment, a secondary battery includes an outer container including a lid body, an electrode assembly, an output terminal provided in the lid and including a first external thread portion and a lead provided between the electrode assembly and the lid inside the outer container, and the lead includes a plate-shaped junction opposing the lid body and an internal thread portion provided to penetrate the junction, and the first external thread portion of the output terminal is threaded into the internal thread portion through the lid to be electrically connected to the junction.

Classes IPC  ?

  • H01M 50/567 - Bornes caractérisées par leur procédé de fabrication par des moyens de fixation, p.ex. vis, rivets ou boulons
  • H01M 50/55 - Bornes caractérisées par la position des terminaux sur les cellules sur le même côté de la cellule
  • H01M 50/553 - Bornes spécialement adaptées aux cellules prismatiques, de type poche ou rectangulaires
  • H01M 50/536 - Connexions d’électrodes dans un boîtier de batterie caractérisées par le procédé de fixation des conducteurs aux électrodes, p.ex. soudage

33.

COLD STORAGE MATERIAL, COLD STORAGE MATERIAL PARTICLE, GRANULATED PARTICLE, COLD STORAGE DEVICE, REFRIGERATOR, CRYOPUMP, SUPERCONDUCTING MAGNET, NUCLEAR MAGNETIC RESONANCE IMAGING APPARATUS, NUCLEAR MAGNETIC RESONANCE APPARATUS, MAGNETIC FIELD APPLICATION TYPE SINGLE CRYSTAL PULLING APPARATUS, AND HELIUM RE-CONDENSING DEVICE

      
Numéro d'application 18323288
Statut En instance
Date de dépôt 2023-05-24
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA MATERIALS CO., LTD. (Japon)
Inventeur(s)
  • Kawamoto, Takahiro
  • Usui, Daichi
  • Hiramatsu, Ryosuke
  • Kondo, Hiroyasu
  • Taguchi, Seina

Abrégé

A cold storage material of an embodiment includes a rare earth oxysulfide containing at least one rare earth element selected from the group consisting of Y, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and a first group element of 0.001 atom % or more and 10 atom % or less, in which a maximum value of volume specific heat in a temperature range of 2 K or more and 10 K or less is 0.5 J/(cm3·K) or more.

Classes IPC  ?

  • C09K 5/14 - Substances solides, p.ex. pulvérulentes ou granuleuses
  • C01F 17/294 - Oxysulfures
  • G01R 33/38 - Systèmes pour produire, homogénéiser ou stabiliser le champ magnétique directeur ou le champ magnétique à gradient
  • F25B 9/14 - Machines, installations ou systèmes à compression dans lesquels le fluide frigorigène est l'air ou un autre gaz à point d'ébullition peu élevé caractérisés par le cycle utilisé, p.ex. cycle de Stirling
  • H01F 6/04 - Refroidissement
  • F17C 6/00 - Procédés ou appareils pour remplir des récipients non sous pression de gaz liquéfiés ou solidifiés

34.

MAGNETIC DISK APPARATUS AND METHOD

      
Numéro d'application 17903905
Statut En instance
Date de dépôt 2022-09-06
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Sogabe, Keigo

Abrégé

According to a magnetic disk apparatus of one embodiment, threshold voltages of memory cell transistors of a flash memory are set to a first section for a first value or to a second section for a second value. The second section is on a lower voltage side than the first section. The controller performs bit inversion of second data held in a volatile memory and writes the second data onto the flash memory when a power loss occurs while the second data corresponds to third data in which a number of the first values is larger than that of the second values. The controller writes the second data onto the flash memory without bit inversion when a power loss occurs while the second data corresponds to fourth data. The fourth data is data in which a number of the first values is smaller than that of the second values.

Classes IPC  ?

  • G06F 3/06 - Entrée numérique à partir de, ou sortie numérique vers des supports d'enregistrement
  • G06F 12/02 - Adressage ou affectation; Réadressage
  • G11C 11/56 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliers; Eléments d'emmagasinage correspondants utilisant des éléments d'emmagasinage comportant plus de deux états stables représentés par des échelons, p.ex. de tension, de courant, de phase, de fréquence
  • G11C 11/401 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliers; Eléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des dispositifs à semi-conducteurs utilisant des transistors formant des cellules nécessitant un rafraîchissement ou une régénération de la charge, c. à d. cellules dynamiques
  • G11C 16/06 - Circuits auxiliaires, p.ex. pour l'écriture dans la mémoire

35.

IMAGE FORMING APPARATUS AND CONTROL METHOD

      
Numéro d'application 17704768
Statut En instance
Date de dépôt 2022-03-25
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s)
  • Sekine, Masato
  • Watanabe, Hiroshi
  • Sakuma, Sho
  • Kudo, Hironori
  • Nishimori, Yumi

Abrégé

An image forming apparatus includes a display, a detector, and a controller. The display communicates a setting screen for setting a function of the image forming apparatus. The detector detects an operation of a user that the user executes on the setting screen. The controller is configured to communicate guidance regarding the setting screen based on the operation detected by the detector. For example, such guidance may be communicated when the number of operation times of the operation executed by the user on the setting screen exceeds a first threshold and the number of execution times of the function executed by the user previously is less than a second threshold.

Classes IPC  ?

  • G06F 9/451 - Dispositions d’exécution pour interfaces utilisateur
  • H04N 1/00 - Balayage, transmission ou reproduction de documents ou similaires, p.ex. transmission de fac-similés; Leurs détails

36.

PRINTER

      
Numéro d'application 17703878
Statut En instance
Date de dépôt 2022-03-24
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s) Murata, Tomomasa

Abrégé

A printer including thermal head, a platen including a shaft, a pair of bushing, a bracket, a pair of frames, and a pair of supports. The bushings are positioned proximate opposing ends of the shaft. The bracket is configured to support the thermal head. The bracket defines a groove at opposing ends thereof. The frames are positioned proximate the opposing ends of the bracket. Each of the frames defines an aperture that cooperates with the groove to define a passage through which a portion of the shaft extends. Each of the supports is positioned to engage with the aperture of a respective one of the frames. The supports are rotatable within the apertures about an axis of rotation. The supports are positioned to support the opposing ends of the shaft such that the shaft is eccentric from the axis of rotation.

Classes IPC  ?

37.

OPTICAL SCANNING DEVICE

      
Numéro d'application 17704138
Statut En instance
Date de dépôt 2022-03-25
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s) Kuribayashi, Yasushi

Abrégé

An optical scanning device deflects light for scanning in a main scanning direction and includes a plurality of light sources, a plurality of photodetectors, a plurality of optical element groups, and a polygon mirror. The plurality of light sources emit laser lights. The plurality of photodetectors detect beams formed by the laser lights. The plurality of optical element groups guide the beams to the photodetectors. The polygon mirror deflects the beams for scanning in one direction of the main scanning direction from one end to the other end on the opposite side of the one end. The plurality of optical element groups cross a crossing axis parallel to the main scanning direction, cross a rotation axis of the polygon mirror, and are rotationally symmetrical with respect to an axis of symmetry parallel to the rotation axis of the polygon mirror.

Classes IPC  ?

  • G03G 15/043 - Appareils pour procédés électrographiques utilisant un dessin de charge pour exposer, c.à d. pour projeter optiquement l'image originale sur un matériau d'enregistrement photoconducteur avec des moyens de commande de l'éclairage ou de l'exposition
  • G02B 26/12 - Systèmes de balayage utilisant des miroirs à facettes multiples
  • G02B 26/08 - Dispositifs ou dispositions optiques pour la commande de la lumière utilisant des éléments optiques mobiles ou déformables pour commander la direction de la lumière

38.

MERCHANDISE REGISTRATION DEVICE, METHOD FOR MERCHANDISE REGISTRATION DEVICE, AND MERCHANDISE REGISTRATION SYSTEM

      
Numéro d'application 18175383
Statut En instance
Date de dépôt 2023-02-27
Date de la première publication 2023-09-28
Propriétaire Toshiba Tec Kabushiki Kaisha (Japon)
Inventeur(s)
  • Hiramatsu, Kenya
  • Gotanda, Tsuyoshi

Abrégé

According to one embodiment, a merchandise registration device includes a processor. The processor is configured to register merchandise to be purchased by a customer in a sales transaction and receive a designation of services to be applied to the registered merchandise after settlement of the sales transaction. The processor stores the designation of services in association with the registered merchandise and outputs a list of the registered merchandise associated with the designated services to be applied after settlement of the sale transaction. In some examples, the list may be output as a printed receipt, a service request receipt, or the like to be presented at a service counter or the like to permit more efficient service request handling.

Classes IPC  ?

  • G06Q 30/016 - Fourniture d’une assistance aux clients, p. ex pour assister un client dans un lieu commercial ou par un service d’assistance après-vente
  • G06Q 20/20 - Systèmes de réseaux présents sur les points de vente

39.

LIQUID EJECTION HEAD

      
Numéro d'application 18160910
Statut En instance
Date de dépôt 2023-01-27
Date de la première publication 2023-09-28
Propriétaire Toshiba Tec Kabushiki Kaisha (Japon)
Inventeur(s) Kiji, Yasuhito

Abrégé

According to one embodiment, a liquid ejection head includes a nozzle plate, pressure chambers, actuators, and a drive circuit. The nozzle plate includes nozzles for ejecting liquid. The pressure chamber communicates with the nozzles. The actuator varies the volume of the pressure chamber according to a drive signal. The drive circuit generates the drive signal for driving the actuator. The ejection waveform in the drive signal includes an expansion potential difference changes that changes in stages and a contraction potential difference change that changes in stages. The drive circuit set the timing of the stages to cancel the vibration of an acoustic resonance frequency in a frequency range higher than a main acoustic resonance frequency of the liquid in the pressure chamber.

Classes IPC  ?

  • B41J 2/045 - Machines à écrire ou mécanismes d'impression sélective caractérisés par le procédé d'impression ou de marquage pour lequel ils sont conçus caractérisés par la mise en contact sélective d'un liquide ou de particules avec un matériau d'impression à jet d'encre caractérisés par le procédé de formation du jet en produisant à la demande des gouttelettes ou des particules séparées les unes des autres par pression, p.ex. à l'aide de transducteurs électromécaniques

40.

PRINTER FOR PRINTING ON A LONG SHEET AND METHOD THEREFOR

      
Numéro d'application 18316816
Statut En instance
Date de dépôt 2023-05-12
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s) Tsujimura, Hisashi

Abrégé

A printer for printing on a long sheet includes a print data divider and a verification processor. The print data divider outputs a plurality of segments of divided print data divided at the boundary of areas from standard print data containing print contents in each of the areas obtained by dividing a standard sheet into a plurality of the areas. The verification processor compares the size of the long sheet with the size of the area included in the standard sheet and rotates the divided print data if it is determined from a result of the comparison that the rotation is necessary.

Classes IPC  ?

  • G06F 3/12 - Sortie numérique vers une unité d'impression
  • H04N 1/00 - Balayage, transmission ou reproduction de documents ou similaires, p.ex. transmission de fac-similés; Leurs détails

41.

INFORMATION PROCESSING APPARATUS AND RECORDING MEDIUM

      
Numéro d'application 17705067
Statut En instance
Date de dépôt 2022-03-25
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s) Iwasaki, Fumiharu

Abrégé

An information processing apparatus includes an acquirer, an evaluator, a generator, and an adjustment instruction transmitter. The acquirer acquires an image of a print pattern printed by a printer. The evaluator evaluates a print quality of the printer based on the image of the print pattern acquired by the acquirer. The generator generates a command for adjusting the print quality of the printer based on an evaluation result of the evaluator. The adjustment instruction transmitter transmits the command generated by the generator to the printer.

Classes IPC  ?

  • G06F 3/12 - Sortie numérique vers une unité d'impression
  • G06T 7/00 - Analyse d'image
  • B41J 29/393 - Dispositifs de commande ou d'analyse de l'ensemble de la machine

42.

MERCHANDISE DATA REGISTRATION DEVICE AND METHOD

      
Numéro d'application 18325962
Statut En instance
Date de dépôt 2023-05-30
Date de la première publication 2023-09-28
Propriétaire Toshiba Tec Kabushiki Kaisha (Japon)
Inventeur(s)
  • Naito, Hidehiro
  • Miyashima, Atsushi
  • Kaneko, Toshihiro
  • Tanihira, Taiki
  • Yajima, Shinsuke
  • Kawaguchi, Yuki
  • Ito, Masaki
  • Saitou, Takahiro

Abrégé

A self-service point-of-sale (POS) terminal for a customer to register a commodity to be purchased in a store, includes an input device, a reading device configured to read a symbol on a commodity, a network interface configured to receive, from an external device operated by a store clerk or the like, instruction information that instructs output of caution information, and a processor. The processor is configured to acquire commodity information about a commodity based on the symbol read by the reading device and register the commodity using the commodity information. Upon receipt of an input of completion of registration via the input device, the processor determines whether to proceed to payment processing for the registered commodity based on whether the instruction information has been received from the external device.

Classes IPC  ?

  • G06Q 20/20 - Systèmes de réseaux présents sur les points de vente
  • G06Q 20/18 - Architectures de paiement impliquant des terminaux en libre-service, des distributeurs automatiques, des bornes ou des terminaux multimédia

43.

REGISTRATION DEVICE AND METHOD

      
Numéro d'application 17949160
Statut En instance
Date de dépôt 2022-09-20
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s) Sugiura, Nobuaki

Abrégé

A commodity registration device in a POS system including a self-service payment device for payment processing, includes a scanner configured to read commodity information from a code attached to a commodity, a tag reader configured to read tag information from a wireless tag attached to a container for storing commodities, a communication interface configured to communicate with the payment device or a server that can communicate with the payment device, and a processor configured to control the reader to read tag information from a wireless tag attached to a container, upon receipt of commodity information by the scanner, store the commodity information in association with the tag information, and control the communication interface to transmit, to the payment device or the server, the commodity information and the tag information so that the payment device can associate the second commodity information with the first or second tag information.

Classes IPC  ?

  • G06Q 20/20 - Systèmes de réseaux présents sur les points de vente
  • G06Q 20/18 - Architectures de paiement impliquant des terminaux en libre-service, des distributeurs automatiques, des bornes ou des terminaux multimédia
  • G06K 7/10 - Méthodes ou dispositions pour la lecture de supports d'enregistrement par radiation corpusculaire

44.

IMAGE FORMING APPARATUS AND MAIL TRANSMISSION AND RECEPTION CONTROL METHOD FOR AN IMAGE FORMING APPARATUS

      
Numéro d'application 18074170
Statut En instance
Date de dépôt 2022-12-02
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s) Sasaki, Takahiro

Abrégé

According to an embodiment, an image forming apparatus forms an image on paper on the basis of image data. A processor of the image forming apparatus performs authentication and authorization with an authorization server to acquire a token and then stores the token in a storage device. When transmitting and receiving an e-mail, the processor of the image forming apparatus transmits and receives an e-mail to and from a mail server by using the token read from the storage device.

Classes IPC  ?

  • H04N 1/44 - Systèmes à secret
  • H04N 1/00 - Balayage, transmission ou reproduction de documents ou similaires, p.ex. transmission de fac-similés; Leurs détails
  • H04L 9/40 - Protocoles réseaux de sécurité

45.

Point-of-Sale (POS) Device Configuration System

      
Numéro d'application 17705933
Statut En instance
Date de dépôt 2022-03-28
Date de la première publication 2023-09-28
Propriétaire Toshiba Global Commerce Solutions Holdings Corporation (Japon)
Inventeur(s)
  • Rodriguez, Adrian
  • Darden, Zachary Mccain
  • Blanck, Lucas
  • Waite, Jonathan

Abrégé

A system allows users to dynamically manipulate an orchestration flow to eliminate deprecated functionality and/or to include new or modified functionality. The system provides multiple layers configured to combine the functionality provided by a graphical user interface (GUI) with fixed software code associated with the orchestration flow. With the system, users can quickly and easily configure and/or re-configure various Point-Of-Sale (POS) devices to execute the functions of the modified orchestration flow.

Classes IPC  ?

  • G06Q 20/20 - Systèmes de réseaux présents sur les points de vente

46.

SPEECH SYNTHESIS DEVICE, SPEECH SYNTHESIS METHOD, AND PROGRAM

      
Numéro d'application JP2023010951
Numéro de publication 2023/182291
Statut Délivré - en vigueur
Date de dépôt 2023-03-20
Date de publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA DIGITAL SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Hiruta, Yoshiki
  • Tamura, Masatsune

Abrégé

The present invention improves response time for waveform generation and makes it possible to perform detailed processing of a rhythm feature quantity based on overall input before the waveform generation. According to the embodiments, a speech synthesis device comprises an analysis unit, a first processing unit, and a second processing unit. The analysis unit analyzes input text and generates a language feature quantity series that includes at least one vector that represents a language feature quantity. The first processing unit comprises: an encoder that uses a first neural network to convert the language feature quantity series to an intermediate expression series that includes at least one vector that represents a latent variable; and a rhythm feature quantity decoder that uses a second neural network to generate a rhythm feature quantity from the intermediate expression series. The second processing unit comprises a voice waveform decoder that uses a third neural network to sequentially generate a voice waveform from the intermediate expression series and the rhythm feature quantity.

Classes IPC  ?

  • G10L 13/10 - Règles de prosodie dérivées du texte; Intonation ou accent tonique
  • G10L 13/08 - Analyse de texte ou génération de paramètres pour la synthèse de la parole à partir de texte, p.ex. conversion graphème-phonème, génération de prosodie ou détermination de l'intonation ou de l'accent tonique
  • G10L 25/30 - Techniques d'analyses de la parole ou de la voix qui ne se limitent pas à un seul des groupes caractérisées par la technique d’analyse utilisant des réseaux neuronaux

47.

LIQUID EJECTION HEAD

      
Numéro d'application 18075369
Statut En instance
Date de dépôt 2022-12-05
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s) Shimosato, Masashi

Abrégé

A liquid ejection head for ejecting a liquid, includes a base plate extending along a first direction, an actuator unit on the plate and including first piezoelectric elements and one or more support elements arranged along the first direction, a flow path member on the actuator unit and including: pressure chambers each for storing the liquid and having volumes that can be changed by a corresponding one of the first piezoelectric elements, and one or more first openings at positions corresponding to the support elements, and a nozzle plate on the flow path member and including: nozzles through which the liquid in the corresponding pressure chambers are ejected in response to a change in the volume of the corresponding pressure chambers, and one or more second openings connected respectively to the first openings and through which the support elements corresponding to the first openings are visible.

Classes IPC  ?

48.

COMMUNICATION APPARATUS AND METHOD

      
Numéro d'application 18075769
Statut En instance
Date de dépôt 2022-12-06
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s)
  • Nakamura, Koki
  • Tomiyama, Takashi
  • Ishikawa, Hiroyuki

Abrégé

A communication apparatus includes an antenna, a driving unit, a reading control unit, an acquisition unit, and a setting unit. The driving unit is configured to move a relative position of the antenna relative to one or more wireless tags. The measurement control unit is configured to control measurement of tag data of the one or more wireless tags based on reception of radio waves from the one or more wireless tags by the antenna. The acquisition unit is configured to acquire the number of the one or more wireless tags based on the measurement of the tag data of the one or more wireless tags that is accompanied by the movement of the relative position at a first moving speed. The setting unit is configured to set a second moving speed of the relative position based on the acquired number of the one or more wireless tags. The measurement control unit controls measurement of the tag data of the one or more wireless tags that is accompanied by movement of the relative position at the set second moving speed.

Classes IPC  ?

  • H01Q 3/02 - Dispositifs pour changer ou faire varier l'orientation ou la forme du diagramme de directivité des ondes rayonnées par une antenne ou un système d'antenne utilisant un mouvement mécanique de l'ensemble d'antenne ou du système d'antenne
  • H01Q 1/22 - Supports; Moyens de montage par association structurale avec d'autres équipements ou objets
  • G06K 7/10 - Méthodes ou dispositions pour la lecture de supports d'enregistrement par radiation corpusculaire

49.

PRINTER

      
Numéro d'application 17705050
Statut En instance
Date de dépôt 2022-03-25
Date de la première publication 2023-09-28
Propriétaire Toshiba Tec Kabushiki Kaisha (Japon)
Inventeur(s) Inaba, Hiroyuki

Abrégé

A printer includes a printer head configured to operate in a normal mode for printing print data on a medium with at least one of a designated size or a designated thickness of a character, and a size change mode or a thickness change mode for printing the print data on the medium with a size or thickness of the character being greater than the designated size or the designated thickness, respectively. The printer also includes a sensor configured to detect a printing density of a printing pattern. The printer also includes a processor configured to acquire print data, print the printing pattern, the printing pattern being set in advance, and set an operation mode of the printer head to one of the size change mode or the thickness change mode.

Classes IPC  ?

  • B41J 2/36 - Commande de la densité d'impression
  • G06K 15/02 - Dispositions pour produire une présentation visuelle permanente des données de sortie utilisant des imprimantes

50.

PRINT DEVICE MANAGEMENT APPARATUS AND PRINT DEVICE MANAGEMENT METHOD FOR SYSTEMS WITH DIFFERENT USAGE LOCATIONS

      
Numéro d'application 17700901
Statut En instance
Date de dépôt 2022-03-22
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s) Kudo, Youichi

Abrégé

According to one embodiment, a management apparatus manages a plurality of image forming devices, such as printers or multi-functional peripheral devices in different usage environments. The management apparatus includes a processor to acquire usage history information from each of the image forming devices and generates, based on the acquired usage history information, a bill including a total of usage charges for use of the image forming devices by a user group during a billing period. The management apparatus includes a communication interface to transmit the generated bill to a billing destination.

Classes IPC  ?

  • H04N 1/34 - Circuits ou dispositions pour la commande ou le contrôle entre l'émetteur et le récepteur pour systèmes à pièces de monnaie
  • G06F 3/12 - Sortie numérique vers une unité d'impression

51.

IMAGE FORMING APPARATUS

      
Numéro d'application 18191316
Statut En instance
Date de dépôt 2023-03-28
Date de la première publication 2023-09-28
Propriétaire Toshiba Tec Kabushiki Kaisha (Japon)
Inventeur(s)
  • Izumi, Takao
  • Kurita, Suguru

Abrégé

According to one embodiment, an image forming apparatus, includes a transfer belt onto which toner images are transferred during an image forming operation, and a sensor that emits light towards the transfer belt and detect an amount of light reflected by the transfer belt. A processor adjusts the amount of light emitted towards the transfer belt based on the detected amount of the reflected light, and stores, in a memory, light level information indicating an output level for the amount of light emitted towards the transfer belt by the sensor. The processor provides an instruction for outputting warning information when the light level information indicates the output level exceeds a threshold value.

Classes IPC  ?

  • G03G 15/00 - Appareils pour procédés électrographiques utilisant un dessin de charge

52.

PRINTING SYSTEM

      
Numéro d'application 17972687
Statut En instance
Date de dépôt 2022-10-25
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s) Ishikawa, Daisuke

Abrégé

According to one embodiment, a control unit of a printing system determines a printing region on an object to be printed being conveyed by a conveyance machine, the printing region being provided to be printed any write information therein as printing information, determines whether or not the printing information having a specified character size can be printed in the printing region, and performs adjustment of a printing format of the printing information, the adjustment including at least changing the character size, so that the printing information can be printed in the printing region when determining that the printing information cannot be printed in the printing region. A printing unit prints the printing information having the adjusted printing format in the printing region of the object to be printed according to a timing at which the printing region of the object to be printed being conveyed by the conveyance machine passes through the printing unit.

Classes IPC  ?

  • B41J 3/407 - Machines à écrire ou mécanismes d'impression ou de marquage sélectif caractérisés par le but dans lequel ils sont construits pour le marquage sur des matériaux particuliers
  • B41J 11/00 - Dispositifs ou agencements pour supporter ou manipuler un matériau de copie en feuilles ou en bandes
  • G06F 40/109 - Maniement des polices de caractères; Typographie cinétique ou temporelle
  • G06K 15/02 - Dispositions pour produire une présentation visuelle permanente des données de sortie utilisant des imprimantes

53.

PRINTER

      
Numéro d'application 17983335
Statut En instance
Date de dépôt 2022-11-08
Date de la première publication 2023-09-28
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s) Hada, Takaki

Abrégé

A printer for printing an image on a sheet stored in a rolled shape, includes a sheet holder by which the sheet in the rolled shape is rotatably held and including at least one side plate movable in a width direction of the sheet and contacting a side surface of the sheet, a printing head by which an image is printed on the sheet that has been conveyed from the sheet holder, a buffer unit between the sheet holder and the printing head and including a plate-shaped member that is connected to an elastic member that generates an elastic force by which the conveyed sheet is pressed, and an adjusting unit by which the movable side plate and the buffer unit is connected such that the elastic force varies depending on a location of the side plate.

Classes IPC  ?

  • B65H 16/10 - Dispositions pour entraîner directement la bobine
  • B65H 16/06 - Support de la bobine du type à deux extrémités

54.

DATA PROCESSING DEVICE AND PROGRAM FOR RETAIL STAMP CARD SERVICE

      
Numéro d'application 18172162
Statut En instance
Date de dépôt 2023-02-21
Date de la première publication 2023-09-28
Propriétaire Toshiba Tec Kabushiki Kaisha (Japon)
Inventeur(s)
  • Yamada, Kento
  • Sakaguchi, Takuji

Abrégé

According to one embodiment, a server device for a retail stamp card service includes a communication interface connectable to a network and a storage unit for storing electronic stamp cards for a plurality of purchasers and stamp issuance conditions for a plurality of stores. A processor of the server device is configured to acquire purchaser identification information and receipt data indicating details of a purchase by a purchaser at a store and determine, based on the receipt data, whether a stamp issuance condition has been satisfied. The processor then issues stamp data if the stamp issuance condition has been satisfied and updates stamp card data according to the issued stamp data. The stamp issuance conditions can be set on an individual store basis, a brand basis, or an operating company basis based on operator input to the server device.

Classes IPC  ?

  • G06Q 30/0226 - Systèmes d’incitation à un usage fréquent, p.ex. programmes de miles pour voyageurs fréquents ou systèmes de points
  • G06Q 30/0207 - Remises ou incitations, p.ex. coupons ou rabais

55.

PRINT HEAD AND IMAGE FORMING DEVICE

      
Numéro d'application 17700799
Statut En instance
Date de dépôt 2022-03-22
Date de la première publication 2023-09-28
Propriétaire Toshiba Tec Kabushiki Kaisha (Japon)
Inventeur(s) Takada, Kazumasa

Abrégé

A print head includes a first memory, a second memory, and a plurality of light emitting elements. The first memory stores a first light amount correction data set for causing the plurality of light emitting elements to emit light with a first light amount, and stores a first difference data set showing a difference between a second light amount correction data set for causing the plurality of light emitting elements to emit light with a second light amount and the first light amount correction data set. The second memory stores the first light amount correction data set, or the second light amount correction data set obtained from the first light amount correction data set and the first difference data set. The plurality of light emitting elements emit light based on the first or second light amount correction data set stored in the second memory.

Classes IPC  ?

  • G03G 15/043 - Appareils pour procédés électrographiques utilisant un dessin de charge pour exposer, c.à d. pour projeter optiquement l'image originale sur un matériau d'enregistrement photoconducteur avec des moyens de commande de l'éclairage ou de l'exposition

56.

Odor-Based Produce Identification System

      
Numéro d'application 17700867
Statut En instance
Date de dépôt 2022-03-22
Date de la première publication 2023-09-28
Propriétaire Toshiba Global Commerce Solutions Holdings Corporation (Japon)
Inventeur(s)
  • Brosnan, Susan W.
  • Snead, Jessica
  • Hogan, Patricia
  • Goins, Daniel Robert

Abrégé

A system and method for identifying different types of produce at checkout based on an odor emitted by the produce is provided herein. An olfactometer is used to detect chemical compounds contributing to an odor of the produce at checkout. Based on the detected odor, an odor profile is constructed and compared to one or more baseline odor profiles stored in memory. Based on the comparison results, a freshness date for the produce is determined provided to a device associated with the shopper. So informed, the shopper is aware of how long the produce will be considered fresh. Additionally, one or more reminder messages may be sent to a device associated with the shopper reminding them of the freshness date for the produce they purchased.

Classes IPC  ?

  • G01N 33/02 - Nourriture
  • G01N 33/00 - Recherche ou analyse des matériaux par des méthodes spécifiques non couvertes par les groupes
  • G07G 1/00 - Caisses enregistreuses
  • G07G 1/01 - Caisses enregistreuses - Détails pour l'affichage

57.

Harmonic Gear Device and Actuator

      
Numéro d'application 18135085
Statut En instance
Date de dépôt 2023-04-14
Date de la première publication 2023-09-28
Propriétaire
  • Midea Group Co., Ltd. (Chine)
  • Guangdong Jiya Precision Machinery Technology Co., Ltd. (Chine)
  • GD Midea Air-Conditioning Equipment Co,. Ltd. (Chine)
Inventeur(s)
  • Lin, Wenjie
  • Wang, Gang
  • Minegishi, Kiyoji
  • Isaji, Tsuyoshi
  • Guo, Ziming

Abrégé

The harmonic gear device includes a rigid internal gear, a flexible external gear and a wave generator. The rigid internal gear is an annular component having internal teeth. The flexible external gear is an annular component having external teeth and configured on an inner side of the rigid internal gear. The wave generator is configured on an inner side of the flexible external gear and flexes the flexible external gear. The harmonic gear device is configured to deform the flexible external gear along with the rotation of the wave generator with the rotation shaft as a center, so that some of the external teeth mesh with some of the internal teeth. The flexible external gear thus rotates relative to the rigid internal gear according to the difference in the number of teeth between the flexible external gear and the rigid internal gear.

Classes IPC  ?

  • F16H 49/00 - Autres transmissions
  • F16H 19/08 - Transmissions comportant essentiellement et uniquement des engrenages ou des organes de friction et qui ne peuvent transmettre un mouvement rotatif indéfini pour convertir un mouvement rotatif en mouvement oscillant et vice versa

58.

DIRECTIONAL RADIO FREQUENCY IDENTIFICATION SYSTEM

      
Numéro d'application 17702609
Statut En instance
Date de dépôt 2022-03-23
Date de la première publication 2023-09-28
Propriétaire Toshiba Global Commerce Solutions Holdings Corporation (Japon)
Inventeur(s)
  • Johnson, Brad Matthew
  • Steiner, David J.
  • Wood, Kimberly A.
  • Crockett, Timothy W.

Abrégé

The present disclosure describes a directional radio frequency identification (RFID) system, which provides directional RFID tag scanning using RFID enclosures and moveable radio signal blocking components. The RFID systems herein also prevent unwanted RFID tag activation and focuses RFID readers on specific scan areas. The directional RFID systems may be implemented in any type of system that utilizes RFID tag reading, such as a point of sale systems and other related systems, which utilize RFID scanning.

Classes IPC  ?

  • G06Q 20/32 - Architectures, schémas ou protocoles de paiement caractérisés par l'emploi de dispositifs spécifiques utilisant des dispositifs sans fil
  • G06Q 20/20 - Systèmes de réseaux présents sur les points de vente
  • G06Q 30/04 - Facturation
  • G06K 7/10 - Méthodes ou dispositions pour la lecture de supports d'enregistrement par radiation corpusculaire

59.

SHEET PROCESSING APPARATUS USING RADIO SIGNALS RECEIVED FROM WIRELESS TAGS

      
Numéro d'application 18326997
Statut En instance
Date de dépôt 2023-05-31
Date de la première publication 2023-09-28
Propriétaire Toshiba Tec Kabushiki Kaisha (Japon)
Inventeur(s) Koike, Yuki

Abrégé

A sheet processing apparatus for processing sheets each with a wireless tag, includes a roller, a wireless tag reader/writer, and a controller configured to control the roller to convey a first sheet with a first tag along a path, control the reader/writer to acquire first strengths of radio signals received from the first tag during the conveyance and second strengths of radio signals received from wireless tags of sheets not being conveyed, determine a threshold value of signal strength for distinguishing a wireless tag being conveyed from wireless tags not being conveyed based on the first and second strengths, and control the roller to convey a second sheet with a second tag and control the reader/writer to write to the second tag when a strength of a radio signal from the second tag is greater than or equal to the threshold value.

Classes IPC  ?

  • G06K 19/07 - Supports d'enregistrement avec des marques conductrices, des circuits imprimés ou des éléments de circuit à semi-conducteurs, p.ex. cartes d'identité ou cartes de crédit avec des puces à circuit intégré
  • G06F 3/12 - Sortie numérique vers une unité d'impression
  • B65H 43/00 - Utilisation de dispositifs de commande de vérification ou de sécurité, p.ex. dispositifs automatiques comportant un élément pour détecter une variable
  • B65H 29/48 - Délivrance ou progression des articles à la sortie des machines; Progression des articles vers ou dans les piles par tables disposées pour être basculées afin de faire glisser les articles
  • H04N 1/32 - Circuits ou dispositions pour la commande ou le contrôle entre l'émetteur et le récepteur
  • B65H 7/20 - Commande des appareils associés

60.

FLUORESCENT RARE EARTH COMPLEX AND SECURITY MEDIUM USING THE SAME

      
Numéro d'application 18326054
Statut En instance
Date de dépôt 2023-05-31
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Iwanaga, Hiroki
  • Miyazaki, Kenji

Abrégé

The embodiments provide a fluorescent rare earth complex having strong emission intensity and excellent durability, and also provide a security medium using the complex. The rare earth complex according to the embodiment comprises a rare earth ion, a diphosphine dioxide ligand and a β-diketone ligand wherein two phosphorus atoms contained in the diphosphine dioxide ligand individually have substituents different from each other.

Classes IPC  ?

  • C09K 11/06 - Substances luminescentes, p.ex. électroluminescentes, chimiluminescentes contenant des substances organiques luminescentes
  • F21K 2/00 - Sources lumineuses non électriques utilisant la luminescence; Sources lumineuses utilisant l'électrochimioluminescence
  • C07F 9/53 - Oxydes des organo-phospines; Sulfures des organo-phosphines
  • C07F 5/00 - Composés contenant des éléments des groupes 3 ou 13 de la classification périodique

61.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17889971
Statut En instance
Date de dépôt 2022-08-17
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s)
  • Asaba, Shunsuke
  • Kono, Hiroshi

Abrégé

A semiconductor device includes a first semiconductor layer of a first conductivity type, second to fifth semiconductor layers of a second conductivity type, and first and second electrodes. The first semiconductor layer is provided between the first and second electrodes, and includes a termination region. The second semiconductor layer is provided between the first semiconductor layer and the second electrode, and has a first thickness in a first direction from the first electrode toward the second electrode. The third to fifth semiconductor layers are provided in the termination region. The third semiconductor layer surrounds the second semiconductor layer, and has a second thickness in the first direction. The fourth semiconductor layer surrounds the third semiconductor layer, and has a third thickness in the first direction. The second thickness is greater than the first and third thicknesses. The fifth semiconductor layer is connected to the second to fourth semiconductor layers.

Classes IPC  ?

  • H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
  • H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
  • H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée

62.

CAPACITOR AND ETCHING METHOD

      
Numéro d'application 18315123
Statut En instance
Date de dépôt 2023-05-10
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s)
  • Higuchi, Kazuhito
  • Shimokawa, Kazuo
  • Obata, Susumu
  • Sano, Mitsuo

Abrégé

According to an embodiment, a capacitor includes a conductive substrate, a conductive layer, a dielectric layer therebetween, and first and second internal electrodes. The substrate has first and second main surfaces. One partial region of the first main surface is provided with first recesses. A region of the second surface corresponding to a combination of the one partial region and another partial region is provided with second recesses. The conductive layer covers the main surfaces and side walls and bottom surfaces of the recesses. The first internal electrode is provided on the one partial region and electrically connected to the conductive layer. The second internal electrode is provided on the another partial region and electrically connected to the substrate.

Classes IPC  ?

  • H01G 4/228 - Bornes
  • H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
  • H01G 4/30 - Condensateurs à empilement
  • H01G 4/012 - Forme des électrodes non autoporteuses
  • H01G 4/33 - Condensateurs à film mince ou à film épais
  • H01G 4/38 - Condensateurs multiples, c. à d. combinaisons structurales de condensateurs fixes

63.

LASER WELDING METHOD

      
Numéro d'application 18168471
Statut En instance
Date de dépôt 2023-02-13
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s)
  • Masuda, Lisa
  • Togawa, Ryuichi
  • Obara, Takashi

Abrégé

A laser welding method according to an embodiment includes a preparation process and a welding process. The preparation process includes preparing a temporarily-welded member that includes multiple connection portions by temporarily welding a second member to a first member. The welding process includes welding the second member to the first member by irradiating a laser beam on the temporarily-welded member. In the welding process, a first process is performed, after which a second process is performed. The first process includes irradiating a laser beam from a prescribed position to a second connection portion, wherein the second connection portion is adjacent to a first connection portion, and the prescribed position is between the first connection portion and the second connection portion. The second process includes irradiating a laser beam from the first connection portion to the prescribed position.

Classes IPC  ?

  • B23K 26/244 - Soudage de joints du type à recouvrement

64.

OPTICAL INSPECTION METHOD, NON-TRANSITORY STORAGE MEDIUM STORING OPTICAL INSPECTION PROGRAM, PROCESSING DEVICE, AND OPTICAL INSPECTION APPARATUS

      
Numéro d'application 17823957
Statut En instance
Date de dépôt 2022-09-01
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s)
  • Ohno, Hiroshi
  • Kano, Hiroya
  • Okano, Hideaki
  • Kamikawa, Takahiro

Abrégé

According to the embodiment, an optical inspection method includes: acquiring an image by capturing the image, using light from a surface of an object, which passes through a wavelength selection portion configured to selectively pass light components of a plurality of predetermined wavelengths different from each other, the image sensor including color channels configured to discriminately receive the light components of the plurality of predetermined wavelengths, performing color count estimation processing configured to estimate the number of colors based on the intensity ratio of the color channels that have received the light in each pixel of the image, and performing scattered light distribution identification processing configured to identify a scattered light distribution as BRDF from the surface of the object based on the number of colors or surface state identification processing configured to identify a state of the surface of the object based on the number of colors.

Classes IPC  ?

  • G01N 21/47 - Dispersion, c. à d. réflexion diffuse
  • G01N 21/27 - Couleur; Propriétés spectrales, c. à d. comparaison de l'effet du matériau sur la lumière pour plusieurs longueurs d'ondes ou plusieurs bandes de longueurs d'ondes différentes en utilisant la détection photo-électrique
  • G01N 21/25 - Couleur; Propriétés spectrales, c. à d. comparaison de l'effet du matériau sur la lumière pour plusieurs longueurs d'ondes ou plusieurs bandes de longueurs d'ondes différentes

65.

KEY MANAGEMENT DEVICE, QUANTUM CRYPTOGRAPHY COMMUNICATION SYSTEM, AND COMPUTER PROGRAM PRODUCT

      
Numéro d'application 17821281
Statut En instance
Date de dépôt 2022-08-22
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s)
  • Takahashi, Ririka
  • Tanizawa, Yoshimichi

Abrégé

A key management device according to an embodiment includes one or more hardware processors configured to function as a determination unit, a generation unit, and a supply unit. The determination unit determines a type of request data requested by a request message transmitted from an application that performs encrypted data communication. The generation unit generates a response message including at least one of a random number and an encryption key shared by quantum key distribution (QKD) via a communication network according to a type of the request data. The supply unit supplies the response message to the application.

Classes IPC  ?

66.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17903894
Statut En instance
Date de dépôt 2022-09-06
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s) Shiraishi, Tatsuya

Abrégé

A semiconductor device of an embodiment includes a first electrode, a first semiconductor layer of first conductivity type provided on the first electrode; a second semiconductor layer of first conductivity type provided on the first semiconductor layer; a first semiconductor region of second conductivity type provided on the second semiconductor layer; a first insulating film provided in a trench reaching the second semiconductor layer from above the first semiconductor region, a dielectric constant of an upper part of the first insulating film being higher than a dielectric constant of a lower part of the first insulating film; a second electrode provided in the trench, the second electrode facing the first semiconductor region; and a second insulating film provided between the second electrode and the first semiconductor region, the second insulating film being provided on the first insulating film in the trench.

Classes IPC  ?

  • H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
  • H01L 29/40 - Electrodes
  • H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter

67.

REFERENCE VOLTAGE GENERATING CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE

      
Numéro d'application 17903617
Statut En instance
Date de dépôt 2022-09-06
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s) Hirabayashi, Osamu

Abrégé

A reference voltage generating circuit according to an embodiment includes: an original reference voltage generating unit that generates an original reference voltage; and a reference voltage correcting unit that decreases the original reference voltage as the temperature rises and outputs the original reference voltage as a reference voltage to a sense amplifier, and thus it is possible to perform highly reliable operation while the influence of the temperature is reduced.

Classes IPC  ?

68.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17903846
Statut En instance
Date de dépôt 2022-09-06
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Tanaka, Atsushi

Abrégé

According to one embodiment, a semiconductor device includes: a first frame; a first chip on the first frame; a second frame spaced apart from the first frame in a first direction; a second chip on the second frame; and a first joint terminal above the second chip. The first frame includes a first terminal portion extending toward the second frame. The first joint terminal includes a second terminal portion extending toward the first frame. The second terminal portion includes first and second projecting portions each of which projects toward the first frame and which are spaced apart from each other in a second direction. An end portion of the first projecting portion and an end portion of the second projecting portion are each joined on the first terminal portion.

Classes IPC  ?

69.

DISK DEVICE AND CONTROL METHOD

      
Numéro d'application 17903845
Statut En instance
Date de dépôt 2022-09-06
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s) Iida, Ikuko

Abrégé

According to one embodiment, a disk device includes a magnetic disk and a control circuit. The magnetic disk includes a shingled magnetic recording (SMR) region where data is recorded such that adjacent tracks are partially overlapped with each other by SMR. The control circuit writes, at a predetermined timing, dummy data to a location on the magnetic disk. The location is located after a position indicated by a write pointer. The control circuit executes scan processing after the writing of the dummy data.

Classes IPC  ?

  • G11B 5/02 - Procédés d'enregistrement, de reproduction ou d'effacement; Circuits correspondants pour la lecture, l'écriture ou l'effacement
  • G11B 27/34 - Aménagements indicateurs

70.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17870045
Statut En instance
Date de dépôt 2022-07-21
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s) Fujino, Yuhki

Abrégé

According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions a plurality of conductive parts, and a gate electrode. The first semiconductor region is located on the first electrode and electrically connected with the first electrode. The conductive parts are located in the first semiconductor region with insulating parts interposed. The second semiconductor region is located on a portion of the first semiconductor region. The third semiconductor region is located on a portion of the second semiconductor region. The gate electrode is located on the second semiconductor region with a gate insulating layer interposed. The second electrode is located on the second and third semiconductor regions, and the gate electrode and electrically connected with the second and third semiconductor regions, and conductive parts.

Classes IPC  ?

  • H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
  • H01L 29/66 - Types de dispositifs semi-conducteurs
  • H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
  • H01L 29/40 - Electrodes

71.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17901890
Statut En instance
Date de dépôt 2022-09-02
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s) Matsushita, Kenichi

Abrégé

A semiconductor device includes a first electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a second electrode, a conductive part, and a fourth semiconductor region. The first semiconductor region is located above the first electrode. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on the second semiconductor region. The second electrode is located on the second and third semiconductor regions. The second electrode is electrically connected with the second and third semiconductor regions. The conductive part includes a first conductive region and a second conductive region. The first conductive region faces the first to third semiconductor regions via an insulating film. The second conductive region is located around the second electrode. The fourth semiconductor region is located around the second semiconductor region. The fourth semiconductor region is electrically connected with the second semiconductor region.

Classes IPC  ?

  • H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
  • H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
  • H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
  • H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ

72.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17942562
Statut En instance
Date de dépôt 2022-09-12
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Sugiyama, Toru

Abrégé

A semiconductor device includes a substrate, a first transistor of a depletion type, a second transistor of an enhancement type, and a gate control circuit. The first and second transistors are provided on the substrate and each include a channel region of a first conductivity type. The first and second transistors are connected in series. The channel region of the first transistor includes a nitride semiconductor. The second transistor operates via an inversion layer of a second conductivity type induced in the channel region thereof. The gate control circuit is connected to a gate electrode of the second transistor. The substrate includes a gate terminal and a power supply terminal. The gate terminal is electrically connected to a gate electrode of the first transistor. The power supply terminal is electrically connected to a connection part between the first transistor and the second transistor.

Classes IPC  ?

  • H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
  • H01L 21/56 - Capsulations, p.ex. couches de capsulation, revêtements
  • H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition
  • H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

73.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17901632
Statut En instance
Date de dépôt 2022-09-01
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Yoshikawa, Daiki

Abrégé

A semiconductor device includes first to third electrodes, first to fifth semiconductor regions, and a first contact region. The third semiconductor region is located on the second semiconductor region. The fourth semiconductor region is located on a portion of the third semiconductor region. The third electrode extends in a second direction and faces the third semiconductor region via a first insulating film in a third direction. The first contact region is located on a portion of the third semiconductor region and is arranged with the third electrode in the third direction. The fifth semiconductor region includes a first portion and a second portion. The first portion is arranged in the third direction with a boundary portion between the first insulating film and the third semiconductor region between the second semiconductor region and the fourth semiconductor region. The second portion is arranged in the second direction with the boundary portion.

Classes IPC  ?

  • H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ
  • H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
  • H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter

74.

MAGNETIC DISK APPARATUS AND METHOD

      
Numéro d'application 17931679
Statut En instance
Date de dépôt 2022-09-13
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Tsukahara, Wataru

Abrégé

According to embodiments, a magnetic disk apparatus includes a magnetic disk, a magnetic head, a temperature sensor, and a controller. The magnetic disk has formed therein a servo sector in which servo data including a first post code and a second post code is recorded. In the positioning of the magnetic head, the controller performs a correction using a third post code that is based on the first and second post codes and a first temperature detected by the temperature sensor.

Classes IPC  ?

75.

INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND PACKAGE HANDLING SYSTEM

      
Numéro d'application 18173728
Statut En instance
Date de dépôt 2023-02-23
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Infrastructure Systems & Solutions Corporation (Japon)
Inventeur(s)
  • Sugiyama, Masaaki
  • Shibata, Masamitsu
  • Nakamata, Hirokazu
  • Matsumura, Atsushi
  • Otsuru, Yoshihide

Abrégé

An information processing device for controlling a package handling system includes a first interface connected to a first logistics equipment, a second interface connected to a second logistics equipment, and a processor. The processor acquires flow rate data output by sensors of the first logistics equipment via the first interface, changes a format of the acquired flow rate data to a common format, acquires equipment information regarding the second logistics equipment via the second interface, changes a format of the equipment information to the common format, and generates a display screen showing flow rates at different points of the first logistics equipment, the equipment information, and a congestion state of the system, update the display screen after performing a simulation of the system, and issue a control signal in the first or second format to apply a change in an operating characteristic of the first or second logistics equipment.

Classes IPC  ?

  • G05B 19/418 - Commande totale d'usine, c.à d. commande centralisée de plusieurs machines, p.ex. commande numérique directe ou distribuée (DNC), systèmes d'ateliers flexibles (FMS), systèmes de fabrication intégrés (IMS), productique (CIM)
  • G05B 13/04 - Systèmes de commande adaptatifs, c. à d. systèmes se réglant eux-mêmes automatiquement pour obtenir un rendement optimal suivant un critère prédéterminé électriques impliquant l'usage de modèles ou de simulateurs
  • G05B 19/042 - Commande à programme autre que la commande numérique, c.à d. dans des automatismes à séquence ou dans des automates à logique utilisant des processeurs numériques

76.

ELECTROLYTIC DEVICE AND METHOD OF DRIVING ELECTROLYTIC DEVICE

      
Numéro d'application 17821858
Statut En instance
Date de dépôt 2022-08-24
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s)
  • Yamagiwa, Masakazu
  • Ono, Akihiko
  • Kudo, Yuki
  • Kiyota, Yasuhiro
  • Kofuji, Yusuke
  • Kitagawa, Ryota
  • Mikoshiba, Satoshi

Abrégé

An electrolytic device, includes: an electrolysis cell including: a cathode; an anode; a cathode flow path facing the cathode; and an anode flow path facing the anode; a tank including: a first room; a second room; and an opening connecting the first and second rooms, the first and second rooms store a liquid containing at least one ion, the tank forms a level difference so that the first liquid level of the liquid in the first room is higher to the bottom of the second room than the second liquid level of the liquid in the second room, and thus cause an ion in the liquid to move from the first to the second room through the opening; a first flow path connecting an outlet of the cathode flow path and the first room; and a second flow path connecting the second room and an outlet of the anode flow path.

Classes IPC  ?

  • C25B 9/19 - Cellules comprenant des électrodes fixes de dimensions stables; Assemblages de leurs éléments de structure avec des diaphragmes
  • C25B 1/23 - Oxyde de carbone ou gaz de synthèse
  • C25B 3/26 - Réduction du dioxyde de carbone
  • C25B 1/27 - Ammoniaque
  • C25B 15/08 - Alimentation ou vidange des réactifs ou des électrolytes; Régénération des électrolytes

77.

FRAME SYNCHRONIZATION APPARATUS

      
Numéro d'application 18310695
Statut En instance
Date de dépôt 2023-05-02
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • Toshiba Infrastructure Systems & Solutions Corporation (Japon)
Inventeur(s)
  • Sugawara, Yukihiro
  • Shiratori, Masashi
  • Iwami, Keita

Abrégé

A frame synchronization apparatus according to an embodiment includes a reception unit, a frame memory, a time generation unit, a reception time acquisition unit, a timestamp acquisition unit, and a control unit. The reception unit is configured to receive packet data including video data and a timestamp. The frame memory is configured to store the packet data. The time generation unit is configured to generate a time based on a reference synchronization signal. The reception time acquisition unit is configured to acquire a reception time of packet data satisfying a condition based on the time. The timestamp acquisition unit is configured to acquire a timestamp from the packet data satisfying the condition. The control unit is configured to read packet data from the frame memory in accordance with a variation in a difference between the reception time and a time indicated by the timestamp.

Classes IPC  ?

  • H04J 3/06 - Dispositions de synchronisation

78.

CHARGING SYSTEM

      
Numéro d'application 17891975
Statut En instance
Date de dépôt 2022-08-19
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s)
  • Ogawa, Kenichirou
  • Shijo, Tetsu
  • Lin, Qiang
  • Kanekiyo, Yasuhiro

Abrégé

According to one embodiment, a charging system charges a secondary battery provided in a mobile body. The charging system includes a controller which selects one of a first charge mode which charges the secondary battery by simulating a synchronous generator and a second charge mode which charges the secondary battery without simulating the synchronous generator, and a charger which charges the secondary battery by an operation corresponding to the first charge mode or the second charge mode selected by the controller.

Classes IPC  ?

  • B60L 53/10 - PROPULSION DES VÉHICULES À TRACTION ÉLECTRIQUE; FOURNITURE DE L'ÉNERGIE ÉLECTRIQUE À L'ÉQUIPEMENT AUXILIAIRE DES VÉHICULES À TRACTION ÉLECTRIQUE; SYSTÈMES DE FREINS ÉLECTRODYNAMIQUES POUR VÉHICULES, EN GÉNÉRAL; SUSPENSION OU LÉVITATION MAGNÉTIQUES POUR VÉHICULES; CONTRÔLE DES PARAMÈTRES DE FONCTIONNEMENT DES VÉHICULES À TRACTION ÉLECTRIQUE; DISPOSITIFS ÉLECTRIQUES DE SÉCURITÉ POUR VÉHICULES À TRACTION ÉLECTRIQUE Échange d'éléments d’emmagasinage d'énergie dans les véhicules électriques caractérisés par le transfert d’énergie entre la station de charge et le véhicule
  • B60L 53/50 - Stations de charge caractérisées par des moyens d’emmagasinage ou de production d'énergie
  • B60L 53/62 - Surveillance et commande des stations de charge en réponse à des paramètres de charge, p.ex. courant, tension ou charge électrique
  • B60L 53/20 - PROPULSION DES VÉHICULES À TRACTION ÉLECTRIQUE; FOURNITURE DE L'ÉNERGIE ÉLECTRIQUE À L'ÉQUIPEMENT AUXILIAIRE DES VÉHICULES À TRACTION ÉLECTRIQUE; SYSTÈMES DE FREINS ÉLECTRODYNAMIQUES POUR VÉHICULES, EN GÉNÉRAL; SUSPENSION OU LÉVITATION MAGNÉTIQUES POUR VÉHICULES; CONTRÔLE DES PARAMÈTRES DE FONCTIONNEMENT DES VÉHICULES À TRACTION ÉLECTRIQUE; DISPOSITIFS ÉLECTRIQUES DE SÉCURITÉ POUR VÉHICULES À TRACTION ÉLECTRIQUE Échange d'éléments d’emmagasinage d'énergie dans les véhicules électriques caractérisés par des convertisseurs situés dans le véhicule

79.

TRANSMITTER DEVICE, RECEIVER DEVICE, TRANSMITTING METHOD, AND RECEIVING METHOD

      
Numéro d'application 17939612
Statut En instance
Date de dépôt 2022-09-07
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Kim, Taewon

Abrégé

According to one embodiment, a transmitter device is configured to transmit to a receiver device including input and output terminals first setting data specifying input and output functions of the input and output terminals. The first setting data comprises first data common to the input and output terminals and second data inherent to each of the input and output terminals.

Classes IPC  ?

  • G06F 13/20 - Gestion de demandes d'interconnexion ou de transfert pour l'accès au bus d'entrée/sortie

80.

SENSOR ATTACHMENT/DETACHMENT DEVICE, SENSOR ATTACHMENT/DETACHMENT SYSTEM, SENSOR ATTACHMENT METHOD AND SENSOR DETACHMENT METHOD

      
Numéro d'application 17823873
Statut En instance
Date de dépôt 2022-08-31
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s)
  • Watabe, Kazuo
  • Ueno, Keisuke
  • Takamine, Hidefumi
  • Li, Yongfang
  • Usui, Takashi
  • Hirokawa, Junko
  • Ueda, Yuki
  • Kugimiya, Tetsuya

Abrégé

According to one embodiment, a sensor attachment/detachment device of the embodiment includes a sensor, a bonding member, a support portion, and a release execution portion. The bonding member is bonded to a first surface of the sensor and has a function of decreasing an adhesive force. The support portion can support the sensor by directly contacting a second surface of the sensor or via another functional portion. The release execution portion performs a process of releasing the bonding member from the object by decreasing the adhesive force of the bonding member after the sensor is attached to the object by the bonding member.

Classes IPC  ?

  • B23B 7/06 - Machines automatiques ou semi-automatiques pour tourner des produits bruts à poupée coulissante
  • B23B 7/12 - Machines automatiques ou semi-automatiques pour tourner des produits semi-finis

81.

DISK DEVICE

      
Numéro d'application 17941718
Statut En instance
Date de dépôt 2022-09-09
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s)
  • Toukairin, Kouichi
  • Mizuochi, Kenji
  • Kuribara, Hirofumi
  • Minami, Hiroshi
  • Kato, Yasuhiko
  • Kinugawa, Yuya

Abrégé

According to one embodiment, a disk device includes a magnetic disk and a rotary unit. The magnetic disk is rotatable about a first rotation axis extending in the first direction. The rotary unit includes a rotary member, a bearing, and a first filter. The bearing contains a lubricant and rotatably supports the rotary member about a second rotation axis. The first filter captures at least one component contained in the lubricant. The rotary member is provided with a hole and a first communication port. The hole extends along the second rotation axis to accommodate the bearing. The first communication port extends in a direction intersecting the second rotation axis to allow the hole to be in communication with an outside of the rotary member. The first filter is disposed in the first communication port or covers the first communication port.

Classes IPC  ?

  • G11B 19/20 - Entraînement; Démarrage; Arrêt; Commande correspondante
  • G11B 25/04 - Appareils caractérisés par la forme du support d'enregistrement employé mais non spécifiques du procédé d'enregistrement ou de reproduction utilisant des supports d'enregistrement plats, p.ex. disques, cartes

82.

DRIVER CIRCUIT AND POWER CONVERSION SYSTEM

      
Numéro d'application 17903793
Statut En instance
Date de dépôt 2022-09-06
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Yamanaka, Yuji

Abrégé

A driver circuit includes a drive circuit, a monitoring circuit, and a control circuit. The drive circuit includes a first current source and drives a switching element when the first current source is connected to a control terminal of the switching element. The monitoring circuit monitors a period of time from a start to an end of a change in a voltage drop across the switching element. The control circuit controls a current value of the first current source based on the monitored period of time such that a slew rate of the voltage drop across the switching element approaches a target value.

Classes IPC  ?

  • H02M 1/08 - Circuits spécialement adaptés à la production d'une tension de commande pour les dispositifs à semi-conducteurs incorporés dans des convertisseurs statiques
  • H02M 1/00 - APPAREILS POUR LA TRANSFORMATION DE COURANT ALTERNATIF EN COURANT ALTERNATIF, DE COURANT ALTERNATIF EN COURANT CONTINU OU VICE VERSA OU DE COURANT CONTINU EN COURANT CONTINU ET EMPLOYÉS AVEC LES RÉSEAUX DE DISTRIBUTION D'ÉNERGIE OU DES SYSTÈMES D'ALI; TRANSFORMATION D'UNE PUISSANCE D'ENTRÉE EN COURANT CONTINU OU COURANT ALTERNATIF EN UNE PUISSANCE DE SORTIE DE CHOC; LEUR COMMANDE OU RÉGULATION - Détails d'appareils pour transformation

83.

MAGNETIC DISK DEVICE

      
Numéro d'application 17903785
Statut En instance
Date de dépôt 2022-09-06
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s)
  • Kondo, Yosuke
  • Furuhashi, Kana
  • Takada, Kazuya
  • Dunn, Eric R.

Abrégé

According to an embodiment, each of a plurality of controller chips included in a magnetic disk device includes a buffer control circuit and an arbitration circuit, and controls a corresponding one of a plurality of actuator systems. The first controller chip is connected to a buffer memory via the buffer control circuit included in the first controller chip, and is connected to the second controller chip. The second controller chip is connected to the first controller chip and the third controller chip. The arbitration circuit included in the second controller chip performs arbitration between data transfer between the third controller chip and the first controller chip and data transfer between the first controller chip and an actuator system controlled by the second controller chip among the plurality of actuator systems.

Classes IPC  ?

  • G11B 5/012 - Enregistrement, reproduction ou effacement sur des disques magnétiques

84.

MAGNETIC DISK DEVICE AND CONTROL METHOD OF MAGNETIC DISK DEVICE

      
Numéro d'application 17931707
Statut En instance
Date de dépôt 2022-09-13
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s) Watanabe, Toru

Abrégé

A magnetic disk device of an embodiment includes: a head structure including at least one reproducing head and main magnetic pole gap installation portion behind a flying slider and including at least two thermal actuators; and a control unit that can independently control the thermal actuators and that sets spacing of the reproducing head and the main magnetic pole gap installation portion with respect to a recording medium by setting a rotational speed at the time of contact, which rotational speed is a rotational speed of the recording medium, to be lower than a normal rotational speed when the reproducing head and the main magnetic pole gap installation portion are brought into contact with the recording medium.

Classes IPC  ?

  • G11B 5/127 - Structure ou fabrication des têtes, p.ex. têtes à variation d'induction
  • G11B 5/60 - Maintien dynamique de l'écartement entre têtes et supports d'enregistrement à l'aide d'un fluide

85.

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Numéro d'application 17929419
Statut En instance
Date de dépôt 2022-09-02
Date de la première publication 2023-09-28
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s) Shimizu, Tatsuo

Abrégé

A method for manufacturing a semiconductor device according to an embodiment includes forming a first mask material having a first opening on a surface of a silicon carbide layer, performing first ion implantation of forming a first carbon region by implanting carbon (C) into the silicon carbide layer using the first mask material as a mask, forming, on the surface of the silicon carbide layer, a second mask material in which both end portions in a first direction parallel to the surface have second openings disposed inside both end portions in the first direction of the first carbon region, performing second ion implantation of forming a first impurity region by implanting a first impurity into the silicon carbide layer using the second mask material as a mask, and performing heat treatment at 1600° C. or higher.

Classes IPC  ?

  • H01L 21/266 - Bombardement par des radiations ondulatoires ou corpusculaires par des radiations d'énergie élevée produisant une implantation d'ions en utilisant des masques
  • H01L 21/265 - Bombardement par des radiations ondulatoires ou corpusculaires par des radiations d'énergie élevée produisant une implantation d'ions

86.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17931508
Statut En instance
Date de dépôt 2022-09-12
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s)
  • Fuse, Kaori
  • Kawamura, Keiko
  • Matsudai, Tomoko
  • Iwakaji, Yoko
  • Motai, Takako
  • Itokazu, Hiroko

Abrégé

A semiconductor device includes a semiconductor part, first to fourth electrodes, and first and second insulating film. The first and second electrodes are provided on back and front surfaces of the semiconductor part, respectively. The third and fourth electrodes each extend into the semiconductor device form the front surface side. The third and fourth electrodes are electrically insulated from the semiconductor part by insulating films. The semiconductor part includes first to fourth layers. The first layer of a first conductivity type extends between the first and second electrodes. The second layer of a second conductivity type is provided between the first layer and the second electrode. The third layer of the second conductivity type is partially provided between the second layer and the second electrode. The fourth layer of the first conductivity type is provided in the second layer. The fourth layer is apart from the third layer.

Classes IPC  ?

  • H01L 29/861 - Diodes
  • H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
  • H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ

87.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17939025
Statut En instance
Date de dépôt 2022-09-07
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s)
  • Minamikawa, Kazuki
  • Yoshikawa, Daiki
  • Yasuhara, Norio
  • Nakamura, Kazutoshi

Abrégé

A semiconductor device includes first and second electrodes, a semiconductor part, a structure body, and an insulating part. The semiconductor part includes first to fifth semiconductor regions. The structure body includes a gate part and a dummy part. The gate part includes at least one gate electrode. The dummy part includes at least two dummy electrodes. The gate part and the dummy part are alternately arranged. The insulating part is located between the gate electrode and the semiconductor part. The gate part is located in the fourth semiconductor region. A first potential is applied to the second electrode. A second potential that is greater than the first potential is applied to the gate electrode. A third potential that is greater than the first potential is applied to the dummy electrode located at a position next to the gate part.

Classes IPC  ?

  • H01L 29/40 - Electrodes
  • H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
  • H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ

88.

ELECTRONIC APPROVAL SYSTEM, ELECTRONIC APPROVAL SERVER, AND COMPUTER-READABLE STORAGE MEDIUM

      
Numéro d'application 18174540
Statut En instance
Date de dépôt 2023-02-24
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • Toshiba Infrastructure Systems & Solutions Corporation (Japon)
Inventeur(s) Toshimitsu, Kiyoshi

Abrégé

According to an embodiment, an electronic approval system comprising at least one electronic approval device and an electronic approval server. The electronic approval device includes a biometric authentication unit and a security chip. The biometric authentication unit performs biometric authentication. The security chip generates reliability confirmation information using a private key stored in advance if a result of the biometric authentication is normal, and transmits the reliability confirmation information to the electronic approval server via the information processing device. The electronic approval server includes a processor. The processor stores an electronic approval record indicating that approval has been successfully performed in the electronic approval device based on a public key corresponding to the private key and the reliability confirmation information.

Classes IPC  ?

  • H04L 9/32 - Dispositions pour les communications secrètes ou protégées; Protocoles réseaux de sécurité comprenant des moyens pour vérifier l'identité ou l'autorisation d'un utilisateur du système
  • H04L 9/08 - Répartition de clés

89.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17902610
Statut En instance
Date de dépôt 2022-09-02
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s)
  • Ogawa, Kodai
  • Ishitani, Hiroshi

Abrégé

A semiconductor device according to an embodiment includes: an element region; and an outer peripheral region surrounding the element region, the outer peripheral region including a semiconductor layer having a first face and a second face opposite to the first face, a first annular conductor provided on a side of the first face with respect to the semiconductor layer and surrounding the element region, a second annular conductor provided on the side of the first face with respect to the semiconductor layer and surrounding the first annular conductor, and at least one first connection conductor provided between the first annular conductor and the second annular conductor and connected to the first annular conductor and the second annular conductor.

Classes IPC  ?

  • H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
  • H01L 23/58 - Dispositions électriques structurelles non prévues ailleurs pour dispositifs semi-conducteurs

90.

ANOMALY DETECTION SYSTEM, METHOD AND PROGRAM, AND DISTRIBUTED CO-SIMULATION SYSTEM

      
Numéro d'application 17932638
Statut En instance
Date de dépôt 2022-09-15
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • Toshiba Digital Solutions Corporation (Japon)
Inventeur(s)
  • Araki, Dai
  • Kitahara, Hirotaka
  • Takahashi, Katsumi
  • Nemoto, Masayuki

Abrégé

An anomaly detection system according to an embodiment is an anomaly detection system that executes anomaly detection of each of one or a plurality of simulators by using a controller. The controller causes each simulator to start a process of simulation, to transmit to the controller an existence notification indicative of existence of the simulator, at a predetermined cycle until an end of the process of simulation, and to transmit to the controller an end notification indicative of an end of the process if the process ends; determines that the simulator that is a transmission source of the existence notification is normal; determines that the process of the simulator that is a transmission source of the end notification ends, upon receiving the end notification; and detects that an anomaly occurs in the simulator.

Classes IPC  ?

  • G06F 30/20 - Optimisation, vérification ou simulation de l’objet conçu
  • G06F 11/07 - Réaction à l'apparition d'un défaut, p.ex. tolérance de certains défauts

91.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17882335
Statut En instance
Date de dépôt 2022-08-05
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s)
  • Deguchi, Takafumi
  • Tomita, Kouta

Abrégé

According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions, a first conductive part, a first gate electrode. The first semiconductor region is located on the first electrode and electrically connected with the first electrode. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on a portion of the second semiconductor region. The first conductive part is located in the first semiconductor region with a first insulating part interposed. The first gate electrode is located on the first conductive part with a first inter-layer insulating part interposed. The first gate electrode faces the second semiconductor region via a first gate insulating layer. The second electrode is located on the second and third semiconductor regions and electrically connected with the second and third semiconductor regions, and the first conductive part.

Classes IPC  ?

  • H01L 29/40 - Electrodes
  • H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
  • H01L 29/66 - Types de dispositifs semi-conducteurs

92.

SEMICONDUCTOR DEVICE

      
Numéro d'application 17901732
Statut En instance
Date de dépôt 2022-09-01
Date de la première publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japon)
Inventeur(s)
  • Tanaka, Katsuhisa
  • Kono, Hiroshi

Abrégé

A semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type having first and second regions, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, a fourth semiconductor region of the second conductivity type between the first region and the gate electrode, fifth semiconductor regions of the second conductivity type, each having a first concentration of impurities of the second conductivity type, sixth semiconductor regions of the second conductivity type, each having a second concentration of impurities of the second conductivity type that is lower than the first concentration, and a second electrode. The fifth semiconductor regions are located around the fourth semiconductor region in a first plane perpendicular to the first direction. The sixth semiconductor regions are located around the second semiconductor region in a second plane perpendicular to the first direction.

Classes IPC  ?

  • H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
  • H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
  • H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus

93.

RANDOM NUMBER GENERATION CIRCUIT

      
Numéro d'application 17901960
Statut En instance
Date de dépôt 2022-09-02
Date de la première publication 2023-09-28
Propriétaire
  • Kabushiki Kaisha Toshiba (Japon)
  • Toshiba Electronic Devices & Storage Corporation (Japon)
Inventeur(s)
  • Nakano, Hiroo
  • Ali, Mdbelayet

Abrégé

A random number generation circuit in an embodiment includes a sampling circuit configured to capture an oscillation output of a ring oscillator using a first clock and generate a random number value, a periodicity detection circuit configured to detect periodicity of an output of the sampling circuit, a randomness test circuit configured to perform a randomness test for the output of the sampling circuit, and a control circuit configured to change an oscillation period of the oscillation output based on a detection result of the periodicity detection circuit, divide a random number output based on the random number value into a plurality of divided random numbers to perform random number generation for each of the divided random numbers, and cause the randomness test circuit to execute the randomness test for each generation of the divided random numbers.

Classes IPC  ?

  • G06F 7/58 - Générateurs de nombres aléatoires ou pseudo-aléatoires

94.

AIR CONDITIONING SYSTEM, CONTROL DEVICE AND METHOD THEREFOR, AND COMPUTER STORAGE MEDIUM

      
Numéro d'application CN2022102148
Numéro de publication 2023/178870
Statut Délivré - en vigueur
Date de dépôt 2022-06-29
Date de publication 2023-09-28
Propriétaire GD MIDEA AIR-CONDITIONING EQUIPMENT CO., LTD. (Chine)
Inventeur(s) Luo, Xiongfei

Abrégé

An air conditioning system (100), comprising a compressor (10), a four-way valve (50), an outdoor heat exchanger (20), a throttling device (30), and an indoor heat exchanger (40), all of which are in communication with each other and form a refrigerant circulation loop. The refrigerant circulation loop comprises an exhaust pipe (60) in communication with an exhaust port of the compressor (10). The compressor (10) comprises a pump body (11), which is internally provided with an oil pool (111); a hollow interlayer (12), which is disposed adjacent to the side of the pump body (11) on which the oil pool (111) is located, the hollow interlayer (12) being provided with an air inlet port (121) and an air outlet port (122) that communicate with one another, the air inlet port (121) communicating with the air exhaust pipe (60) by means of a first connecting pipe (70), the air outlet port (122) communicating with the exhaust pipe (60) by means of a second connecting pipe (80), and the first connecting pipe (70) being provided with a switch valve (71) for controlling the closing and opening of the pipe; and a liquid storage tank (13), which is provided on the side of the hollow interlayer (12) away from the pump body.

Classes IPC  ?

95.

COMPRESSOR, AIR CONDITIONING SYSTEM AND CONTROL METHOD THEREFOR, AND COMPUTER STORAGE MEDIUM

      
Numéro d'application CN2022101863
Numéro de publication 2023/178867
Statut Délivré - en vigueur
Date de dépôt 2022-06-28
Date de publication 2023-09-28
Propriétaire GD MIDEA AIR-CONDITIONING EQUIPMENT CO., LTD. (Chine)
Inventeur(s)
  • Luo, Xiongfei
  • Kan, Chao

Abrégé

A compressor (10, 100) and an air conditioner (1000). The compressor (10, 100) comprises a body portion (11, 110) and a reservoir (13, 150), wherein the reservoir (13, 150) is arranged below the body portion (11, 110), an interlayer (12, 160) is arranged between the reservoir (13, 150) and the body portion (11, 110), the interlayer (12, 160) is provided with a vacuum cavity (161) and an air extraction hole (170) in communication with the vacuum cavity (161), and the air extraction hole (170) is suitable for vacuumizing the vacuum cavity (161). The structure can effectively prevent heat from the body portion (11, 110) from being transferred to the reservoir (13, 150), thereby improving the cooling capacity of the compressor (10, 100), and achieving individual vacuumizing of the compressor (10, 100).

Classes IPC  ?

  • F25B 31/00 - Aménagements des compresseurs
  • F25B 43/00 - Dispositions pour la séparation ou la purification des gaz ou des liquides; Dispositions pour la vaporisation des résidus de fluides frigorigènes, p.ex. par la chaleur
  • F25B 49/02 - Disposition ou montage des dispositifs de commande ou de sécurité pour machines, installations ou systèmes du type à compression

96.

SIMULATOR ABNORMALITY DETERMINATION SYSTEM, METHOD, PROGRAM, AND DISTRIBUTED CO-SIMULATION SYSTEM

      
Numéro d'application JP2022013597
Numéro de publication 2023/181198
Statut Délivré - en vigueur
Date de dépôt 2022-03-23
Date de publication 2023-09-28
Propriétaire
  • KABUSHIKI KAISHA TOSHIBA (Japon)
  • TOSHIBA DIGITAL SOLUTIONS CORPORATION (Japon)
Inventeur(s)
  • Araki, Dai
  • Kitahara, Hirotaka
  • Takahashi, Katsumi
  • Nemoto, Masayuki

Abrégé

A simulator abnormality determination system according to an embodiment of the present invention determines an abnormality of each simulator by using a controller that executes processing of synchronizing one or a plurality of simulators with one another. The controller causes each simulator to: start simulation processing to be executed in a specific period; transmit, to the controller in specific cycles, a keep-alive notification indicating that the simulator is alive until the simulator completes the simulation processing; and transmit, to the controller, a completion notification indicating completion of the processing when the processing is complete. The controller determines that a simulator that has transmitted a keep-alive notification is normal when receiving the keep-alive notification in specific cycles, determines that a simulator that has transmitted a completion notification has completed the processing when receiving the completion notification, or determines that a simulator not determined to have completed the processing is abnormal when a keep-alive notification is not transmitted from the simulator in specific cycles.

Classes IPC  ?

  • G06F 11/07 - Réaction à l'apparition d'un défaut, p.ex. tolérance de certains défauts
  • G06F 9/52 - Synchronisation de programmes; Exclusion mutuelle, p.ex. au moyen de sémaphores

97.

Vehicle lighting device and vehicle lamp

      
Numéro d'application 18180144
Numéro de brevet 11767962
Statut Délivré - en vigueur
Date de dépôt 2023-03-08
Date de la première publication 2023-09-26
Date d'octroi 2023-09-26
Propriétaire Toshiba Lighting & Technology Corporation (Japon)
Inventeur(s) Matsuo, Tomohiro

Abrégé

A vehicle lighting device includes a socket; a substrate; and one first and four second light emitting elements. A square luminance distribution region is defined on light irradiation sides of first and second light emitting elements. A center of distribution region overlaps central axis of device. Distribution region is equally divided into four square first regions whose corners overlap center of distribution region. Each of first regions is equally divided into nine square second regions. A length of one side of second region is 0.8 mm. Luminance of distribution region is 90% or more of a total luminance of light emitted from device. In twenty second regions arranged along sides of distribution region, luminance of one second region is 2% or less of total luminance. In sixteen second regions provided inside twenty second regions, luminance of one second region is 3% or more and 10% or less of total luminance.

Classes IPC  ?

  • F21Y 105/16 - Sources lumineuses planes comprenant un réseau bidimensionnel d’éléments générateurs de lumière ponctuelle caractérisées par la forme d’ensemble du réseau bidimensionnel carrée ou rectangulaire, p.ex. pour les panneaux de lumière
  • F21S 41/663 - Dispositifs d’éclairage spécialement adaptés à l’extérieur des véhicules, p.ex. phares caractérisés par une distribution lumineuse variable par action sur des sources lumineuses par commutation de sources lumineuses
  • F21S 41/19 - Fixation des sources lumineuses ou des supports de sources lumineuses
  • F21S 43/19 - Fixation des sources lumineuses ou des supports de sources lumineuses
  • H05B 47/155 - Commande coordonnée de plusieurs sources lumineuses
  • H05B 47/28 - Circuits de protection contre les températures anormales
  • H05B 47/14 - Commande de la source lumineuse en réponse à des paramètres détectés en détectant les paramètres électriques de la source lumineuse

98.

Belt drive device

      
Numéro d'application 17941162
Numéro de brevet 11768451
Statut Délivré - en vigueur
Date de dépôt 2022-09-09
Date de la première publication 2023-09-26
Date d'octroi 2023-09-26
Propriétaire TOSHIBA TEC KABUSHIKI KAISHA (Japon)
Inventeur(s) Nishimura, Yosuke

Abrégé

A belt drive device includes a drive unit, a detection unit, a blade, and a control unit. The drive unit rotates an endless belt. The detection unit detects a position of a connection portion in which both ends of a reinforcing tape, which is provided on an outer surface of an edge of the belt in a width direction orthogonal to a rotation direction of the belt, in a longitudinal direction along the edge of the belt are overlapped and connected. The blade comes into contact with an outer surface of the belt and an outer surface of the reinforcing tape and is provided to extend in the width direction. The control unit controls driving of the drive unit based on a detection result obtained by the detection unit such that when the drive unit rotates the belt by a constant length in a reverse direction from one end of the reinforcing tape overlapped inside toward the other end of the reinforcing tape overlapped outside at the connection portion from a state in which the belt is stopped, the drive unit rotates the belt in a forward direction to a rotation position where the other end of the reinforcing tape does not come into contact with the blade by a reverse rotation and stops the belt before the belt is reversely rotated.

Classes IPC  ?

  • G03G 15/16 - Appareils pour procédés électrographiques utilisant un dessin de charge pour transférer un dessin à un second support d'un dessin de teinte, p.ex. dessin de poudre
  • G03G 15/08 - Appareils pour procédés électrographiques utilisant un dessin de charge pour développer en utilisant un développateur solide, p.ex. développateur en poudre
  • G03G 21/00 - Dispositions non prévues dans les groupes , p.ex. nettoyage, élimination des charges résiduelles
  • B65H 5/02 - Transfert des articles retirés des piles; Alimentation des machines en articles par courroies ou chaînes
  • G03G 15/00 - Appareils pour procédés électrographiques utilisant un dessin de charge

99.

CONDITION MONITORING APPARATUS, METHOD, AND STORAGE MEDIUM

      
Numéro d'application 17942275
Statut En instance
Date de dépôt 2022-09-12
Date de la première publication 2023-09-21
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s)
  • Sudo, Takashi
  • Kanishima, Yasuhiro
  • Yanagihashi, Hiroyuki

Abrégé

According to one embodiment, a condition monitoring apparatus includes a processing circuitry. The processing circuitry is configured to collect a sensor signal output from a sensor that monitors a condition of a mechanical device that is at least partially mobile. The processing circuitry is configured to diagnose a presence or absence of an anomaly in the mechanical device based on the sensor signal. The processing circuitry is configured to cut out the sensor signal in a time width according to any one or more of a speed, an acceleration, and a jerk of the mechanical device. The processing circuitry is configured to determine the presence or absence of an anomaly based on the cut out sensor signal.

Classes IPC  ?

  • G01M 13/00 - Test des pièces de machines
  • G01P 15/00 - Mesure de l'accélération; Mesure de la décélération; Mesure des chocs, c. à d. d'une variation brusque de l'accélération
  • G01P 3/00 - Mesure de la vitesse linéaire ou angulaire; Mesure des différences de vitesses linéaires ou angulaires

100.

VOICE ACTIVITY DETECTION APPARATUS, LEARNING APPARATUS, AND STORAGE MEDIUM

      
Numéro d'application 17820878
Statut En instance
Date de dépôt 2022-08-18
Date de la première publication 2023-09-21
Propriétaire KABUSHIKI KAISHA TOSHIBA (Japon)
Inventeur(s) Kim, Uihyun

Abrégé

According to one embodiment, a voice activity detection apparatus includes a processing circuit. The processing circuit acquires an acoustic signal and a non-acoustic signal, calculates an acoustic feature based on the acoustic signal, calculates a non-acoustic feature based on the non-acoustic signal, calculates a voice emphasized feature based on the acoustic signal and the non-acoustic signal, calculates a voice existence/non-existence feature on the basis of the acoustic feature and the non-acoustic feature, calculates a voice existence score based on the voice emphasized feature and the voice existence/non-existence feature, detects a voice section and/or a non-voice section based on comparison of the voice existence score with a threshold.

Classes IPC  ?

  • G10L 25/78 - Détection de la présence ou de l’absence de signaux de voix
  • G10L 25/30 - Techniques d'analyses de la parole ou de la voix qui ne se limitent pas à un seul des groupes caractérisées par la technique d’analyse utilisant des réseaux neuronaux
  • G10L 15/02 - Extraction de caractéristiques pour la reconnaissance de la parole; Sélection d'unités de reconnaissance 
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