Abrégé

A microcontroller system that includes a central processing unit (CPU), a first system memory, a first peripheral module, and a DMA controller is disclosed. The DMA controller includes a DMA processor, a DMA memory, and a DMA interconnect. The DMA memory stores information associated with the DMA processor. The DMA processor receives a command from the CPU or a signal from a peripheral processor of the first peripheral module that a first data transfer is requested. The DMA processor receives first data from the first system memory or the first peripheral module. The DMA processor, based at least in part on the information stored in the DMA memory, transmits the first data to the first peripheral module or the first system memory, thereby sparing the CPU from managing the transferring of the first data.

Classes IPC  ?

• G06F 1/32 - Moyens destinés à économiser de l'énergie
• G06F 1/3293 - Gestion de l’alimentation, c. à d. passage en mode d’économie d’énergie amorcé par événements Économie d’énergie caractérisée par l'action entreprise par transfert vers un processeur plus économe en énergie, p.ex. vers un sous-processeur

Abrégé

A first VAD system outputs a pulse stream for zero crossings in an audio signal. The pulse density of the pulse stream is evaluated to identify speech. The audio signal may have noise added to it before evaluating zero crossings. A second VAD system rectifies each audio signal sample and processes each rectified sample by updating a first statistic and evaluating the rectified sample per a first threshold condition that is a function of the first statistic. Rectified samples meeting the first threshold condition may be used to update a second statistic and the rectified sample evaluated per a second threshold condition that is a function of the second statistic. Rectified samples meeting the second threshold condition may be used to update a third statistic. The audio signal sample may be selected as speech if the second statistic is less than a downscaled third statistic.

Classes IPC  ?

• G10L 25/84 - Détection de la présence ou de l’absence de signaux de voix pour différencier la parole du bruit
• G10L 15/20 - Techniques de reconnaissance de la parole spécialement adaptées de par leur robustesse contre les perturbations environnantes, p.ex. en milieu bruyant ou reconnaissance de la parole émise dans une situation de stress
• G10L 15/28 - Reconnaissance de la parole - Détails de structure des systèmes de reconnaissance de la parole
• G10L 25/18 - Techniques d'analyses de la parole ou de la voix qui ne se limitent pas à un seul des groupes caractérisées par le type de paramètres extraits les paramètres extraits étant l’information spectrale de chaque sous-bande

Abrégé

A first VAD system outputs a pulse stream for zero crossings in an audio signal. The pulse density of the pulse stream is evaluated to identify speech. The audio signal may have noise added to it before evaluating zero crossings. A second VAD system rectifies each audio signal sample and processes each rectified sample by updating a first statistic and evaluating the rectified sample per a first threshold condition that is a function of the first statistic. Rectified samples meeting the first threshold condition may be used to update a second statistic and the rectified sample evaluated per a second threshold condition that is a function of the second statistic. Rectified samples meeting the second threshold condition may be used to update a third statistic. The audio signal sample may be selected as speech if the second statistic is less than a downscaled third statistic.

Classes IPC  ?

• G10L 17/00 - Identification ou vérification du locuteur
• G10L 25/78 - Détection de la présence ou de l’absence de signaux de voix

Abrégé

A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.

Classes IPC  ?

• G06F 9/44 - Dispositions pour exécuter des programmes spécifiques

Abrégé

An adaptive voltage converter adapted to compensate for the exponential sensitivities of sub-threshold and near-threshold circuits. The converter can change its power/performance characteristics between different energy modes. The converter may comprise two or more voltage converters/regulators. A multiplexing circuit selects between the outputs of the several converters/regulators depending on the state of a control signal generated by a control facility. The converter is specially adapted to change the output of each converter/regulator based on a number of variables, including, for example, process corner, temperature and input voltage.

Classes IPC  ?

• G05F 1/46 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu
• H03K 3/012 - Modifications du générateur pour améliorer le temps de réponse ou pour diminuer la consommation d'énergie