Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G05B 19/042 - Commande à programme autre que la commande numérique, c.à d. dans des automatismes à séquence ou dans des automates à logique utilisant des processeurs numériques
A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
Systems and methods are described for operating a hybrid computing system using cluster contraction for converting large, dense input to reduced input that can be easily mapped into a quantum processor. The reduced input represents the global structure of the problem. Techniques involve partitioning the input variables into clusters and contracting each cluster. The input variables can be partitioned using an Unweighted Pair Group Method with Arithmetic Mean algorithm. The quantum processor returns samples based on the reduced input and the samples are expanded to correspond to the original input.
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06F 17/18 - Opérations mathématiques complexes pour l'évaluation de données statistiques
G06F 18/21 - Conception ou mise en place de systèmes ou de techniques; Extraction de caractéristiques dans l'espace des caractéristiques; Séparation aveugle de sources
G06F 18/23213 - Techniques non hiérarchiques en utilisant les statistiques ou l'optimisation des fonctions, p.ex. modélisation des fonctions de densité de probabilité avec un nombre fixe de partitions, p.ex. K-moyennes
4.
Systems and methods for analog processing of problem graphs having arbitrary size and/or connectivity
Computational systems implement problem solving using hybrid digital/quantum computing approaches. A problem may be represented as a problem graph which is larger and/or has higher connectivity than a working and/or hardware graph of a quantum processor. A quantum processor may be used determine approximate solutions, which solutions are provided as initial states to one or more digital processors which may implement classical post-processing to generate improved solutions. Techniques for solving problems on extended, more-connected, and/or “virtual full yield” variations of the processor's actual working and/or hardware graphs are provided. A method of operation in a computational system comprising a quantum processor includes partitioning a problem graph into sub-problem graphs, and embedding a sub-problem graph onto the working graph of the quantum processor. The quantum processor and a non-quantum processor-based device generate partial samples. A controller causes a processing operation on the partial samples to generate complete samples.
Systems and methods for fabricating a superconducting integrated circuit that includes wiring layers comprising low-noise material are described. A superconducting integrated circuit can be implemented in a computing system that includes a quantum processor. Such a superconducting integrated circuit includes a first set of one or more wiring layers that form a noise-susceptible superconducting device that can decrease processor when exposed to noise. The superconducting integrated circuit can further include a second set of one or more wiring layers that form a superconducting device that is less susceptible to noise. Fabricating a superconducting device that contains low-noise material can include depositing and patterning a wiring layer comprising a first material that is superconductive in a respective range of temperatures and depositing and patterning a different wiring layer comprising a second material that is superconductive in a respective range of temperatures. The second material can be considered a low-noise material.
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
H10N 60/80 - Dispositifs supraconducteurs - Détails de structure
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G05B 19/042 - Commande à programme autre que la commande numérique, c.à d. dans des automatismes à séquence ou dans des automates à logique utilisant des processeurs numériques
A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
A superconducting integrated circuit is fabricated by depositing a ground plane to at least partially overlie a substrate, depositing an insulating layer to at least partially overlie the ground plane, depositing a superconducting layer to at least partially overlie the insulating layer, and forming a superconducting feature in the superconducting layer. An inductance of the superconducting feature is tunable by adjusting a bias current in the ground plane. The ground plane is electrically communicatively coupleable to an electrical ground. Depositing a ground plane includes depositing a first superconducting material to at least partially overlie the substrate and depositing a second superconducting material to at least partially overlie the first superconducting material. A second critical current density of the second superconducting material is higher than a first critical current density of the first superconducting material.
H01F 6/06 - Bobines, p.ex. dispositions pour l'enroulement, l'isolation, les enveloppes ou les bornes des bobines
H01F 21/00 - Inductances ou transformateurs variables du type pour signaux
H01F 41/04 - Appareils ou procédés spécialement adaptés à la fabrication ou à l'assemblage des aimants, des inductances ou des transformateurs; Appareils ou procédés spécialement adaptés à la fabrication des matériaux caractérisés par leurs propriétés magnétiques pour la fabrication de noyaux, bobines ou aimants pour la fabrication de bobines
9.
DISCRETE VARIATIONAL AUTO-ENCODER SYSTEMS AND METHODS FOR MACHINE LEARNING USING ADIABATIC QUANTUM COMPUTERS
A computational system can include digital circuitry and analog circuitry, for instance a digital processor and a quantum processor. The quantum processor can operate as a sample generator providing samples. Samples can be employed by the digital processing in implementing various machine learning techniques. For example, the computational system can perform unsupervised learning over an input space, for example via a discrete variational auto-encoder, and attempting to maximize the log-likelihood of an observed dataset. Maximizing the log-likelihood of the observed dataset can include generating a hierarchical approximating posterior. Unsupervised learning can include generating samples of a prior distribution using the quantum processor. Generating samples using the quantum processor can include forming chains of qubits and representing discrete variables by chains.
G06K 9/00 - Méthodes ou dispositions pour la lecture ou la reconnaissance de caractères imprimés ou écrits ou pour la reconnaissance de formes, p.ex. d'empreintes digitales
G06F 15/80 - Architectures de calculateurs universels à programmes enregistrés comprenant un ensemble d'unités de traitement à commande commune, p.ex. plusieurs processeurs de données à instruction unique
A superconducting readout system employing a microwave transmission line, and a microwave superconducting resonator communicatively coupled to the microwave transmission line, and including a superconducting quantum interference device (SQUID), may be advantageously calibrated at least in part by measuring a resonant frequency of the microwave superconducting resonator in response to a flux bias applied to the SQUID, measuring a sensitivity of the resonant frequency in response to the flux bias, and selecting an operating frequency and a sensitivity of the microwave superconducting resonator based at least in part on a variation of the resonant frequency as a function of the flux bias. The flux bias may be applied to the SQUID by an interface inductively coupled to the SQUID. Calibration of the superconducting readout system may also include determining at least one of a propagation delay, a microwave transmission line delay, and a microwave transmission line phase offset.
A digital processor runs a machine learning algorithm in parallel with a sampling server. The sampling sever may continuously or intermittently draw samples for the machine learning algorithm during execution of the machine learning algorithm, for example on a given problem. The sampling server may run in parallel (e.g., concurrently, overlapping, simultaneously) with a quantum processor to draw samples from the quantum processor.
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06F 15/173 - Communication entre processeurs utilisant un réseau d'interconnexion, p.ex. matriciel, de réarrangement, pyramidal, en étoile ou ramifié
G06N 7/08 - Agencements informatiques fondés sur des modèles mathématiques spécifiques utilisant des modèles de chaos ou des modèles de systèmes non linéaires
H04L 67/10 - Protocoles dans lesquels une application est distribuée parmi les nœuds du réseau
G06N 7/00 - Agencements informatiques fondés sur des modèles mathématiques spécifiques
G06F 9/30 - Dispositions pour exécuter des instructions machines, p.ex. décodage d'instructions
12.
SINGLE FLUX QUANTUM SOURCE FOR PROJECTIVE MEASUREMENTS
Devices, systems, and methods that include a qubit coupled to a projective-source digital-to-analog converter (PSDAC) for projective measurement of the qubit. A change in flux state of the PSDAC from a first flux state to a second flux state generates a fast-flux step or fast-step waveform that can be applied to the qubit to perform projective measurement of the qubit. For a quantum processor that includes a set of qubits wherein each qubit is coupled to a respective PSDAC, a shared trigger line can activate each PSDAC to generate a respective fast-flux step or fast-step waveform. Synchronization devices can synchronize the fast-flux steps or fast-step waveforms, allowing for projective readout of the set of qubits.
Achieving orthogonal control of non-orthogonal qubit parameters of a logical qubit allows for increasing the length of a qubit chain thereby increasing the effective connectivity of the qubit chain. A hybrid qubit is formed by communicatively coupling a dedicated second qubit to a first qubit. By tuning a programmable parameter of the second qubit of a hybrid qubit, an effective programmable parameter of the hybrid qubit is adjusted without affecting another effective programmable parameter of the hybrid qubit thereby achieving orthogonal control of otherwise non-orthogonal qubit parameters. The length of the logical qubit may thus be increased by communicatively coupling a plurality of such hybrid qubits together.
A filter multiplexer for variable bandwidth annealing selection is described. The filter multiplexer has multiple pathways, where each pathway comprises a switch and a filter. Each filter has a different cutoff frequency from the other filters. Switches may be cryogenic switches. Each pathway may be communicatively coupled to an external annealing line. Upon receiving a problem, an annealing bandwidth can be selected, set or configured via the multiplexer to operate a quantum processor with a desired annealing schedule. The multiplexer may be used for calibration of a quantum processor by performing a calibration with a large annealing bandwidth, then calibrating the quantum processor by iterating through all available annealing bandwidths from the multiplexer.
G06F 7/22 - Dispositions pour le tri ou l'interclassement de données de calculateur sur des supports d'enregistrement continus, p.ex. bande, tambour, disque
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H03H 11/04 - Réseaux sélectifs en fréquence à deux accès
H03H 11/36 - Réseaux pour connecter plusieurs sources ou charges, fonctionnant sur la même fréquence ou dans la même bande de fréquence, à une charge ou à une source commune
15.
Systems and methods for addressing devices in a superconducting circuit
Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line. A low-frequency current bias may be used at room temperature to identify the presence of a DC short, an open, and/or an unexpected resistance in a superconducting resonator.
This disclosure generally relates to processor systems comprising printed circuit boards, I/O chips and processor chips with mated contacts. Contacts are formed on an upper surface of a printed circuit board having a through-hole and on a processor chip inside the through-hole. The processor chip may be a superconducting quantum processor chip comprising qubits, couplers, Digital to Analog converters, QFP shift registers and analog lines. Contacts are formed on an upper surface on an I/O chip and mated with the contacts on the printed circuit board and the processor chip. Contacts may be Indium bump bonds or superconducting solder bonds. The processor chip and the I/O chip may include a shield layer, a substrate layer and a thermally conductive layer.
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs sous-groupes différents du même groupe principal des groupes , ou dans une seule sous-classe de ,
H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H05K 1/18 - Circuits imprimés associés structurellement à des composants électriques non imprimés
17.
Systems and methods for collaborative filtering with variational autoencoders
Collaborative filtering systems based on variational autoencoders (VAEs) are provided. VAEs may be trained on row-wise data without necessarily training a paired VAE on column-wise data (or vice-versa), and may optionally be trained via minibatches. The row-wise VAE models the output of the corresponding column-based VAE as a set of parameters and uses these parameters in decoding. In some implementations, a paired VAE is provided which receives column-wise data and models row-wise parameters; each of the paired VAEs may bind their learned column- or row-wise parameters to the output of the corresponding VAE. The paired VAEs may optionally be trained via minibatches. Unobserved data may be explicitly modelled. Methods for performing inference with such VAE-based collaborative filtering systems are also disclosed, as are example applications to search and anomaly detection.
Systems, methods and article provide the services of heterogeneous resources, for example the services analog processors, e.g., quantum processors, in a robust manner that can include high availability, failover, and load balancing of the heterogeneous resources. A virtual solver is selected based at least in part on a first set of requirements, a first set of analog processors is identified based at least in part on the first set of requirements, and a first handle returned to the first virtual solver. A load balancer may balance loads. Failure over may be implemented.
G06F 11/20 - Détection ou correction d'erreur dans une donnée par redondance dans le matériel en utilisant un masquage actif du défaut, p.ex. en déconnectant les éléments défaillants ou en insérant des éléments de rechange
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
In many cases after degaussing the field distribution in a magnetic material there may be regions within the magnetic material that have ordered domains that contribute a remnant field. There is the need to reduce or eliminate non-uniform fields within a volume of interest left after degaussing a magnetic shield. Degaussing coils surrounding a metal shield can be used to favorably order magnetic domains within the material to counteract the remnant fields left behind following imperfect degaussing. The remnant field value can be measured and a small current may be applied through the degaussing coils. After removing the current, the field can be measured again and a higher current may be applied again through the coils. Repeated applications of currents and field measurement will progressively order domains in the direction of the applied field, resulting in a reduction of the net field and lower field gradient across the volume of interest.
H01F 7/06 - Electro-aimants; Actionneurs comportant des électro-aimants
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H03H 3/00 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs
H01F 41/04 - Appareils ou procédés spécialement adaptés à la fabrication ou à l'assemblage des aimants, des inductances ou des transformateurs; Appareils ou procédés spécialement adaptés à la fabrication des matériaux caractérisés par leurs propriétés magnétiques pour la fabrication de noyaux, bobines ou aimants pour la fabrication de bobines
H01F 13/00 - Appareils ou procédés pour l'aimantation ou pour la désaimantation
H03H 7/42 - Réseaux permettant de transformer des signaux équilibrés en signaux non équilibrés et réciproquement
H01F 41/076 - Formation de prises ou de bornes lors de l’enroulement, p.ex. par enveloppement ou par brasage du fil sur les broches, ou en formant directement des bornes à partir du fil
H03H 1/00 - RÉSEAUX D'IMPÉDANCES, p.ex. CIRCUITS RÉSONNANTS; RÉSONATEURS - Détails de réalisation des réseaux d'impédances dont le mode de fonctionnement électrique n'est pas spécifié ou est applicable à plus d'un type de réseau
H05K 1/16 - Circuits imprimés comprenant des composants électriques imprimés incorporés, p.ex. une résistance, un condensateur, une inductance imprimés
H01L 39/14 - Dispositifs à supraconductivité permanente
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
A hybrid computer comprising a quantum processor can be operated to perform a scalable comparison of high-entropy samplers. Performing a scalable comparison of high-entropy samplers can include comparing entropy and KL divergence of post-processed samplers. A hybrid computer comprising a quantum processor generates samples for machine learning. The quantum processor is trained by matching data statistics to statistics of the quantum processor. The quantum processor is tuned to match moments of the data.
A superconducting circuit may include a transmission line having at least one transmission line inductance, a superconducting resonator, and a coupling capacitance that communicatively couples the superconducting resonator to the transmission line. The transmission line inductance may have a value selected to at least partially compensate for a variation in a characteristic impedance of the transmission line, the variation caused at least in part by the coupling capacitance. The coupling capacitance may be distributed along the length of the transmission line. A superconducting circuit may include a transmission line having at least one transmission line capacitance, a superconducting resonator, and a coupling inductance that communicatively couples the superconducting resonator to the transmission line. The transmission line capacitance may be selected to at least partially compensate for a variation in coupling strength between the superconducting resonator and the transmission line.
Systems, devices, articles, methods, and techniques for advancing quantum computing by removing unwanted interactions in one or more quantum processor. One approach includes creating an updated plurality of programmable parameters based at least in part on a received value for the characteristic magnetic susceptibility of the qubit in the at least one quantum processor, and returning the updated plurality of programmable parameters. Examples programmable parameters include local biases, and coupling values characterizing the problem Hamilton. Also, for example, a quantum processor may be summarized as including a first loop of superconducting material, a first compound Josephson junction interrupting the first loop of superconducting material, a first coupler inductively coupled to the first loop of superconducting material, a second coupler inductively coupled to the first loop of superconducting material, and a second loop of superconducting material proximally placed to the first loop of superconducting material inductively coupled to the first coupler and the second coupler.
G06F 17/00 - TRAITEMENT ÉLECTRIQUE DE DONNÉES NUMÉRIQUES Équipement ou méthodes de traitement de données ou de calcul numérique, spécialement adaptés à des fonctions spécifiques
G06F 15/82 - Architectures de calculateurs universels à programmes enregistrés commandés par des données ou à la demande
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
A method of fabricating a multilayer superconducting printed circuit board comprises first, forming a bimetal foil to overlie a substrate, the bimetal foil comprising a first layer of a first metal, a layer of a second metal, and a second layer of the first metal, and then etching the second layer of the first metal. Forming a bimetal foil to overlie a substrate may include forming a bimetal foil comprising a first layer of a normal metal, a layer of a superconducting metal, and a second layer of the normal metal. Etching the second layer of the first metal may include preparing a patterned image in the second layer of the first metal for etching, processing the patterned image through a cleaner, rinsing the patterned image, and then, immersing the patterned image in a microetch.
H05K 3/06 - Elimination du matériau conducteur par voie chimique ou électrolytique, p.ex. par le procédé de photo-décapage
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
24.
SYSTEMS AND METHODS FOR MODELING NOISE SEQUENCES AND CALIBRATING QUANTUM PROCESSORS
Calibration techniques for devices of analog processors to remove time-dependent biases are described. Devices in an analog processor exhibit a noise spectrum that spans a wide range of frequencies, characterized by 1/f spectrum. Offset parameters are determined assuming only a given power spectral density. The algorithm determines a model for a measurable quantity of a device in an analog processor associated with a noise process and an offset parameter, determines the form of the spectral density of the noise process, approximates the noise spectrum by a discrete distribution via the digital processor, constructs a probability distribution of the noise process based on the discrete distribution and evaluates the probability distribution to determine optimized parameter settings to enhance computational efficiency.
G06N 7/00 - Agencements informatiques fondés sur des modèles mathématiques spécifiques
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G01R 29/26 - Mesure du coefficient de bruit; Mesure de rapport signal-bruit
G01R 33/24 - Dispositions ou appareils pour la mesure des grandeurs magnétiques faisant intervenir la résonance magnétique pour la mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques
25.
Systems and methods for efficient input and output to quantum processors
A quantum processor performs input and output which may be performed synchronously. The quantum processor executes a problem to generate a classical output state, which is read out at least partially by an I/O system. The I/O system also transmits a classical input state to by the I/O system, which may include the same qubit-proximate devices used for read-out. The classical input state is written to the qubits, and the quantum processor executes based on the classical input state (e.g., by performing reverse annealing to transform the classical input state to quantum state).
Generate an automorphism of the problem graph, determine an embedding of the automorphism to the hardware graph and modify the embedding of the problem graph into the hardware graph to correspond to the embedding of the automorphism to the hardware graph. Determine an upper-bound on the required chain strength. Calibrate and record properties of the component of a quantum processor with a digital processor, query the digital processor for a range of properties. Generate a bit mask and change the sign of the bias of individual qubits according to the bit mask before submitting a problem to a quantum processor, apply the same bit mask to the bit result. Generate a second set of parameters of a quantum processor from a first set of parameters via a genetic algorithm.
SYSTEMS AND METHODS EMPLOYING NEW EVOLUTION SCHEDULES IN AN ANALOG COMPUTER WITH APPLICATIONS TO DETERMINING ISOMORPHIC GRAPHS AND POST-PROCESSING SOLUTIONS
A second problem Hamiltonian may replace a first problem Hamiltonian during evolution of an analog processor (e.g., quantum processor) during a first iteration in solving a first problem. This may be repeated during a second, or further successive iterations on the first problem, following re-initialization of the analog processor. An analog processor may evolve under a first non-monotonic evolution schedule during a first iteration, and second non-monotonic evolution schedule under second, or additional non-monotonic evolution schedule under even further iterations. A first graph and second graph may each be processed to extract final states versus a plurality of evolution schedules, and a determination made as to whether the first graph is isomorphic with respect to the second graph. An analog processor may evolve by decreasing a temperature of, and a set of quantum fluctuations, within the analog processor until the analog processor reaches a state preferred by a problem Hamiltonian.
A computational method via a hybrid processor comprising an analog processor and a digital processor includes determining a first classical spin configuration via the digital processor, determining preparatory biases toward the first classical spin configuration, programming an Ising problem and the preparatory biases in the analog processor via the digital processor, evolving the analog processor in a first direction, latching the state of the analog processor for a first dwell time, programming the analog processor to remove the preparatory biases via the digital processor, determining a tunneling energy via the digital processor, determining a second dwell time via the digital processor, evolving the analog processor in a second direction until the analog processor reaches the tunneling energy, and evolving the analog processor in the first direction until the analog processor reaches a second classical spin configuration.
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06N 7/08 - Agencements informatiques fondés sur des modèles mathématiques spécifiques utilisant des modèles de chaos ou des modèles de systèmes non linéaires
G06N 3/044 - Réseaux récurrents, p.ex. réseaux de Hopfield
G06N 3/047 - Réseaux probabilistes ou stochastiques
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p.ex. calcul quantique ou logique à un électron
29.
Systems and methods for coupling qubits in a quantum processor
eff of a qubit characterized by a double-well potential energy may advantageously be tuned. Sign-tunable electrostatic coupling of qubits may be implemented, e.g., via resonators, and LC-circuits. YY couplings may be incorporated into a quantum anneaier (e.g., quantum processor).
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
30.
Systems and methods for hybrid analog and digital processing of a computational problem using mean fields
A hybrid computing system for solving a computational problem includes a digital processor, a quantum processor having qubits and coupling devices that together define a working graph of the quantum processor, and at least one nontransitory processor-readable medium communicatively coupleable to the digital processor which stores at least one of processor-executable instructions or data. The digital processor receives a computational problem, and programs the quantum processor with a first set of bias fields and a first set of coupling strengths. The quantum processor generates samples as potential solutions to an approximation of the problem. The digital processor updates the approximation by determining a second set of bias fields based at least in part on the first set of bias fields and a first set of mean fields that are based at least in part on the first set of samples and coupling strengths of one or more virtual coupling devices.
G06F 17/00 - TRAITEMENT ÉLECTRIQUE DE DONNÉES NUMÉRIQUES Équipement ou méthodes de traitement de données ou de calcul numérique, spécialement adaptés à des fonctions spécifiques
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06N 10/60 - Algorithmes quantiques, p.ex. fondés sur l'optimisation quantique ou les transformées quantiques de Fourier ou de Hadamard
G06F 15/16 - Associations de plusieurs calculateurs numériques comportant chacun au moins une unité arithmétique, une unité programme et un registre, p.ex. pour le traitement simultané de plusieurs programmes
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p.ex. couplage ou commande de qubit
H03K 19/00 - Circuits logiques, c. à d. ayant au moins deux entrées agissant sur une sortie; Circuits d'inversion
31.
Systems and methods for simulation of dynamic systems
A highly parallelized parallel tempering technique for simulating dynamic systems, such as quantum processors, is provided. Replica exchange is facilitated by synchronizing grid-level memory. Particular implementations for simulating quantum processors by representing cells of qubits and couplers in grid-, block-, and thread-level memory are discussed. Parallel tempering of such dynamic systems can be assisted by modifying replicas based on isoenergetic cluster moves (ICMs). ICMs are generated via secondary replicas which are maintained alongside primary replicas and exchanged between blocks and/or generated dynamically by blocks without necessarily being exchanged. Certain refinements, such as exchanging energies and temperatures through grid-level memory, are also discussed.
Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
G06F 15/80 - Architectures de calculateurs universels à programmes enregistrés comprenant un ensemble d'unités de traitement à commande commune, p.ex. plusieurs processeurs de données à instruction unique
H03K 3/38 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
H04L 29/08 - Procédure de commande de la transmission, p.ex. procédure de commande du niveau de la liaison
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06F 15/76 - Architectures de calculateurs universels à programmes enregistrés
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p.ex. calcul quantique ou logique à un électron
The domain adaptation problem is addressed by using the predictions of a trained model over both source and target domain to retain the model with the assistance of an auxiliary model and a modified objective function. Inaccuracy in the model's predictions in the target domain is treated as noise and is reduced by using a robust learning framework during retraining, enabling unsupervised training in the target domain. Applications include object detection models, where noise in retraining is reduced by explicitly representing label noise and geometry noise in the objective function and using the ancillary model to inject information about label noise.
Hybrid quantum-classical approaches for solving computational problems in which results from a quantum processor are combined with an exact method executed on a classical processor are described. Quantum processors can generate candidate solutions to a combinatorial optimization problem, but since quantum processors can be probabilistic, they are unable to certify that a solution is an optimal solution. A hybrid quantum-classical exact solver addresses this problem by combining outputs from a quantum annealing processor with a classical exact algorithm that is modified to exploit properties of the quantum computation. The exact method executed on a classical processor can be a Branch and Bound algorithm. A Branch and Bound algorithm can be modified to exploit properties of quantum computation including a) the sampling of multiple low-energy solutions by a quantum processor, and b) the embedding of solutions in a regular structure such as a native hardware graph of a quantum processor.
Systems and methods are described for operating a hybrid computing system using cluster contraction for converting large, dense input to reduced input that can be easily mapped into a quantum processor. The reduced input represents the global structure of the problem. Techniques involve partitioning the input variables into clusters and contracting each cluster. The input variables can be partitioned using an Unweighted Pair Group Method with Arithmetic Mean algorithm. The quantum processor returns samples based on the reduced input and the samples are expanded to correspond to the original input.
A computational system can include digital circuitry and analog circuitry, for instance a digital processor and a quantum processor. The quantum processor can operate as a sample generator providing samples. Samples can be employed by the digital processing in implementing various machine learning techniques. For example, the digital processor can operate as a restricted Boltzmann machine. The computational system can operate as a quantum-based deep belief network operating on a training data-set.
G06F 15/80 - Architectures de calculateurs universels à programmes enregistrés comprenant un ensemble d'unités de traitement à commande commune, p.ex. plusieurs processeurs de données à instruction unique
G06F 17/18 - Opérations mathématiques complexes pour l'évaluation de données statistiques
G06N 5/04 - Modèles d’inférence ou de raisonnement
G06T 1/20 - Architectures de processeurs; Configuration de processeurs p.ex. configuration en pipeline
37.
Simulating and post-processing using a generative adversarial network
A hybrid computing system comprising a quantum computer and a digital computer employs a digital computer to use machine learning methods for post-processing samples drawn from the quantum computer. Post-processing samples can include simulating samples drawn from the quantum computer. Machine learning methods such as generative adversarial networks (GANs) and conditional GANs are applied. Samples drawn from the quantum computer can be a target distribution. A generator of a GAN generates samples based on a noise prior distribution and a discriminator of a GAN measures the distance between the target distribution and a generative distribution. A generator parameter and a discriminator parameter are respectively minimized and maximized.
Methods for reducing errors in calibrated devices comprise detecting outliers, self-checking consistency of measurements, tuning device controls to target values, and absolutely calibrating devices via a first standard and cross-checking the results via a second standard. The first standard may be a calibrated current and the second calibration standard may be a calibrated frequency. A calibrated frequency may be a microwave signal applied to the body of a qubit. Qubit annealing controls can quickly lower and raise the tunnel barrier to measures the oscillation frequency of the qubit between two potential wells.
Computational systems implement problem solving using hybrid digital/quantum computing approaches. A problem may be represented as a problem graph which is larger and/or has higher connectivity than a working and/or hardware graph of a quantum processor. A quantum processor may be used determine approximate solutions, which solutions are provided as initial states to one or more digital processors which may implement classical post-processing to generate improved solutions. Techniques for solving problems on extended, more-connected, and/or “virtual full yield” variations of the processor's actual working and/or hardware graphs are provided. A method of operation in a computational system comprising a quantum processor includes partitioning a problem graph into sub-problem graphs, and embedding a sub-problem graph onto the working graph of the quantum processor. The quantum processor and a non-quantum processor-based device generate partial samples. A controller causes a processing operation on the partial samples to generate complete samples.
Fully-supervised semantic segmentation machine learning models are augmented by ancillary machine learning models which generate high-detail predictions from low-detail, weakly-supervised data. The combined model can be trained over both fully- and weakly-supervised data. Only the primary model is required for inference, post-training. The combined model can be made self-correcting during training by adjusting the ancillary model's output based on parameters learned over both the fully- and weakly-supervised data. The self-correction module may combine the output of the primary and ancillary models in various ways, including through linear combinations and via neural networks. The self-correction module and ancillary model may benefit from disclosed pre-training techniques.
Systems and methods for scheduling usage time for programs that can be executed on a hybrid computing system including a quantum processing unit (QPU) and a central processing unit (CPU). Programs can comprise both QPU-executable tasks and CPU-executable tasks. Some programs can be considered high performance programs that are intolerant of interruptions to QPU-executable tasks and some programs can be considered low performance programs that are tolerant of interruptions to QPU-executable tasks. After a high performance program finishes executing QPU-executable tasks on a QPU, a low performance program may execute QPU-executable tasks on the QPU while the high performance program executes CPU-executable tasks on a CPU. Execution of QPU-executable tasks of a low performance program on a QPU can pause or stop if a high performance program is queued.
Systems, methods, and devices for electrically coupling an integrated circuit to a set of coaxial lines via a printed circuit board assembly are described. A device sample holder includes a printed circuit board that is operable to edge-couple to an integrated circuit. A surface of the printed circuit board that carries a set of coaxial connectors is orthogonal to another surface of the printed circuit board that exposes a set of conductive traces. The set of conductive traces are operable to electrically couple to a set of conductive paths of an integrated circuit to provide a communicative path between the integrated circuit and components of an input/output system in a refrigerated environment.
H05K 7/06 - Dispositions de composants de circuits ou du câblage sur une structure de support sur panneaux isolants
B23P 19/00 - Machines effectuant simplement l'assemblage ou la séparation de pièces ou d'objets métalliques entre eux ou des pièces métalliques avec des pièces non métalliques, que cela entraîne ou non une certaine déformation; Outils ou dispositifs à cet effet dans la mesure où ils ne sont pas prévus dans d'autres classes
H05K 1/09 - Emploi de matériaux pour réaliser le parcours métallique
H05K 1/14 - Association structurale de plusieurs circuits imprimés
H05K 3/30 - Assemblage de circuits imprimés avec des composants électriques, p.ex. avec une résistance
H01R 24/50 - Dispositifs de couplage en deux pièces, ou l'une des pièces qui coopèrent dans ces dispositifs, caractérisés par leur structure générale ayant des contacts disposés concentriquement ou coaxialement spécialement adaptés à la haute fréquence montés sur une PCB [carte de circuits imprimés]
H01R 25/00 - Pièces de couplage adaptées à la coopération simultanée avec plusieurs pièces complémentaires identiques, p.ex. pour la distribution d'énergie à plusieurs circuits
Techniques are provided for computing problems represented as directed graphical models via quantum processors with topologies and coupling physics which correspond to undirected graphs. These include techniques for generating approximations of Bayesian networks via a quantum processor capable of computing problems based on a Markov network-based representation of such problems. Approximations may be generated by moralization of Bayesian networks to Markov networks, learning of Bayesian networks' probability distributions by Markov networks' probability distributions, or otherwise, and are trained by executing the resulting Markov network on the quantum processor.
A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
A hybrid computing system comprising a digital and an analog processor calculates the ground energy state of a non-diagonal Hamiltonian via diagonalization of the Hamiltonian in different bases and reverse annealing. A first basis is rotated to render part of the Hamiltonian diagonal, then the quantum processor evolves backwards until a value s* of the normalized evolution coefficient. Another basis is rotated to render another part of the Hamiltonian diagonal and the quantum processor evolves backwards again until s*. The bases can be rotated via discrete Fourier transform. The quantum processor may pause for a time t after each backward evolution. The ground state energy is calculated using the final ground states.
The systems, devices, articles, and methods described herein generally relate to analog computers, for example quantum processors comprising qubits, couplers, and, or cavities. Analog computers, for example quantum processor based computers, are the subject of various sources of error which can hinder operation, potentially reducing computational accuracy and speed. Sources of error can be broadly characterized, for example as i) a background susceptibility do to inherently characteristics of the circuitry design, ii) as an h/J ratio imbalance, iii) bit flip errors, iv) fidelity, and v) Anderson localization, and various combinations of the aforesaid.
Topologies for analog computing systems may include cells of qubits which may implement a tripartite graph and cross substantially orthogonally. Qubits may have an H-shape or an l-shape, qubits may change direction within a cell. Topologies may be comprised of two or more different sub-topologies. Qubits may be communicatively coupled to non-adjacent cells by long-range couplers. Long-range couplers may change direction within a cell. A cell may have two or more different type of long-range couplers. A cell may have shifted qubits, more than one type of inter-cell couplers, more than one type of intra-cell couplers and long-range couplers.
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06F 15/80 - Architectures de calculateurs universels à programmes enregistrés comprenant un ensemble d'unités de traitement à commande commune, p.ex. plusieurs processeurs de données à instruction unique
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p.ex. calcul quantique ou logique à un électron
Passive and actives approaches to mitigating the effects of spin-bath polarization are described and illustrated. Such may, for example, include at least partially depolarizing the spin-bath polarization, for instance by: performing an annealing cycle by the quantum processor to generate a final state of a qubit of the quantum processor; flipping the final state of the qubit of the quantum processor to an opposite state; and latching the qubit in the opposite state for a predetermined duration.
A quantum processor is operable as a universal adiabatic quantum computing system. The quantum processor includes physical qubits, with at least a first and second communicative coupling available between pairs of qubits via an in-situ tunable superconducting capacitive coupler and an in-situ tunable superconducting inductive coupler, respectively. Tunable couplers provide diagonal and off-diagonal coupling. Compound Josephson junctions (CJJs) of the tunable couplers are responsive to a flux bias to tune a sign and magnitude of a sum of a capacitance of a fixed capacitor and a tunable capacitance which is mediated across a pair of coupling capacitors. The qubits may be hybrid qubits, operable in a flux regime or a charge regime. Qubits may include a pair of CJJs that interrupt a loop of material and which are separated by an island of superconducting material which is voltage biased with respect to a qubit body.
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H03K 3/38 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
H03K 19/195 - Circuits logiques, c. à d. ayant au moins deux entrées agissant sur une sortie; Circuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliers; Eléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p.ex. des cryotrons
50.
Problem solving using quantum annealer, useful for example in sequencing, for instance nucleic acid sequencing
Quantum annealers as analog or quantum processors can find paths in problem graphs embedded in a hardware graph of the processor, for example finding valid paths, shortest paths or longest paths. A set of input, for example nucleic acid reads, can be used to set up a graph with edges between nodes denoting overlap (i.e., common base pairs) between the reads with constraints applied to perform sequence alignment or sequencing of a nucleic acid (e.g., DNA) strand or sequence, finding a solution that has a ground state energy. At least a portion of the described approaches can be applied to other problems, for instance resource allocations problems, e.g., job scheduling problems, traveling salesperson problems, and other NP-complete problems.
G06N 5/04 - Modèles d’inférence ou de raisonnement
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G16B 30/00 - TIC spécialement adaptées à l’analyse de séquences impliquant des nucléotides ou des aminoacides
G16B 40/00 - TIC spécialement adaptées aux biostatistiques; TIC spécialement adaptées à l’apprentissage automatique ou à l’exploration de données liées à la bio-informatique, p.ex. extraction de connaissances ou détection de motifs
G16B 50/00 - TIC pour la programmation d’outils ou de systèmes de bases de données spécialement adaptées à la bio-informatique
G06N 5/00 - Agencements informatiques utilisant des modèles fondés sur la connaissance
51.
Discrete variational auto-encoder systems and methods for machine learning using adiabatic quantum computers
A computational system can include digital circuitry and analog circuitry, for instance a digital processor and a quantum processor. The quantum processor can operate as a sample generator providing samples. Samples can be employed by the digital processing in implementing various machine learning techniques. For example, the computational system can perform unsupervised learning over an input space, for example via a discrete variational auto-encoder, and attempting to maximize the log-likelihood of an observed dataset. Maximizing the log-likelihood of the observed dataset can include generating a hierarchical approximating posterior.
Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G05B 19/042 - Commande à programme autre que la commande numérique, c.à d. dans des automatismes à séquence ou dans des automates à logique utilisant des processeurs numériques
53.
Systems and methods for quantum processing of data using a sparse coded dictionary learned from unlabeled data and supervised learning using encoded labeled data elements
Systems, methods and aspects, and embodiments thereof relate to unsupervised or semi-supervised features learning using a quantum processor. To achieve unsupervised or semi-supervised features learning, the quantum processor is programmed to achieve Hierarchal Deep Learning (referred to as HDL) over one or more data sets. Systems and methods search for, parse, and detect maximally repeating patterns in one or more data sets or across data or data sets. Embodiments and aspects regard using sparse coding to detect maximally repeating patterns in or across data. Examples of sparse coding include L0 and L1 sparse coding. Some implementations may involve appending, incorporating or attaching labels to dictionary elements, or constituent elements of one or more dictionaries. There may be a logical association between label and the element labeled such that the process of unsupervised or semi-supervised feature learning spans both the elements and the incorporated, attached or appended label.
G06K 9/00 - Méthodes ou dispositions pour la lecture ou la reconnaissance de caractères imprimés ou écrits ou pour la reconnaissance de formes, p.ex. d'empreintes digitales
G06K 9/62 - Méthodes ou dispositions pour la reconnaissance utilisant des moyens électroniques
G06V 10/94 - Architectures logicielles ou matérielles spécialement adaptées à la compréhension d’images ou de vidéos
The systems, devices, articles, and methods generally relate to sampling from an available probability distribution. The samples maybe used to create a desirable probability distribution, for instance for use in computing values used in computational techniques including: Importance Sampling and Markov chain Monte Carlo systems. An analog processor may operate as a sample generator, for example by: programming the analog processor with a configuration of the number of programmable parameters for the analog processor, which corresponds to a probability distribution over qubits of the analog processor, evolving the analog processor, and reading out states for the qubits. The states for the qubits in the plurality of qubits correspond to a sample from the probability distribution. Operation of the sampling device may be summarized as including updating a set of samples to include the sample from the probability distribution, and returning the set of samples.
G06F 15/18 - dans lesquels un programme est modifié en fonction de l'expérience acquise par le calculateur lui-même au cours d'un cycle complet; Machines capables de s'instruire (systèmes de commande adaptatifs G05B 13/00;intelligence artificielle G06N)
G06F 17/18 - Opérations mathématiques complexes pour l'évaluation de données statistiques
G06N 10/00 - Informatique quantique, c. à d. traitement de l’information fondé sur des phénomènes de mécanique quantique
brevets
