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2023
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Invention
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Memory systems, modules, and methods for improved capacity.
A memory module with multiple memory... |
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Invention
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Memory system with threaded transaction support.
Memory modules, systems, memory controllers and... |
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Invention
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Dram device with multiple voltage domains.
A dynamic memory array of a DRAM device is operated u... |
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Invention
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Memory component having internal read-modify-write operation.
An memory component includes a mem... |
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Invention
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Method for caching and migrating de-compressed page.
Disclosed are techniques for storing data d... |
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Invention
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Dynamic random access memory (dram) component for high-performance, high-capacity registered memo... |
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Invention
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Memory modules and systems with variable-width data ranks and configurable data-rank timing.
A m... |
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Invention
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Row hammer mitigation.
Row hammer is mitigated by issuing, to a memory device, mitigation operat... |
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Invention
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Error remapping.
Many error correction schemes fail to correct for double-bit errors and a modul... |
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Invention
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Memory module with dedicated repair devices.
A memory module is disclosed. The memory module inc... |
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Invention
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Memory with deferred fractional row activation.
Row activation operations within a memory compon... |
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Invention
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Variable memory access granularity.
An integrated-circuit memory component receives, as part of ... |
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Invention
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Latency-controlled integrity and data encryption (ide). Technologies for providing integrity and ... |
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Invention
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Stacked memory device with paired channels.
A stacked memory device includes memory dies over a ... |
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Invention
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Cascaded memory system.
A cascaded memory system includes a memory module having a primary inter... |
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Invention
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Uncompressed page caching.
A buffer/interface device of the memory node may read and compress bl... |
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Invention
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Controller to detect malfunctioning address of memory device.
A dynamic random access memory (DR... |
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Invention
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Dram for caches. In response to some access commands, a DRAM device is configured to receive cach... |
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Invention
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Dram cache with stacked, heterogenous tag and data dies.
A high-capacity cache memory is impleme... |
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Invention
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Multi-channel memory stack with shared die. An interconnected stack of Dynamic Random Access Memo... |
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Invention
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Split-entry dram cache. A high-capacity cache memory is implemented by one or more DRAM dies in w... |
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Invention
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Memory device comprising programmable command-and-address and/or data interfaces.
A memory devic... |
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Invention
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Receiver with improved noise immunity.
A binary receiver combines a fast amplifier with a relati... |
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Invention
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Memory module threading with staggered data transfers.
A method of transferring data between a m... |
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Invention
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Deterministic operation of storage class memory.
Memory controllers, devices, modules, systems a... |
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Invention
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Memory device with extended write data window. A memory device enables write operations with an e... |
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Invention
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Low power edge and data sampling.
An integrated circuit receiver is disclosed comprising a data ... |
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Invention
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Configurable memory device. A memory device may be accessed via multiple channels (e.g., 2 channe... |
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Invention
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Pulse filter.
A pulse filter circuit is configured to eliminate pulses that are less than a spec... |
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Invention
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Training and operations with a double buffered memory topology.
System and method for training a... |
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Invention
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Near-memory compute module.
Disclosed herein are systems having an integrated circuit device dis... |
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Invention
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Memory controller with error detection and retry modes of operation.
A memory system includes a ... |
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Invention
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Strobeless dynamic ransom access memory (dram) data interface with drift tracking circuitry. Memo... |
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Invention
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Memory repair method and apparatus based on error code tracking.
A memory module is disclosed th... |
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Invention
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Buffer circuit with adaptive repair capability.
A buffer circuit is disclosed. The buffer circui... |
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Invention
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Memory component with error-detect-correct code interface.
A memory component internally generat... |
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Invention
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Stacked device system.
Multiple device stacks are interconnected in a ring topology. The inter-d... |
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Invention
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Adjustable access energy and access latency memory system and devices.
Same sized blocks of data... |
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Invention
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Memory with interleaved preset. A memory system includes a host controller that issues access com... |
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Invention
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Memory compression.
A buffer/interface device of a memory node may read and compress fixed size ... |
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Invention
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On-die termination.
Local on-die termination controllers for effecting termination of a high-spe... |
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Invention
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Stacked semiconductor device assembly in computer system.
This application is directed to a stac... |
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Invention
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On-die termination of address and command signals.
A memory device includes a set of inputs, and... |
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2022
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Invention
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Multi-element memory device with power control for individual elements. A multi-element device in... |
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Invention
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Dual-domain combinational logic circuitry. A combinational logic circuit includes input circuitry... |
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Invention
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High-bandwidth neural network. One or more neural network layers are implemented by respective se... |
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2021
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Invention
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Signal skew correction in integrated circuit memory devices.
Technologies for signal skew correc... |
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Invention
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High-speed circuit combining aes and sm4 encryption and decryption.
Disclosed embodiments relate... |
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Invention
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Data-gating based masking.
A bundled-data protocol can be used to synchronize the data flow in t... |
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Invention
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Clocking architecture supporting multiple data rates and reference edge selection. A clocking arc... |
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2015
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P/S
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Computer hardware; integrated circuits; computer chips; microprocessors; computer memories; compu... |
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2014
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P/S
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Scientific, nautical, surveying, electric, photographic, cinematographic, optical, weighing, meas... |
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P/S
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computer hardware and software for electronic design interface validation and testing; computer h... |
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P/S
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Electronic components, electronic circuits, integrated
circuits, microcircuits, printed circuits... |
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P/S
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Electronic components, electronic circuits, integrated circuits, microcircuits, printed circuits,... |
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P/S
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Computer hardware and software for validation and testing of electronic circuitry and chips; comp... |
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2012
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P/S
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Light emitting diode (LED) light controls; light emitting diode (LED) displays; light emitting di... |
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2011
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P/S
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Appareils et instruments pour l'enregistrement, la transmission, le traitement, le stockage et l'... |
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P/S
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Apparatus and instruments for recording, transmitting,
processing, storing and exchanging data, ... |
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P/S
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Apparatus and instruments for the recording, transmission, processing, storage and exchange of da... |
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2008
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P/S
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Computers; computer hardware; computer memories; application-specific integrated circuits and gra... |
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2007
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P/S
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Electronic components and systems, namely, computer hardware, integrated circuits, hybrid circuit... |
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2004
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P/S
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Computers; computer hardware; computer memories; memory devices; memory controllers; memory syste... |
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P/S
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Computer memories; memory devices, namely, [ dynamic random access memories (DRAMS), ] memory sys... |
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2003
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P/S
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Semiconductor devices and integrated circuits |
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P/S
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Licensing of intellectual property and technology; patent licensing |
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P/S
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Computer hardware; computer software; computer peripherals; computer memory components; microproc... |
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2002
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P/S
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LICENSING OF INTELLECTUAL PROPERTY AND PATENTED TECHNOLOGY TO OTHERS |
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P/S
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Licensing of intellectual property and technology |
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P/S
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COMPUTER HARDWARE; COMPUTER SOFTWARE FOR PREVENTING UNAUTHORIZED ACCESS TO COMPUTER NETWORKS AND ... |
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P/S
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Computer software and hardware, especially in the field of encrypted and secure communication as ... |
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1995
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P/S
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microprocessor components, peripheral controller components and computer memory components, namel... |
