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2024
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Invention
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Three-dimensional memory device containing multi-level bridge support structures and methods for ... |
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Invention
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Three-dimensional memory device containing etch stop metal plates for backside via structures and... |
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Invention
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Three-dimensional memory device including coaxial double contact via structures and methods for f... |
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Invention
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Xor data recovery schemes nonvolatile memory devices.
A memory package includes a plurality of m... |
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Invention
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Memory device including an electrically conductive layer with a tapered corner and method of maki... |
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Invention
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Three-dimensional memory device including a mid-stack source layer and methods for forming the sa... |
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Invention
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Three-dimensional memory device including schottky barrier source contacts and methods of forming... |
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Invention
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Three-dimensional memory device with backside support pillar structures and methods of forming th... |
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Invention
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Three-dimensional memory devices having channel cap structures and methods for forming the same. ... |
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Invention
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Three-dimensional memory device containing composite dielectric isolation structure in a staircas... |
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Invention
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Open block read icc reduction. Technology is disclosed herein for a storage system that reduces t... |
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Invention
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Separate peak current checkpoints for closed and open block read icc countermeasures in nand memo... |
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2023
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Invention
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Three-dimensional memory device containing multi-level word line contact wells and methods for ma... |
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Invention
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Three-dimensional memory device with integrated contact and support structure and method of makin... |
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Invention
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Failsafe memory card architecture using voltage driver output enable signals.
Embodiments of the... |
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Invention
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Three-dimensional memory device containing memory openings arranged in non-equilateral triangular... |
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Invention
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Three-dimensional memory device including a source structure surrounded by inner sidewalls of ver... |
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Invention
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Transceiver architecture with low kick-back noise and pad cap.
Embodiments of the present techno... |
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Invention
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Three-dimensional memory device containing composite word lines including a respective fluorine-f... |
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Invention
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Open block read icc reduction.
Technology is disclosed herein for a storage system that reduces ... |
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Invention
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Non-volatile memory with slow voltage ramp compensation.
Non-volatile memory cells are programme... |
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Invention
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Three-dimensional memory device with backside word line contact via structures and methods of for... |
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Invention
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Method of making high aspect ratio openings using multiple cladding masks and apparatus for imple... |
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Invention
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Semiconductor device containing divot-fill dielectric barrier for metal-to-metal contacts and met... |
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Invention
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Non-volatile memory with adapting erase process. A memory system performs an erase process for th... |
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Invention
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Integrated memory and control dies.
A memory system comprises a monolithic integration of a NAND... |
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Invention
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Three-dimensional memory device containing insulated gate located over a top source layer for app... |
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Invention
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One-time programmable memory devices and methods.
An apparatus is provided that includes a memor... |
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Invention
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Mini-pump level shifter for robust switching operation under low vdd environment.
On memory die ... |
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Invention
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Negative word line enabled pre-boosting strategy to improve nand program performance.
To improve... |
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Invention
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Noise reduction in sense amplifiers for non-volatile memory.
Techniques are presented to reduce ... |
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Invention
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Hole channel pre-charge to enable large-volume in-place data sanitization of non-volatile memory.... |
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Invention
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Non-volatile memory with faster post-erase defect testing.
As part of the erase operation for a ... |
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Invention
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Enhanced operations of non-volatile memory with shared data transfer latches.
An apparatus inclu... |
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Invention
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Stage based frequency optimization for area reduction of charge pumps.
A stage-based frequency o... |
