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2024
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Invention
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Memory transistor with multiple charge storing layers and a high work function gate electrode.
A... |
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2023
|
Invention
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Oxide-nitride-oxide stack having multiple oxynitride layers.
An embodiment of a semiconductor me... |
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Invention
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Low standby power with fast turn on method for non-volatile memory devices. Systems and methods f... |
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Invention
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Method of ono integration into logic cmos flow. An embodiment of a method of integration of a non... |
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2022
|
Invention
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Sonos ono stack scaling.
A method of scaling a nonvolatile trapped-charge memory device and the ... |
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Invention
|
Memory transistor with multiple charge storing layers and a high work function gate electrode. An... |
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|
Invention
|
Oxide-nitride-oxide stack having multiple oxynitride layers.
A semiconductor device including an... |
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Invention
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Gate fringing effect based channel formation for semiconductor device. A memory device is describ... |
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2021
|
Invention
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Oxide-nitride-oxide stack having multiple oxynitride layers. An embodiment of a semiconductor mem... |
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Invention
|
Memory transistor with multiple charge storing layers and a high work function gate electrode. Se... |
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2020
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Invention
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Sonos stack with split nitride memory layer. A semiconductor device and method of manufacturing t... |
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Invention
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Embedded sonos with triple gate oxide and manufacturing method of the same.
A method to integrat... |
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Invention
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Asymmetric pass field-effect transistor for nonvolatile memory. A method of performing an operati... |
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Invention
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Nonvolatile charge trap memory device having a high dielectric constant blocking region.
An embo... |
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Invention
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Radical oxidation process for fabricating a nonvolatile charge trap memory device.
A method for ... |
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2019
|
Invention
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Flash memory device and method. Semiconductor devices including non-volatile memory transistors a... |
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Invention
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Method of integrating a charge-trapping gate stack into a cmos flow. A method of fabricating a me... |
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Invention
|
Method of ono stack formation.
A method of controlling the thickness of gate oxides in an integr... |
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Invention
|
Asymmetric pass field-effect transistor for non-volatile memory. A method of performing an operat... |
|
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Invention
|
Embedded sonos with a high-k metal gate and manufacturing methods of the same. Semiconductor devi... |
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Invention
|
High voltage architecture for non-volatile memory.
A method of erasing, during an erase operatio... |
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Invention
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Bias scheme for word programming in non-volatile memory and inhibit disturb reduction.
A memory ... |
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Invention
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Oxide formation in a plasma process.
A memory transistor includes a gate electrode and a blockin... |
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Invention
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Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping ... |
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Invention
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Method of forming drain extended mos transistors for high voltage circuits.
A device including b... |
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Invention
|
Systems, methods, and apparatus for memory cells with common source lines.
A method for operatin... |
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2018
|
Invention
|
Method of ono stack formation. A method of controlling the thickness of gate oxides in an integra... |
|
|
Invention
|
Oxide formation in a plasma process. A memory transistor includes a gate electrode and a blocking... |
|
|
Invention
|
Embedded sonos with triple gate oxide and manufacturing method of the same. A method to integrate... |
|
|
Invention
|
Low standby power with fast turn on method for non-volatile memory devices. A method for driving ... |
|
|
Invention
|
Radical oxidation process for fabricating a nonvolatile charge trap memory device. A method for f... |
|
|
Invention
|
Sonos ono stack scaling. A method of scaling a nonvolatile trapped-charge memory device and the d... |
|
|
Invention
|
Bias scheme for word programming in non-volatile memory and inhibit disturb reduction. A memory d... |
|
2017
|
Invention
|
Embedded sonos with a high-k metal gate and manufacturing methods of the same.
Semiconductor dev... |
|
2015
|
Invention
|
Method of forming drain extended mos transistors for high voltage circuits. A device including bo... |
