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2023
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Invention
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Multiply-accumulate with configurable conversion between normalized and non-normalized floating-p... |
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Invention
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Multiply-accumulate engine with non-normalized floating-point accumulator.
A floating-point summ... |
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Invention
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Single-weight-multiple-data multiply-accumulate with winograd layers.
An integrated circuit devi... |
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Invention
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Single-weight-multiple-data matrix multiply.
An integrated circuit device includes one or more b... |
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Invention
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Multiply-accumulate pipelines for finite impulse response filtering.
An integrated circuit devic... |
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Invention
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Broadcast data multiply-accumulate with shared unload.
An integrated circuit device includes bro... |
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Invention
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Broadcast data, shared weight multiply-accumulate.
An integrated circuit device includes broadca... |
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Invention
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Broadcast data, shared weight multiply-accumulate. An integrated circuit device includes broadcas... |
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2022
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Invention
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Multiply-accumulate with variable floating point precision.
An integrated circuit including a mu... |
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Invention
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Multiply-accumulate with broadcast data. Multiply-accumulate processors within a tensor processin... |
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Invention
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Multiply-accumulate with broadcast data.
Multiply-accumulate processors within a tensor processi... |
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Invention
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Mac processing pipelines, circuitry to control and configure same, and methods of operating same.... |
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Invention
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Multiplier-accumulator circuitry, and processing pipeline including same.
An integrated circuit ... |
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Invention
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Mac processing pipeline having conversion circuitry, and methods of operating same.
An integrate... |
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Invention
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Multiplier-accumulator processing pipelines and processing component, and methods of operating sa... |
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Invention
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Ic including logic tile, having reconfigurable mac pipeline, and reconfigurable memory. An integr... |
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Invention
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Mac processing pipelines, circuitry to configure same, and methods of operating same. An integrat... |
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Invention
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Mac processing pipelines, circuitry to configure same, and methods of operating same.
An integra... |
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Invention
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Process of routing tile-to-tile interconnects of an fpga, and method of manufacturing an fpga. A ... |
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Invention
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Mac processing pipeline having activation circuitry, and methods of operating same. An integrated... |
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Invention
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Mac processing pipeline having activation circuitry, and methods of operating same.
An integrate... |
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2021
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Invention
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Multiplier circuit array, mac and mac pipeline including same, and methods of configuring same. A... |
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Invention
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Multiplier-accumulator circuitry having processing pipelines and methods of operating same. An in... |
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Invention
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Multiplier circuit array, mac and mac pipeline including same, and methods of configuring same.
... |
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Invention
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Configurable mac pipelines for finite-impulse-response filtering, and methods of operating same. ... |
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Invention
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Mac processing pipelines having programmable granularity, and methods of operating same. An integ... |
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Invention
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Multiplier-accumulator circuitry, and processing pipeline including same. An integrated circuit c... |
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Invention
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Multiplier-accumulator processing pipeline using filter weights having gaussian floating point da... |
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Invention
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Test circuitry and techniques for logic tiles of fpga. An integrated circuit comprising a field p... |
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2020
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Invention
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Logarithmic addition-accumulator circuitry, processing pipeline including same, and methods of op... |
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Invention
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Mac processing pipeline using filter weights having enhanced dynamic range, and methods of operat... |
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Invention
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Mac processing pipeline having conversion circuitry, and methods of operating same. An integrated... |
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Invention
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Multiplier-accumulator circuitry and pipeline using floating point data, and methods of using sam... |
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2019
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P/S
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Integrated circuit (IP) cores implementing embedded field programmable gate arrays (FPGAs) with c... |
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P/S
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Integrated circuits which operate as an neural network inference coprocessor, connecting to a sma... |
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Invention
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Fpga implementing partial datapath processing, and method of operating same. An integrated circui... |
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Invention
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Programmable/configurable logic circuitry, control circuitry and method of dynamic context switch... |
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2017
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P/S
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Integrated circuit cores; integrated circuit (IP) cores implementing embedded field programmable ... |
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2016
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P/S
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Integrated circuit (IP) cores implementing embedded field programmable gate arrays (FPGAs) with a... |
