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2022
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Invention
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Semiconductor device with reduced via resistance.
A semiconductor interconnect structure having ... |
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Invention
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Package-on-package assembly with wire bonds to encapsulation surface.
Apparatuses relating to a ... |
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Invention
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Two dimension material fin sidewall.
A semiconductor structure includes fins that have a 2D mate... |
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Invention
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Punch through stopper in bulk finfet device.
A method of forming a semiconductor device that inc... |
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Invention
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Forming self-aligned vias and air-gaps in semiconductor fabrication.
A semiconductor device incl... |
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Invention
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Selective removal of semiconductor fins.
An array of semiconductor fins is formed on a top surfa... |
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Invention
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Nanosheet field effect transistors with partial inside spacers.
A method of forming a nanosheet ... |
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Invention
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Selective gas etching for self-aligned pattern transfer.
Selective gas etching for self-aligned ... |
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Invention
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Hybrid-channel nano-sheet fets.
Semiconductor devices and methods of forming a first layer cap a... |
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Invention
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Selective recessing to form a fully aligned via.
A method of forming a semiconductor device havi... |
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2021
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Invention
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Copper interconnect structure with manganese barrier layer.
Low capacitance and high reliability... |
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Invention
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Advanced copper interconnects with hybrid microstructure.
A device relates to a semiconductor de... |
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Invention
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Forming a sacrificial liner for dual channel devices.
A semiconductor device includes one or mor... |
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Invention
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Finfet devices. FinFET devices and processes to prevent fin or gate collapse (e.g., flopover) in ... |
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Invention
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Forming nanosheet transistor using sacrificial spacer and inner spacers.
Fabricating a nanosheet... |
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Invention
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Two-color self-aligned double patterning (sadp) to yield static random access memory (sram) and d... |
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Invention
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Nanosheet channel-to-source and drain isolation. A method and structures are used to fabricate a ... |
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Invention
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Alternating hardmasks for tight-pitch line formation. A method for forming fins includes forming ... |
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Invention
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Semiconductor device including a porous dielectric layer, and method of forming the semiconductor... |
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Invention
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Self aligned pattern formation post spacer etchback in tight pitch configurations.
A method of f... |
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Invention
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Nanosheet transistor.
Inner and outer spacers for nanosheet transistors are formed using techniq... |
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Invention
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High density three-dimensional integrated capacitors.
A component includes a substrate and elect... |
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Invention
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Field effect transistor structures.
Field effect transistors include a stack of nanowires of ver... |
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Invention
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Fabrication of a vertical fin field effect transistor with reduced dimensional variations. A meth... |
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Invention
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Gate cut with integrated etch stop layer. A method of forming a power rail to semiconductor devic... |
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Invention
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Selective ild deposition for fully aligned via with airgap.
A method is presented forming a full... |
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Invention
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Structure and method to improve fav rie process margin and electromigration.
A method of forming... |
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Invention
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Semiconductor structures including middle-of-line (mol) capacitance reduction for self-aligned co... |
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Invention
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Semiconductor device with reduced via resistance. A semiconductor interconnect structure having a... |
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Invention
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Forming self-aligned vias and air-gaps in semiconductor fabrication. A semiconductor device inclu... |
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Invention
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Selective gas etching for self-aligned pattern transfer. Selective gas etching for self-aligned p... |
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Invention
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Minimizing shorting between finfet epitaxial regions. The present invention relates generally to ... |
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2020
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Invention
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Method and structure for forming dielectric isolated finfet with improved source/drain epitaxy. D... |
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Invention
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Selective recessing to form a fully aligned via. A method of forming a semiconductor device havin... |
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Invention
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Method of fabricating semiconductor fins by differentially oxidizing mandrel sidewalls. A method ... |
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Invention
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Package-on-package assembly with wire bonds to encapsulation surface. Apparatuses relating to a m... |
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Invention
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Self aligned replacement metal source/drain finfet.
A fin-shaped field effect transistor (finFET... |
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Invention
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Semiconductor interconnect structure with double conductors.
Embodiments are directed to a semic... |
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Invention
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Copper interconnect structure with manganese barrier layer. Low capacitance and high reliability ... |
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Invention
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Self-forming barrier for use in air gap formation. An etch back air gap (EBAG) process is provide... |
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Invention
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Nanosheet transistor. Inner and outer spacers for nanosheet transistors are formed using techniqu... |
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Invention
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Stacked transistors with different channel widths. A semiconductor device includes a first stack ... |
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Invention
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Selective ild deposition for fully aligned via with airgap. A method is presented forming a fully... |
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Invention
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Punch through stopper in bulk finfet device. A method of forming a semiconductor device that incl... |
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Invention
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Air gap spacer for metal gates. A method of forming a semiconductor device that includes forming ... |
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Invention
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Finfet gate cut after dummy gate removal. Semiconductor devices include a first semiconductor fin... |
