Advanced Micro Devices, Inc.

États‑Unis d’Amérique


 
Quantité totale PI 5 161
Quantité totale incluant filiales 6 149 (+ 1 519 pour les filiales)
Rang # Quantité totale PI 196
Note d'activité PI 4,1/5.0    3 189
Rang # Activité PI 191
Activité incl filiales 3,9/5.0    3 628
Symbole boursier
ISIN US0079031078
Capitalisation 99,999M  (USD)
Industrie Semiconductors
Secteur Technology
Classe Nice dominante Appareils et instruments scienti...

Brevets

Marques

3 710 68
0 36
1 302 1
44
 
Autres noms
  • AMD
Dernier brevet 2023 - Distributed geometry
Premier brevet 1972 - High capacity recirculating dela...
Dernière marque 2023 - AMD ADVANCED
Première marque 1981 - SQUARE DESIGN

Filiales

9 subsidiaries with IP (1479 patents, 40 trademarks)

32 subsidiaries without IP

 S'inscrire grtuitement pour accéder à la liste des filiales

Industrie (Classification de Nice)

Derniers inventions, produits et services

2023 P/S Accelerated data processors; accelerated video processors; downloadable audio and video graphics ...
Invention Distributed geometry. Systems, apparatuses, and methods for performing geometry work in parallel...
Invention Compiler directed fine grained power management. Systems, methods, devices, and computer-impleme...
Invention Accelerating neural networks with one shot skip layer pruning. Systems, methods, and devices for...
Invention Alternative protocol over physical layer. A link controller includes a Peripheral Component Inte...
Invention Platform power manager for rack level power and thermal constraints. Platform power management i...
Invention Memory calibration system and method. A method for performing stutter of dynamic random access m...
Invention Pipeline delay elimination with parallel two level primitive batch binning. A technique for rende...
Invention Device and method for efficient transitioning to and from reduced power state. A processing devi...
Invention Dynamic cache bypass for power savings. A technique for operating a cache is disclosed. The techn...
Invention Method and apparatus for a page-local delta-based prefetcher. A method includes recording a firs...
P/S Downloadable computer software for media and design content creation; downloadable computer softw...
Invention Suppressing cache line modification. Disclosed is a system and method for use in a cache for sup...
P/S Semiconductor devices; semiconductor chips; semiconductors; integrated circuits; integrated circu...
Invention Real time workload-based system adjustment. Real time workload-based system adjustment is describ...
Invention Method and apparatus for controlling cache line storage in cache memory. A method and apparatus ...
Invention Method and apparatus of integrating memory stacks. An apparatus and method for performing memory...
Invention Cross-chiplet performance data streaming. Methods and systems are disclosed for cross-chiplet per...
Invention Core activation and deactivation for a multi-core processor. Core activation and deactivation for...
P/S semiconductor chips; semiconductor devices; semiconductors; accelerated data processors; accelera...
2022 Invention Pipeline delay elimination with parallel two level primitive batch binning. A technique for rend...
P/S Semiconductors; Integrated Circuits; multi-core heterogeneous compute platforms; field programmab...
P/S Semiconductors; Integrated Circuits; multi-core heterogeneous compute platforms; field programma...
P/S Integrated circuits; programmable integrated circuits; integrated circuits in the nature of integ...
Invention Mixed signal feedback design for verification. Techniques for implementing a mixed signal feedba...
Invention Method and apparatus for performing high speed parallel locally order clustering for a bounding v...
Invention Write hardware training acceleration. A memory includes a link training circuit with a pseudo-ran...
Invention Split-scan sense amplifier flip-flop. A method includes generating a functional clock signal, a s...
P/S Semiconductors; Integrated Circuits; multi-core heterogeneous computer hardware platforms; field ...
Invention Sharing package pins in a multi-chip module (mcm). A semiconductor package includes multiple die...
Invention Approach for skipping near-memory processing commands. An approach is provided for skipping, i.e...
Invention Performing operations for handling data using processor in memory circuitry in a high bandwidth m...
Invention Real time profile switching for memory overclocking. Profile switching for memory overclocking i...
Invention Real time workload-based system adjustment. Real time workload-based system adjustment is descri...
Invention Identifying memory system sensitivity to timing parameters. Various timing parameter values for ...
Invention Dynamic cache bypass for power savings. A technique for operating a cache is disclosed. The tech...
P/S Integrated circuits, namely, graphics, video and multimedia integrated circuits; integrated circu...
Invention Memory bit cell with homogeneous layout pattern of base layers for high density memory macros. A...
Invention Design of an integrated circuit using multiple and different process corners. A system and metho...
Invention Reducing probe filter accesses for processing in memory requests. Systems, apparatuses, and meth...
Invention Memory encryption. A memory controller includes encryption circuits for encrypting write data to...
Invention Cross-chiplet performance data streaming. Methods and systems are disclosed for cross-chiplet pe...
Invention Detecting personal-space violations in artificial intelligence based non-player characters. Syst...
Invention Object distance estimation with camera lens focus calibration. Systems, apparatuses, and methods...
Invention Using a hardware-based controller for power state management. Methods and systems are disclosed ...
Invention Managing large tage histories. A tagged geometric (TAGE) branch predictor for managing large TAG...
Invention Enforcing consistency across redundant tagged geometric (tage) branch histories. Enforcing consi...
Invention Dynamic register renaming in hardware to reduce bank conflicts in parallel processor architecture...
Invention Fusing no-op (nop) instructions. A method of fusing no-op (NOP) instructions includes receiving ...
Invention Hybrid parallelized tagged geometric (tage) branch prediction. Hybrid parallelized tagged geomet...
Invention Core activation and deactivation for a multi-core processor. Core activation and deactivation fo...
Invention Lid carveouts for processor lighting. Package lids with carveouts configured to expose lights di...
Invention User configurable hardware settings for overclocking. User configurable hardware settings for ov...
Invention Lid carveouts for processor connection and alignment. Package lids with carveouts configured for...
Invention Electronic device including dies and an interconnect coupled to the dies and processes of forming...
Invention Error-tolerant memory system for machine learning systems. A memory system uses error detection ...
Invention Page swapping to protect memory devices. A page swapping memory protection system tracks accesse...
P/S Integrated circuit chip sets; cards containing integrated circuits; integrated circuit chips; sem...
P/S Integrated circuit chip sets; cards containing integrated circuits; integrated circuit chips; s...
P/S Downloadable computer software development tools and utilities; downloadable open source software...
2021 P/S Accelerated data processors; accelerated video processors; audio and video graphics for real time...
P/S Downloadable computer software development tools and downloadable software utilities for high-res...
P/S Downloadable computer software, namely, proprietary implementation of software stack and applicat...
P/S Semiconductor chips; semiconductor devices; semiconductors; accelerated data processors; accelera...
P/S Semiconductor devices; semiconductor chips; semiconductors; computer hardware; microprocessor mod...
P/S Platform as a service (PAAS) featuring computer software platforms for purchasing computing power...
P/S Computer servers; computer hardware for use in proxying and managing communications between local...
P/S Computer servers; computer hardware for use in managing network-enabled devices and Internet-of-T...
P/S Downloadable computer software, namely, being a proprietary implementation of downloadable softwa...
2020 P/S Computer hardware; Recorded computer software; Downloadable computer software; Recorded computer ...
2019 Invention Protection against branch target buffer poisoning by a management layer. A processing system incl...
Invention Performing store-to-load forwarding of a return address for a return instruction. A load/store un...