|
2023
|
Invention
|
System-on-chip having multiple circuits and memory controller in separate and independent power d... |
|
|
Invention
|
Spatial distribution in a 3d data processing unit.
The embodiments herein describe a 3D SmartNIC... |
|
|
Invention
|
Routing network using global address map with adaptive main memory expansion for a plurality of h... |
|
|
Invention
|
Multi-die integrated circuit with data processing engine array.
An integrated circuit includes a... |
|
|
Invention
|
Adaptive integrated programmable device platform.
A System-on-Chip includes a data processing en... |
|
|
Invention
|
Network-on-chip architecture for handling different data sizes. An integrated circuit (IC) includ... |
|
|
Invention
|
Secure shell and role isolation for multi-tenant compute. Embodiments herein describe a SoC with ... |
|
|
Invention
|
Wrapping non-safety compliant hardware resources with error detection checking to satisfy a safet... |
|
2022
|
Invention
|
Voltage sensing and biasing for wide supply range integrated circuit transceivers. A disclosed ci... |
|
|
Invention
|
Circuit simulation based on an rtl component in combination with behavioral components.
Methods ... |
|
|
Invention
|
Lock-stepping asynchonous logic.
Methods and systems to detect a metastable condition and suppre... |
|
|
Invention
|
Data processing array interface having interface tiles with multiple direct memory access circuit... |
|
|
Invention
|
Network-on-chip architecture for handling different data sizes.
An integrated circuit (IC) inclu... |
|
|
Invention
|
Blockchain machine broadcast protocol with loss recovery.
The embodiments herein describe a comm... |
|
|
Invention
|
Integrated circuit chip testing interface with reduced signal wires.
An integrated circuit (IC) ... |
|
|
Invention
|
Framework for system simulation using multiple simulators.
A simulation framework is capable mod... |
|
|
Invention
|
Deadlock detection and prevention for routing packet-switched nets in electronic systems.
Routin... |
|
|
Invention
|
Blockchain machine compute acceleration engine with out-of-order support.
Embodiments herein des... |
|
|
Invention
|
High-throughput regular expression processing using an integrated circuit.
A system includes a m... |
|
|
Invention
|
High-throughput regular expression processing with capture using an integrated circuit. A system ... |
|
|
Invention
|
Adaptive block processor for blockchain machine compute acceleration engine.
Embodiments herein ... |
|
|
Invention
|
High-throughput regular expression processing with path priorities using an integrated circuit.
... |
|
|
Invention
|
Coupled loop and void structure integrated in a redistribution layer of a chip package.
Disclose... |
|
|
Invention
|
Predicting a performance metric based on features of a circuit design and explaining marginal con... |
|
|
Invention
|
Multiple partitions in a data processing array.
An apparatus includes a data processing array ha... |
|
|
Invention
|
Chip package with integrated current control.
A chip package and method for fabricating the same... |
|
|
Invention
|
Secure shell and role isolation for multi-tenant compute.
Embodiments herein describe a SoC with... |
|
|
Invention
|
Time-division multiplexing (tdm) in integrated circuits for routability and runtime enhancement. ... |
|
|
Invention
|
Low-latency time-to-digital converter with reduced quantization step.
Methods and apparatus for ... |
|
|
Invention
|
Method of testing structures and stacking wafers.
Disclosed herein are integrated circuit (IC) s... |
|
|
Invention
|
Efficiency and quality of service improvements for systems with higher bandwidth clients mixed wi... |
|
|
Invention
|
Arbitration of commands between non-volatile memory storage and remote hosts.
An integrated circ... |
|
|
Invention
|
Static and automatic inference of inter-basic block burst transfers for high-level synthesis. Sta... |
|
|
Invention
|
Programmable non-linear activation engine for neural network acceleration.
A programmable, non-l... |
|
|
Invention
|
Receiver circuitry having a transistor pair for input voltage clipping.
Receiver circuitry for a... |
|
|
Invention
|
Method and system for building hardware images from heterogeneous designs for eletronic systems. ... |
|
|
Invention
|
Selection of full or incremental implementation flows in processing circuit designs.
A machine l... |
|
|
Invention
|
Flexible queue provisioning for partitioned acceleration device.
Embodiments herein describe wra... |
|
|
Invention
|
Method for supporting multiple concurrent plugins in a programmable integrated circuit.
Techniqu... |
|
|
Invention
|
Expansion card with mezzanine level connector. An expansion card having a mezzanine level communi... |
|
|
P/S
|
Semiconductor memory; flexible memory block for semiconductor devices |
|
2021
|
Invention
|
Chip bump interface compatible with different orientations and types of devices. Embodiments here... |
|
|
Invention
|
Wafer-scale large programmable device. The embodiments herein rely on cross reticle wires (also r... |
|
|
Invention
|
Command pattern sequencer for memory calibration. In one example, a command pattern sequencer inc... |
|
|
Invention
|
Lossless compression using subnormal floating point values. A disclosed compression method includ... |
|
2020
|
Invention
|
Data flow graph refinement using range set information for improved synthesis. Implementing a cir... |
|
|
Invention
|
Compaction of multiplier and adder circuits. Approaches for logic compaction include inputting an... |
|
|
P/S
|
System on module, namely, integrated board-level circuits that integrate a system function in a s... |
|
|
P/S
|
System on module, namely, a board-level circuit that
integrates a system function in a single mo... |
|
2019
|
Invention
|
Markov decision process based recipe generation for multi-chip apparatus. Examples described here... |
|
|
P/S
|
Downloadable computer software platform for the design, programming and operation of integrated c... |
|
|
P/S
|
Downloadable computer software platform for the design,
programming and operation of integrated ... |
|
|
P/S
|
Integrated circuits and semiconductors; computer accelerator
boards; computer accelerator cards;... |
|
|
P/S
|
Integrated circuits; integrated circuits in the nature of
integrated multi-core heterogeneous co... |
|
2018
|
Invention
|
Identifying alignment markers using partial correlators. Methods and apparatus for detecting alig... |
|
|
P/S
|
Integrated circuits and semiconductors; computer accelerator boards; computer accelerator cards; ... |
|
|
P/S
|
Integrated circuits; integrated circuits in the nature of integrated multi-core heterogeneous com... |
|
|
P/S
|
Computer accelerator boards; computer accelerator cards; computing memory modules; computer add-i... |
|
2017
|
P/S
|
Computer software for implementing a network protocol stack, not for use in testing website funct... |
|
|
P/S
|
Cards with integrated circuits; Computer network adapters; Computer network interface devices; Et... |
|
|
P/S
|
Computer software and hardware for monitoring and securing network data, enable multiple services... |
|
|
P/S
|
Computer hardware, wide-area computer networks hardware, peer-to-peer computer networks hardware,... |
|
|
P/S
|
Computer software for providing active protection for network servers and network adapters using ... |
|
2015
|
P/S
|
Semiconductors; integrated circuits; programmable logic integrated circuits; field programmable g... |
|
|
P/S
|
Technical consultation in the field of engineering of semiconductors, integrated circuits, progra... |
|
|
P/S
|
Computer software for design, programming, and operation of integrated circuits |
|
|
P/S
|
Computer software for design, programming, and operation of integrated circuits. |
|
|
P/S
|
Computer software for design, programming, and operation of
integrated circuits. |
|
2012
|
P/S
|
Computer software systems for packet recordation or storage, time-stamping, time synchronization,... |
|
2011
|
P/S
|
Computer hardware, namely, integrated circuits; integrated circuit, namely, field programmable ga... |
|
|
P/S
|
Computer hardware, namely, integrated circuits; integrated
circuit, namely, field programmable g... |
|
|
P/S
|
Computer software for design, programming, and operation of programmable gate arrays. |
|
|
P/S
|
Integrated circuits, namely, field programmable gate arrays;
computer software for design, progr... |
|
2010
|
P/S
|
Computer software for implementing network communications, computer software used to accelerate n... |
|
|
P/S
|
Computer software; computer software which implements a network protocol stack. |
|
|
P/S
|
Integrated circuits, namely field programmable gate arrays; computer software for design, program... |
|
|
P/S
|
Computer software for design, programming, and operation of programmable gate arrays |
|
|
P/S
|
Integrated circuits, namely, field programmable gate arrays [ ; computer software for design, pro... |
|
|
P/S
|
Integrated circuits, namely field-programmable gate arrays. |
|
|
P/S
|
Integrated circuits, namely field programmable gate arrays;
computer software for design, progra... |
|
|
P/S
|
Integrated circuits; field programmable gate arrays; computer software for the design, programmin... |
|
|
P/S
|
Integrated circuits, namely, field programmable gate arrays |
|
|
P/S
|
Integrated circuits; field programmable gate arrays;
computer software for the design, programmi... |
|
|
P/S
|
Integrated circuits; Integrated circuits in the nature of field programmable gate arrays |
|
2009
|
P/S
|
Data processing equipment and computers; computer hardware and firmware; computer software; compu... |
|
2007
|
P/S
|
Computer hardware, namely, integrated circuits, semiconductors, computer cables, printed circuit ... |
