METHODS AND APPARATUS TO EMBED HOST DIES IN A SUBSTRATE
| Register | USPTO Patent |
|---|---|
| Application Number | 17480953 |
| Status | Pending |
| Filing Date | 2021-09-21 |
| First Publication Date | 2023-03-23 |
| Publication Date | 2023-03-23 |
| Owner | Intel Corporation (USA) |
| Inventor |
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Abstract
Methods and apparatus to embed host dies in a substrate are disclosed An apparatus includes a first die having a first side and a second side opposite the first side. The first side includes a first contact to be electrically coupled with a second die. The second side includes a second contact. The apparatus further includes a substrate including a metal layer and a dielectric material on the metal layer. The first die is encapsulated within the dielectric material. The second contact of the first die is bonded to the metal layer independent of an adhesive.IPC Classes ?
- H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
- H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups