GLASS CORE SUBSTRATE INCLUDING BUILDUPS WITH DIFFERENT NUMBERS OF LAYERS
|First Publication Date||2023-03-23|
|Owner||Intel Corporation (USA)|
AbstractEmbodiments described herein may be related to apparatuses, processes, and techniques directed to glass core-based substrates with an asymmetric number of front and back-side copper layers. In embodiments, the front and/or backside copper layers may be referred to as stack ups or as buildup layers on the glass core substrate. Embodiments may allow lower overall substrate layer counts by allowing for more front side layers where the signal routing may typically be highest, without requiring a matching, or symmetric, number of backside copper layers. Other embodiments may be described and/or claimed.
IPC Classes ?
- H01L 23/498 - Leads on insulating substrates
- H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups