FAN OUT PACKAGE AND METHODS
|First Publication Date||2023-03-23|
|Owner||Intel Corporation (USA)|
AbstractA semiconductor device and method is disclosed. Devices shown include a die coupled to an integrated routing layer, wherein the integrated routing layer includes a first width that is wider than the die. Devices shown further included a molded routing layer coupled to the integrated routing layer.
IPC Classes ?
- H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
- H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
- H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
- H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L 21/66 - Testing or measuring during manufacture or treatment
- H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices