|
G11C 5/00
|
STATIC STORES - Details of stores covered by group |
|
G11C 5/02
|
Disposition of storage elements, e.g. in the form of a matrix array |
|
G11C 5/04
|
Supports for storage elements; Mounting or fixing of storage elements on such supports |
|
G11C 5/05
|
Supporting of cores in matrix |
|
G11C 5/06
|
Arrangements for interconnecting storage elements electrically, e.g. by wiring |
|
G11C 5/08
|
Arrangements for interconnecting storage elements electrically, e.g. by wiring for interconnecting magnetic elements, e.g. toroidal cores |
|
G11C 5/10
|
Arrangements for interconnecting storage elements electrically, e.g. by wiring for interconnecting capacitors |
|
G11C 5/12
|
Apparatus or processes for interconnecting storage elements, e.g. for threading magnetic cores |
|
G11C 5/14
|
Power supply arrangements |
|
G11C 7/00
|
Arrangements for writing information into, or reading information out from, a digital store |
|
G11C 7/02
|
Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals |
|
G11C 7/04
|
Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects |
|
G11C 7/06
|
Sense amplifiers; Associated circuits |
|
G11C 7/08
|
Control thereof |
|
G11C 7/10
|
Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers |
|
G11C 7/12
|
Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines |
|
G11C 7/14
|
Dummy cell management; Sense reference voltage generators |
|
G11C 7/16
|
Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters |
|
G11C 7/18
|
Bit line organisation; Bit line lay-out |
|
G11C 7/20
|
Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory |
|
G11C 7/22
|
Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management |
|
G11C 7/24
|
Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells |
|
G11C 8/00
|
Arrangements for selecting an address in a digital store |
|
G11C 8/02
|
Arrangements for selecting an address in a digital store using selecting matrix |
|
G11C 8/04
|
Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter |
|
G11C 8/06
|
Address interface arrangements, e.g. address buffers |
|
G11C 8/08
|
Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines |
|
G11C 8/10
|
Decoders |
|
G11C 8/12
|
Group selection circuits, e.g. for memory block selection, chip selection, array selection |
|
G11C 8/14
|
Word line organisation; Word line lay-out |
|
G11C 8/16
|
Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups |
|
G11C 8/18
|
Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals |
|
G11C 8/20
|
Address safety or protection circuits, i.e. arrangements for preventing unauthorized or accidental access |
|
G11C 11/00
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor |
|
G11C 11/02
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements |
|
G11C 11/04
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using storage elements having cylindrical form, e.g. rod, wire |
|
G11C 11/06
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using multi-aperture plates in which each individual aperture forms a storage element |
|
G11C 11/08
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using plates incorporating several individual multi-aperture storage elements |
|
G11C 11/10
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using multi-axial storage elements |
|
G11C 11/12
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using twistors, i.e. elements in which one axis of magnetisation is twisted |
|
G11C 11/14
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements |
|
G11C 11/15
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers |
|
G11C 11/16
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect |
|
G11C 11/18
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using Hall-effect devices |
|
G11C 11/19
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using non-linear reactive devices in resonant circuits |
|
G11C 11/20
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using non-linear reactive devices in resonant circuits using parametrons |
|
G11C 11/21
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements |
|
G11C 11/22
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements |
|
G11C 11/23
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using electrostatic storage on a common layer, e.g. Forrester-Haeff tubes |
|
G11C 11/24
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using capacitors |
|
G11C 11/26
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using discharge tubes |
|
G11C 11/28
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using discharge tubes using gas-filled tubes |
|
G11C 11/30
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using discharge tubes using vacuum tubes |
|
G11C 11/34
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices |
|
G11C 11/35
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices with charge storage in a depletion layer, e.g. charge coupled devices |
|
G11C 11/36
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using diodes, e.g. as threshold elements |
|
G11C 11/38
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using diodes, e.g. as threshold elements using tunnel diodes |
|
G11C 11/39
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using thyristors |
|
G11C 11/40
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors |
|
G11C 11/41
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger |
|
G11C 11/42
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled |
|
G11C 11/44
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using super-conductive elements, e.g. cryotron |
|
G11C 11/46
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using thermoplastic elements |
|
G11C 11/48
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using displaceable coupling elements, e.g. ferromagnetic cores, to produce change between different states of mutual or self-inductance |
|
G11C 11/50
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using actuation of electric contacts to store the information |
|
G11C 11/52
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using actuation of electric contacts to store the information using electromagnetic relays |
|
G11C 11/54
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron |
|
G11C 11/56
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency |
|
G11C 11/061
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using multi-aperture plates in which each individual aperture forms a storage element using elements with single aperture or magnetic loop for storage, one element per bit, and for destructive read-out |
|
G11C 11/063
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using multi-aperture plates in which each individual aperture forms a storage element using elements with single aperture or magnetic loop for storage, one element per bit, and for destructive read-out bit-organized, such as, 2L/2D-, 3D-organization, i.e. for selection of an element by means of at least two coincident partial currents both for reading and for writing |
|
G11C 11/065
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using multi-aperture plates in which each individual aperture forms a storage element using elements with single aperture or magnetic loop for storage, one element per bit, and for destructive read-out word-organized, such as 2D-organization, or linear selection, i.e. for selection of all the elements of a word by means of a single full current for reading |
|
G11C 11/067
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using multi-aperture plates in which each individual aperture forms a storage element using elements with single aperture or magnetic loop for storage, one element per bit, and for non-destructive read-out |
|
G11C 11/155
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements with cylindrical configuration |
|
G11C 11/401
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells |
|
G11C 11/402
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh |
|
G11C 11/403
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh |
|
G11C 11/404
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell |
|
G11C 11/405
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell |
|
G11C 11/406
|
Management or control of the refreshing or charge-regeneration cycles |
|
G11C 11/407
|
Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type |
|
G11C 11/408
|
Address circuits |
|
G11C 11/409
|
Read-write [R-W] circuits |
|
G11C 11/411
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only |
|
G11C 11/412
|
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only |
|
G11C 11/413
|
Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction |
|
G11C 11/414
|
Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type |
|
G11C 11/415
|
Address circuits |
|
G11C 11/416
|
Read-write [R-W] circuits |
|
G11C 11/417
|
Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type |
|
G11C 11/418
|
Address circuits |
|
G11C 11/419
|
Read-write [R-W] circuits |
|
G11C 11/4063
|
Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing |
|
G11C 11/4067
|
Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the bipolar type |
|
G11C 11/4072
|
Circuits for initialization, powering up or down, clearing memory or presetting |
|
G11C 11/4074
|
Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits |
|
G11C 11/4076
|
Timing circuits |
|
G11C 11/4078
|
Safety or protection circuits, e.g. for preventing inadvertent or unauthorised reading or writing; Status cells; Test cells |
|
G11C 11/4091
|
Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating |
|
G11C 11/4093
|
Input/output [I/O] data interface arrangements, e.g. data buffers |
|
G11C 11/4094
|
Bit-line management or control circuits |
|
G11C 11/4096
|
Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches |
|
G11C 11/4097
|
Bit-line organisation, e.g. bit-line layout, folded bit lines |
|
G11C 11/4099
|
Dummy cell treatment; Reference voltage generators |
|
G11C 11/4193
|
Auxiliary circuits specific to particular types of semiconductor storage devices, e.g. for addressing, driving, sensing, timing, power supply, signal propagation |
|
G11C 11/4195
|
Address circuits |
|
G11C 11/4197
|
Read-write [R-W] circuits |
|
G11C 13/00
|
Digital stores characterised by the use of storage elements not covered by groups , , or |
|
G11C 13/02
|
Digital stores characterised by the use of storage elements not covered by groups , , or using elements whose operation depends upon chemical change |
|
G11C 13/04
|
Digital stores characterised by the use of storage elements not covered by groups , , or using optical elements |
|
G11C 13/06
|
Digital stores characterised by the use of storage elements not covered by groups , , or using optical elements using magneto-optical elements |
|
G11C 14/00
|
Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down |
|
G11C 15/00
|
Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores |
|
G11C 15/02
|
Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using magnetic elements |
|
G11C 15/04
|
Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements |
|
G11C 15/06
|
Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using cryogenic elements |
|
G11C 16/00
|
Erasable programmable read-only memories |
|
G11C 16/02
|
Erasable programmable read-only memories electrically programmable |
|
G11C 16/04
|
Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS |
|
G11C 16/06
|
Auxiliary circuits, e.g. for writing into memory |
|
G11C 16/08
|
Address circuits; Decoders; Word-line control circuits |
|
G11C 16/10
|
Programming or data input circuits |
|
G11C 16/12
|
Programming voltage switching circuits |
|
G11C 16/14
|
Circuits for erasing electrically, e.g. erase voltage switching circuits |
|
G11C 16/16
|
Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups |
|
G11C 16/18
|
Circuits for erasing optically |
|
G11C 16/20
|
Initialising; Data preset; Chip identification |
|
G11C 16/22
|
Safety or protection circuits preventing unauthorised or accidental access to memory cells |
|
G11C 16/24
|
Bit-line control circuits |
|
G11C 16/26
|
Sensing or reading circuits; Data output circuits |
|
G11C 16/28
|
Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells |
|
G11C 16/30
|
Power supply circuits |
|
G11C 16/32
|
Timing circuits |
|
G11C 16/34
|
Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention |
|
G11C 17/00
|
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards |
|
G11C 17/02
|
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using magnetic or inductive elements |
|
G11C 17/04
|
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using capacitive elements |
|
G11C 17/06
|
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using diode elements |
|
G11C 17/08
|
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements |
|
G11C 17/10
|
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM |
|
G11C 17/12
|
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices |
|
G11C 17/14
|
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM |
|
G11C 17/16
|
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links |
|
G11C 17/18
|
Auxiliary circuits, e.g. for writing into memory |
|
G11C 19/00
|
Digital stores in which the information is moved stepwise, e.g. shift registers |
|
G11C 19/02
|
Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements |
|
G11C 19/04
|
Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using cores with one aperture or magnetic loop |
|
G11C 19/06
|
Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using structures with a number of apertures or magnetic loops, e.g. transfluxors |
|
G11C 19/08
|
Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure |
|
G11C 19/10
|
Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements with twistors |
|
G11C 19/12
|
Digital stores in which the information is moved stepwise, e.g. shift registers using non-linear reactive devices in resonant circuits |
|
G11C 19/14
|
Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements in combination with active elements, e.g. discharge tubes, semiconductor elements |
|
G11C 19/18
|
Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages |
|
G11C 19/20
|
Digital stores in which the information is moved stepwise, e.g. shift registers using discharge tubes |
|
G11C 19/28
|
Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements |
|
G11C 19/30
|
Digital stores in which the information is moved stepwise, e.g. shift registers using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled |
|
G11C 19/32
|
Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements |
|
G11C 19/34
|
Digital stores in which the information is moved stepwise, e.g. shift registers using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency |
|
G11C 19/36
|
Digital stores in which the information is moved stepwise, e.g. shift registers using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using semiconductor elements |
|
G11C 19/38
|
Digital stores in which the information is moved stepwise, e.g. shift registers two-dimensional, e.g. horizontal and vertical shift registers |
|
G11C 21/00
|
Digital stores in which the information circulates |
|
G11C 21/02
|
Digital stores in which the information circulates using electromechanical delay lines, e.g. using a mercury tank |
|
G11C 23/00
|
Digital stores characterised by movement of mechanical parts to effect storage, e.g. using balls; Storage elements therefor |
|
G11C 25/00
|
Digital stores characterised by the use of flowing media; Storage elements therefor |
|
G11C 27/00
|
Electric analogue stores, e.g. for storing instantaneous values |
|
G11C 27/02
|
Sample-and-hold arrangements |
|
G11C 27/04
|
Shift registers |
|
G11C 29/00
|
Checking stores for correct operation; Testing stores during standby or offline operation |
|
G11C 29/02
|
Detection or location of defective auxiliary circuits, e.g. defective refresh counters |
|
G11C 29/04
|
Detection or location of defective memory elements |
|
G11C 29/06
|
Acceleration testing |
|
G11C 29/08
|
Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing |
|
G11C 29/10
|
Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns |
|
G11C 29/12
|
Built-in arrangements for testing, e.g. built-in self testing [BIST] |
|
G11C 29/14
|
Implementation of control logic, e.g. test mode decoders |
|
G11C 29/16
|
Implementation of control logic, e.g. test mode decoders using microprogrammed units, e.g. state machines |
|
G11C 29/18
|
Address generation devices; Devices for accessing memories, e.g. details of addressing circuits |
|
G11C 29/20
|
Address generation devices; Devices for accessing memories, e.g. details of addressing circuits using counters or linear-feedback shift registers [LFSR] |
|
G11C 29/22
|
Accessing serial memories |
|
G11C 29/24
|
Accessing extra cells, e.g. dummy cells or redundant cells |
|
G11C 29/26
|
Accessing multiple arrays |
|
G11C 29/28
|
Dependent multiple arrays, e.g. multi-bit arrays |
|
G11C 29/30
|
Accessing single arrays |
|
G11C 29/32
|
Serial access; Scan testing |
|
G11C 29/34
|
Accessing multiple bits simultaneously |
|
G11C 29/36
|
Data generation devices, e.g. data inverters |
|
G11C 29/38
|
Response verification devices |
|
G11C 29/40
|
Response verification devices using compression techniques |
|
G11C 29/42
|
Response verification devices using error correcting codes [ECC] or parity check |
|
G11C 29/44
|
Indication or identification of errors, e.g. for repair |
|
G11C 29/46
|
Test trigger logic |
|
G11C 29/48
|
Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths |
|
G11C 29/50
|
Marginal testing, e.g. race, voltage or current testing |
|
G11C 29/52
|
Protection of memory contents; Detection of errors in memory contents |
|
G11C 29/54
|
Arrangements for designing test circuits, e.g. design for test [DFT] tools |
|
G11C 29/56
|
External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor |
|
G11C 99/00
|
Subject matter not provided for in other groups of this subclass |
