Cirrus Logic, Inc.

United States of America

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        Patent 1,778
        Trademark 27
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[Owner] Cirrus Logic, Inc. 1,719
Wolfson Microelectronics plc 74
Acoustic Technologies, Inc. 7
Wolfson Dynamic Hearing Pty Ltd 5
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2024 January 1
2023 December 1
2024 (YTD) 1
2023 44
2022 140
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IPC Class
H04R 3/00 - Circuits for transducers 291
G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase 164
H04R 29/00 - Monitoring arrangements; Testing arrangements 156
H03F 3/217 - Class D power amplifiers; Switching amplifiers 143
H04R 1/10 - Earpieces; Attachments therefor 126
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09 - Scientific and electric apparatus and instruments 24
40 - Treatment of materials; recycling, air and water treatment, 4
35 - Advertising and business services 2
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1.

Feed-forward adaptive noise-canceling with dynamic filter selection based on classifying acoustic environment

      
Application Number 17858771
Grant Number 11948546
Status In Force
Filing Date 2022-07-06
First Publication Date 2024-01-11
Grant Date 2024-04-02
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Ebenezer, Samuel P.
  • Kerkoud, Rachid

Abstract

An adaptive noise-canceling system generates an anti-noise signal from a noise reference signal with a feed-forward filter that filters the noise reference signal to produce the anti-noise signal. The feed-forward filter has a first response controlled by a set of first coefficients. The adaptive noise-canceling system includes a measurement subsystem for measuring a characteristic of an acoustic environment of the adaptive noise-canceling system, a classifier for classifying the characteristic of the acoustic environment by analyzing an output of the measurement subsystem, and a controller that provides the set of first coefficients to the feed-forward filter in conformity with an output of the classifier. The controller may include a look-up table for providing sets of values of the first coefficients to the feed-forward filter in conformity with an indication provided from the classifier and corresponding to a classification of the characteristic of the acoustic environment of the adaptive noise-canceling system.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 1/10 - Earpieces; Attachments therefor

2.

Systems and methods for context-dependent multicore interrupt facilitation

      
Application Number 17982916
Grant Number 11846973
Status In Force
Filing Date 2022-11-08
First Publication Date 2023-12-19
Grant Date 2023-12-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Deo, Sachin
  • Djadi, Younes
  • Hemkumar, Nariankadu D.
  • Li, Junsong
  • Shum, Wai-Shun
  • Weller, Franz

Abstract

A multicore processor may include a plurality of cores including at least a first core and a second core, a shared peripheral comprising a plurality of interrupt register banks including at least a first interrupt register bank dedicated to the first core and a second interrupt register bank dedicated to the second core, and a plurality of communications bridges, including at least a first bridge interfaced between the first core and the shared peripheral and at least a second bridge interfaced between the second core and the shared peripheral. The first core may be configured to program the first interrupt register bank via the first bridge to configure the shared peripheral for access by the first core. The second core may be configured to program the second interrupt register bank via the second bridge to configure the shared peripheral for access by the second core.

IPC Classes  ?

  • G06F 13/10 - Program control for peripheral devices
  • G06F 13/24 - Handling requests for interconnection or transfer for access to input/output bus using interrupt

3.

Concurrent audio and haptics from a single mechanical transducer

      
Application Number 16592164
Grant Number 11812218
Status In Force
Filing Date 2019-10-03
First Publication Date 2023-11-07
Grant Date 2023-11-07
Owner Cirrus Logic Inc. (USA)
Inventor
  • Clarkin, Philip
  • Tyagi, Itisha
  • Lau, Kaichow

Abstract

A system may include a vibrating surface, a single mechanical transducer mechanically coupled to the vibrating surface, a signal processing subsystem configured to receive an audio signal and a haptic signal, process the audio signal and the haptic signal to generate a combined audio-haptic signal, and drive the combined audio-haptic signal to the single mechanical transducer in order to generate concurrent audio playback and haptic effects on the vibrating surface; and a control subsystem configured to, responsive to a haptic stimulus, modify at least one parameter of at least one of the audio signal and the haptic signal to accommodate the concurrent audio playback and haptic effects on the vibrating surface within at least one operational limit of the system.

IPC Classes  ?

  • H04R 1/28 - Transducer mountings or enclosures designed for specific frequency response; Transducer enclosures modified by provision of mechanical or acoustic impedances, e.g. resonator, damping means
  • H04R 9/06 - Loudspeakers
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/16 - Sound input; Sound output

4.

Calibration of pulse width modulation amplifier system

      
Application Number 17720869
Grant Number 11855592
Status In Force
Filing Date 2022-04-14
First Publication Date 2023-10-19
Grant Date 2023-12-26
Owner Cirrus Logic Inc. (USA)
Inventor Melanson, John L

Abstract

A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output and include a calibration system. The calibration system may be configured to force the input of the analog integrator to a fixed known input value, force the amplifier output to a fixed known duty cycle, measure an analog signal generated at the output of the analog integrator in response to forcing the input of the analog integrator to the fixed value, determine an offset of the switched mode amplifier system based on the analog signal, and correct for the offset.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03F 3/181 - Low-frequency amplifiers, e.g. audio preamplifiers

5.

Hybrid power converter with two-phase control of flying capacitor balancing

      
Application Number 17707092
Grant Number 11949332
Status In Force
Filing Date 2022-03-29
First Publication Date 2023-10-05
Grant Date 2024-04-02
Owner Cirrus Logic Inc. (USA)
Inventor Lim, Changjong

Abstract

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a first power converter branch comprising a first capacitor, a first switch network, and a first inductor, the first switch network arranged to selectably couple the first capacitor between an input voltage, a first reference voltage, and a first terminal of the first inductor, wherein a second terminal of the first inductor is coupled to an output node; a second power converter branch comprising a second capacitor, a second switch network, and a second inductor, the second switch network arranged to selectably couple the second capacitor between the input voltage, a second reference voltage, and a first terminal of the second inductor, wherein a second terminal of the second inductor is coupled to the output node; and a third switch network between the first power converter branch and the second power converter branch, wherein the third switch network is arranged to selectably couple the first and second capacitors in series or in parallel, to allow enable charge balancing between the first capacitor and second capacitor.

IPC Classes  ?

  • H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

6.

Methods and apparatus for system identification

      
Application Number 17706982
Grant Number 11847200
Status In Force
Filing Date 2022-03-29
First Publication Date 2023-10-05
Grant Date 2023-12-19
Owner Cirrus Logic Inc. (USA)
Inventor Ebenezer, Samuel P.

Abstract

A method of identifying a system, the method comprising: obtaining an indication of background noise present at the system; generating a probe signal based on the indication; applying the probe signal to the system; estimating a response of the system to the probe signal; and identifying the system based on the measured response and the probe signal, wherein the probe signal comprises a whitening component configured to whiten noise in the estimated response due to the background noise present at the system.

IPC Classes  ?

  • A61B 5/117 - Identification of persons
  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • G10L 25/51 - Speech or voice analysis techniques not restricted to a single one of groups specially adapted for particular use for comparison or discrimination
  • A61B 5/12 - Audiometering

7.

Determination of gain of pulse width modulation amplifier system

      
Application Number 17720936
Grant Number 11764741
Status In Force
Filing Date 2022-04-14
First Publication Date 2023-09-19
Grant Date 2023-09-19
Owner Cirrus Logic Inc. (USA)
Inventor Melanson, John L.

Abstract

A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output, include a feedback network coupled between the amplifier output and an input of the analog integrator, and a calibration system. The calibration system may be configured to force the input of the analog integrator to a fixed known input value, force the amplifier output to a fixed known duty cycle, measure an analog signal generated at the output of the analog integrator in response to forcing the input of the analog integrator to the fixed value, determine an offset of the switched mode amplifier system based on the analog signal, and correct for the offset.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation

8.

Background offset calibration of a high-speed analog signal comparator

      
Application Number 17683650
Grant Number 11888492
Status In Force
Filing Date 2022-03-01
First Publication Date 2023-09-07
Grant Date 2024-01-30
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Wen, Jianping
  • Melanson, John L.

Abstract

A background offset calibration system for an analog signal comparator provides low offset without compromising tracking bandwidth. The comparator includes a preamplifier and a decision latch. A switching selectively couples outputs of an analog circuit to the inputs of the preamplifier stage. A state control logic alternatively operates the system in a first phase in which the analog circuit acquires an input signal while the comparator is calibrated, and a second phase in which a comparison is performed by the comparator. In the first phase, the switching circuit disconnects the outputs of the analog circuit from the preamplifier stage and applies a common mode reference to the inputs of the preamplifier. An offset correction circuit determines correction changes from a history of states of the decision latch across multiple sampling cycles. The offset correction circuit adjusts a threshold voltage of the decision latch by applying the correction changes.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters

9.

Computing circuitry

      
Application Number 18296297
Grant Number 11880728
Status In Force
Filing Date 2023-04-05
First Publication Date 2023-08-03
Grant Date 2024-01-23
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John Paul

Abstract

This application relates to computing circuitry, and in particular to analogue computing circuitry suitable for neuromorphic computing. An analogue computation unit for processing data is supplied with a first voltage from a voltage regulator which is operable in a sequence of phases to cyclically regulate the first voltage. A controller is configured to control operation of the voltage regulator and/or the analogue computation unit, such that the analogue computation unit processes data during a plurality of compute periods that avoid times at which the voltage regulator undergoes a phase transition which is one of a predefined set of phase transitions between defined phases in said sequence of phases. This avoids performing computation operations during a phase transition of the voltage regulator that could result in a transient or disturbance in the first voltage, which could adversely affect the computing.

IPC Classes  ?

  • G06G 7/00 - Devices in which the computing operation is performed by varying electric or magnetic quantities
  • G06G 7/48 - Analogue computers for specific processes, systems, or devices, e.g. simulators
  • H02M 1/084 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters using a control circuit common to several phases of a multi-phase system
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/12 - Analogue/digital converters
  • G06N 3/065 - Analogue means

10.

Cough detection

      
Application Number 18298573
Grant Number 11918345
Status In Force
Filing Date 2023-04-11
First Publication Date 2023-08-03
Grant Date 2024-03-05
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Suryono, Yanto
  • Ido, Toru

Abstract

A method of cough detection in a headset, the method comprising: receiving a first signal from an external transducer of the headset; receiving a second signal from an in-ear transducer of the headset; and detecting a cough of a user of the headset based on the first and second signals.

IPC Classes  ?

  • A61B 5/08 - Measuring devices for evaluating the respiratory organs
  • A61B 5/00 - Measuring for diagnostic purposes ; Identification of persons

11.

Hybrid power converter

      
Application Number 17582836
Grant Number 11855531
Status In Force
Filing Date 2022-01-24
First Publication Date 2023-07-27
Grant Date 2023-12-26
Owner Cirrus Logic Inc. (USA)
Inventor Lim, Changjong

Abstract

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a switching node, a power inductor coupled between the switching node and the output, a flying capacitor having a first flying capacitor terminal and a second flying capacitor terminal, a pump capacitor having a first pump capacitor terminal and a second pump capacitor terminal, the second pump capacitor terminal coupled to ground, a first switch coupled between the input and the first flying capacitor terminal, a second switch coupled between the first flying capacitor terminal and the switching node, a third switch coupled between the second flying capacitor terminal and the switching node, a fourth switch coupled between the second flying capacitor terminal and a ground voltage, a fifth switch coupled between the second flying capacitor terminal and the first pump capacitor terminal, and a sixth switch coupled between the output and the first pump capacitor terminal.

IPC Classes  ?

  • H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

12.

Efficient use of energy in a switching power converter

      
Application Number 18174106
Grant Number 11909317
Status In Force
Filing Date 2023-02-24
First Publication Date 2023-06-29
Grant Date 2024-02-20
Owner Cirrus Logic Inc. (USA)
Inventor
  • King, Eric J.
  • Sharma, Ajit
  • Zhang, Lingli
  • Larsen, Christian
  • Mackay, Graeme G.

Abstract

A system may include a power converter having a maximum allowable input power drawn from a power source, an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy, and control circuitry configured to, when an input power of the power converter exceeds the maximum allowable input power, cause excess energy stored in the energy storage element to be consumed by circuitry coupled to the output of the power converter, and in order to maintain positive voltage headroom for the circuitry coupled to the output of the power converter, selectively couple a bottom plate of the energy storage element to the power source such that excess energy stored by the circuitry coupled to the output of the power converter is consumed from the energy storage device when the input power of the power converter exceeds the maximum allowable input power.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H03G 3/00 - Gain control in amplifiers or frequency changers
  • H03F 3/19 - High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only

13.

Microphone system

      
Application Number 18176555
Grant Number 11871193
Status In Force
Filing Date 2023-03-01
First Publication Date 2023-06-29
Grant Date 2024-01-09
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Harvey, Thomas I.

Abstract

A microphone system, comprises a first transducer, for generating a first acoustic signal, and a second transducer, for generating a second acoustic signal. A high-pass filter receives the first signal and generates a first filtered signal, and a low-pass filter receives the second signal and generates a second filtered signal. An adder forms an output signal of the microphone system as a sum of the first filtered signal and the second filtered signal.

IPC Classes  ?

  • H04R 1/10 - Earpieces; Attachments therefor
  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • H03G 5/16 - Automatic control
  • H04R 1/08 - Mouthpieces; Attachments therefor
  • H04R 3/02 - Circuits for transducers for preventing acoustic reaction
  • H04R 1/02 - Casings; Cabinets; Mountings therein

14.

Ambient-aware background noise reduction for hearing augmentation

      
Application Number 17713302
Grant Number 11682376
Status In Force
Filing Date 2022-04-05
First Publication Date 2023-06-20
Grant Date 2023-06-20
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Lashkari, Khosrow
  • Olsen, Doug

Abstract

An ambient-aware audio system reduces stationary noise and maintains dynamic environmental sound in a received input audio signal. The system includes a signal-to-noise ratio (SNR) estimator that estimates an a priori SNR and an a posteriori SNR, a gain function that uses the estimated SNRs as inputs to compute coefficients of a frequency domain noise reduction filter that uses the computed coefficients to filter a frame of the input audio signal to generate an output audio signal. The SNR estimator, gain function, and filter are configured to iterate over a plurality of frames of the input audio signal. The SNRs are estimated using the input audio signal and the output audio signal associated with one or more of the plurality of frames. The gain function is derived to minimize an expected value of differences between spectral amplitudes of the output audio signal and the input audio signal.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

15.

Slew control for variable load pulse-width modulation driver and load sensing

      
Application Number 17540648
Grant Number 11854738
Status In Force
Filing Date 2021-12-02
First Publication Date 2023-06-08
Grant Date 2023-12-26
Owner Cirrus Logic Inc. (USA)
Inventor
  • Prakash, Chandra B.
  • Zanbaghi, Ramin

Abstract

A system may include an electromagnetic load, a driver configured to drive the electromagnetic load with a driving signal, and a processing system communicatively coupled to the electromagnetic load and configured to, during a haptic mode of the system couple a first terminal of the electromagnetic load to a ground voltage and cause the driving signal to have a first slew rate, and during a load sensing mode of the system for sensing a current associated with the electromagnetic load, couple the first terminal to a current-sensing circuit having a sense resistor coupled between the first terminal and an electrical node driven to a common-mode voltage and cause the driving signal to have a second slew rate lower than the first slew rate.

IPC Classes  ?

  • H01H 47/00 - Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
  • H01F 7/06 - Electromagnets; Actuators including electromagnets
  • H02K 33/00 - Motors with reciprocating, oscillating or vibrating magnet, armature or coil system
  • H04R 9/06 - Loudspeakers

16.

Driver circuits

      
Application Number 18101816
Grant Number 11792569
Status In Force
Filing Date 2023-01-26
First Publication Date 2023-06-01
Grant Date 2023-10-17
Owner Cirrus Logic Inc. (USA)
Inventor
  • Doy, Anthony S.
  • King, Eric J.

Abstract

The application describes a switched driver (401) for outputting a drive signal at an output node (402) to drive a load such as a transducer. The driver receives respective high-side and low-side voltages (VinH, VinL) defining an input voltage at first and second input nodes and has connections for first and second capacitors (403H, 403L). A network of switching paths is configured such that each of the first and second capacitors can be selectively charged to the input voltage, the first input node can be selectively coupled to a first node (N1) by a path that include or bypass the first capacitor, and the second input node can be selectively coupled to a second node (N2) by a path that includes or bypasses the second capacitor. The output node (402) can be switched between two switching voltages at the first or second nodes. The driver is selectively operable in different operating modes, where the switching voltages are different in each of said modes.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • H03F 3/217 - Class D power amplifiers; Switching amplifiers

17.

Class D amplifier circuitry

      
Application Number 17537619
Grant Number 11799426
Status In Force
Filing Date 2021-11-30
First Publication Date 2023-06-01
Grant Date 2023-10-24
Owner Cirrus Logic Inc. (USA)
Inventor
  • Klarenbeek, Johnny
  • Singleton, David P.
  • Prior, Morgan T.
  • Wigner, Jonathan T.
  • Dougherty, Christopher M.
  • Cai, Qi
  • Bhattacharya, Anindya

Abstract

Class D amplifier circuitry comprising: input buffer circuitry configured to receive a first digital input signal modulated according to a first modulation scheme in which the digital input signal can take a first plurality N of discrete signal levels; analog modulator circuitry configured to generate an analog modulated signal based on an analog output signal output by the input buffer circuitry; and quantizer circuitry configured to generate an output signal based on the analog modulated signal, wherein the output signal is modulated according to a second modulation scheme in which the output signal can take a second plurality M of discrete signal levels, wherein the second plurality M is greater than the first plurality N.

IPC Classes  ?

  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03F 3/38 - Dc amplifiers with modulator at input and demodulator at output; Modulators or demodulators specially adapted for use in such amplifiers

18.

Methods, apparatus and systems for audio playback

      
Application Number 18101843
Grant Number 11829461
Status In Force
Filing Date 2023-01-26
First Publication Date 2023-06-01
Grant Date 2023-11-28
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John Paul
  • Forsyth, John

Abstract

The present invention relates to methods, apparatus and systems for audio playback via a personal audio device following a biometric process. A personal audio device may be used to obtain ear model data for authenticating a user via an ear biometric authentication system. Owing to that successful authentication, the electronic device is informed of the person who is listening to audio playback from the device. Thus the device can implement one or more playback settings which are specific to that authorised user.

IPC Classes  ?

  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G06F 3/16 - Sound input; Sound output
  • H04R 1/10 - Earpieces; Attachments therefor
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • G10L 25/51 - Speech or voice analysis techniques not restricted to a single one of groups specially adapted for particular use for comparison or discrimination
  • H04R 1/02 - Casings; Cabinets; Mountings therein
  • H04R 29/00 - Monitoring arrangements; Testing arrangements

19.

Systems and methods for modifying biquad filters of a feedback filter in feedback active noise cancellation

      
Application Number 17496253
Grant Number 11664000
Status In Force
Filing Date 2021-10-07
First Publication Date 2023-05-30
Grant Date 2023-05-30
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Zou, Ziyan
  • Bodon, K. Joshua
  • Sira, Sandeep P.

Abstract

An integrated circuit may include an output for providing an output signal to a transducer including both a source audio signal for playback to a listener and an anti-noise signal for countering the effect of ambient audio sounds in an acoustic output of the transducer, an error microphone input for receiving an error microphone signal indicative of the output of the transducer and the ambient audio sounds at the transducer, and a processing circuit. The processing circuit may implement a feedback path comprising a feedback filter having a response that generates a feedback anti-noise signal based on the error microphone signal, the feedback filter comprising a plurality of biquad filters and wherein the anti-noise signal is generated from the feedback anti-noise signal and an event detection and oversight control that detects that an ambient audio event is occurring that could cause the feedback filter to generate an undesirable component in the anti-noise signal, and controls filter coefficients of one or more of the plurality of biquad filters to reduce the undesirable component.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

20.

Parameter estimation in driver circuitry

      
Application Number 17690402
Grant Number 11644494
Status In Force
Filing Date 2022-03-09
First Publication Date 2023-05-09
Grant Date 2023-05-09
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Prakash, Chandra B.
  • Das, Tejasvi
  • Maru, Siddharth

Abstract

Circuitry for driving a load, the circuitry comprising: driver circuitry; load sensing circuitry; and a parameter estimation engine, wherein the circuitry is operable in: a driving mode of operation in which the driver circuitry supplies a drive signal to a load coupled to the circuitry; and a load sensing mode of operation, for estimating a characteristic of a load coupled to the circuitry based on a signal output by the load sensing circuitry in response to a stimulus signal supplied to the driver circuitry, and wherein the circuitry is operable to perform a calibration operation in which the parameter estimation engine generates a circuit parameter for use in the load sensing mode based, at least in part, on a signal generated by the circuitry in response to a calibration stimulus signal supplied to the driver circuitry.

IPC Classes  ?

  • H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
  • G01R 27/16 - Measuring impedance of element or network through which a current is passing from another source, e.g. cable, power line

21.

Circuitry for compensating for gain and/or phase mismatch between voltage and current monitoring paths

      
Application Number 17690327
Grant Number 11644521
Status In Force
Filing Date 2022-03-09
First Publication Date 2023-05-09
Grant Date 2023-05-09
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Hellman, Ryan A.
  • Parikh, Viral
  • Maru, Siddharth
  • Das, Tejasvi

Abstract

Circuitry comprising: a voltage monitoring path; a current monitoring path; a reference element of a predefined impedance; and processing circuitry, wherein in operation of the circuitry in a calibration mode of operation: the voltage monitoring path is operative to output a signal indicative of a voltage across the reference element in response to a reference signal applied to the reference element; the current monitoring path is operative to output a signal indicative of a current through the reference element in response to the reference signal; and the processing circuitry is operative to: receive the signal indicative of the voltage across the reference element and the signal indicative of the current through the reference element; generate an estimate of an impedance of the reference element; and determine a compensation parameter for an element of the circuitry for compensating for a difference between the estimate of the impedance and the predefined impedance of the reference element.

IPC Classes  ?

  • G01R 27/08 - Measuring resistance by measuring both voltage and current
  • G01R 35/00 - Testing or calibrating of apparatus covered by the other groups of this subclass
  • G01R 27/02 - Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
  • G01R 27/14 - Measuring resistance by measuring current or voltage obtained from a reference source
  • G01R 1/20 - Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
  • G01R 27/16 - Measuring impedance of element or network through which a current is passing from another source, e.g. cable, power line

22.

Nonlinear feedforward correction in a multilevel output system

      
Application Number 17960335
Grant Number 11906993
Status In Force
Filing Date 2022-10-05
First Publication Date 2023-05-04
Grant Date 2024-02-20
Owner Cirrus Logic Inc. (USA)
Inventor
  • Melanson, John L.
  • Hoff, Thomas H.

Abstract

A feedforward correction block for use in a multi-level output system may include circuitry configured to determine an occurrence of a mode transition between operating modes of the multi-level output system, capture a loop filter output of a signal path of the multi-level output system occurring before and after the occurrence of the mode transition, and based on the transition and a change in the loop filter output responsive to the transition, determine a transition-specific compensation function to apply to a feedforward input signal of the signal path that is combined with the loop filter output.

IPC Classes  ?

  • G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc

23.

User input device having piezoelectric transducer electrode coupled to touch electrodes

      
Application Number 17958843
Grant Number 11914781
Status In Force
Filing Date 2022-10-03
First Publication Date 2023-05-04
Grant Date 2024-02-27
Owner Cirrus Logic Inc. (USA)
Inventor Doy, Anthony S.

Abstract

A touch-sensitive user input device comprising: a first electrode layer comprising a first plurality of electrodes; a second electrode layer comprising a second plurality of electrodes; an insulating layer disposed between the first electrode layer and the second electrode layer; and at least one piezoelectric transducer, wherein an electrode of the at least one piezoelectric transducer is coupled to the first plurality of electrodes of the first electrode layer.

IPC Classes  ?

  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/02 - Input arrangements using manually operated switches, e.g. using keyboards or dials
  • G06F 3/0354 - Pointing devices displaced or positioned by the user; Accessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks

24.

Pre-biased mode switching in system having selectable pulse-width modulated (PWM) and linear operation

      
Application Number 17510707
Grant Number 11949321
Status In Force
Filing Date 2021-10-26
First Publication Date 2023-04-27
Grant Date 2024-04-02
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Parupalli, Vamsikrishna
  • Jain, Nishant
  • Wang, Mengde

Abstract

An electronic control system provides selectable linear and pulse-width modulated (PWM) operation with reduced disruption when changing from PWM operation to linear operation. The system includes an output stage that has a push-pull driver coupled to the load, which may be a motor, a haptic device, or other device requiring current-mode control. The system also includes a pulse-width modulated (PWM) driver for providing pulse-width modulated drive signals to gates of the transistors of the output stage when a pulse-width modulated mode is selected, and a linear amplifier stage that provides a linear analog signal to the gates of the transistors when a linear mode is selected. A pre-charging circuit pre-charges the gates during a pre-charge cycle that is initiated when the operating mode changes from the PWM operating more to the linear operating mode.

IPC Classes  ?

  • H02P 27/00 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02M 1/088 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
  • H02M 3/28 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
  • H02P 27/08 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation

25.

Artificial neural networks

      
Application Number 18089020
Grant Number 11790220
Status In Force
Filing Date 2022-12-27
First Publication Date 2023-04-27
Grant Date 2023-10-17
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John Paul

Abstract

The present disclosure relates to a neuron for an artificial neural network. The neuron comprises a dot product engine operative to: receive a set of weights; receive a set of data inputs based on a set of input data signals; and calculate the dot product of the set of data inputs and the set of weights to generate a dot product engine output. The neuron further comprises an activation function module arranged to apply an activation function to a signal indicative of the dot product engine output to generate a neuron output; and gain control circuitry. The gain control circuitry is operative to control: an input gain applied to the input data signals to generate the set of data inputs; and an output gain applied to the dot product engine output or by the activation function module. The output gain is selected to compensate for the applied input gain.

IPC Classes  ?

  • G06F 3/06 - Digital input from, or digital output to, record carriers
  • G06N 3/065 - Analogue means
  • G06N 3/04 - Architecture, e.g. interconnection topology
  • G06F 7/16 - Combined merging and sorting

26.

Common-mode compensation in a multi-level pulse-width modulation system

      
Application Number 17502689
Grant Number 11811370
Status In Force
Filing Date 2021-10-15
First Publication Date 2023-04-20
Grant Date 2023-11-07
Owner Cirrus Logic Inc. (USA)
Inventor
  • Zanbaghi, Ramin
  • Zhang, Lingli
  • Xu, Wei
  • Richardson, Justin
  • Melanson, John L.

Abstract

A system for sensing an electrical quantity may include a sensing stage configured to sense the electrical quantity and generate a sense signal indicative of the electrical quantity, wherein the electrical quantity is indicative of an electrical signal generated by a Class-DG amplifier configured to drive a load wherein the Class-DG amplifier has multiple signal-level common modes and a common-mode compensator configured to compensate for changes to a common-mode voltage of a differential supply voltage of the driver occurring when switching between signal-level common modes of the Class-DG amplifier.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • G01R 19/25 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques

27.

Artificial neural networks

      
Application Number 17990424
Grant Number 11803742
Status In Force
Filing Date 2022-11-18
First Publication Date 2023-04-13
Grant Date 2023-10-31
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John Paul

Abstract

The present disclosure relates to a neuron for an artificial neural network. The neuron includes: a first dot product engine operative to: receive a first set of weights; receive a set of inputs; and calculate the dot product of the set of inputs and the first set of weights to generate a first dot product engine output. The neuron further includes a second dot product engine operative to: receive a second set of weights; receive an input based on the first dot product engine output; and generate a second dot product engine output based on the product of the first dot product engine output and a weight of the second set of weights. The neuron further includes an activation function module arranged to generate a neuron output based on the second dot product engine output. The first dot product engine and the second dot product engine are structurally or functionally different.

IPC Classes  ?

  • G06N 3/065 - Analogue means
  • G06F 17/16 - Matrix or vector computation
  • G06F 7/523 - Multiplying only
  • G06F 7/544 - Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using unspecified devices for evaluating functions by calculation
  • G06N 3/048 - Activation functions

28.

Filters and filter chains

      
Application Number 17749603
Grant Number 11889280
Status In Force
Filing Date 2022-05-20
First Publication Date 2023-04-06
Grant Date 2024-01-30
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John P.

Abstract

An apparatus, comprising: an audio input for receiving an input audio signal; an tuning input for receiving a tuning signal; a filter chain comprising a plurality of filters for filtering the audio signal to produce a filtered input audio signal, the filter chain comprising: a first filter module operating at a first sampling rate; and a second filter module operating at a second sampling rate greater than the first sampling rate, wherein a phase response of the first filter module is dependent on the tuning input and wherein a magnitude response of the first filter module is substantially independent of the tuning input.

IPC Classes  ?

  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • H04R 1/32 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only

29.

Chip scale package

      
Application Number 17993638
Grant Number 11887924
Status In Force
Filing Date 2022-11-23
First Publication Date 2023-03-23
Grant Date 2024-01-30
Owner Cirrus Logic Inc. (USA)
Inventor
  • Mcadam, Craig
  • Taylor, Jonathan
  • Macfarlane, Douglas
  • Kerr, John
  • Munger, James
  • Pavelka, John
  • Atherton, Steven A.

Abstract

The present disclosure relates to a chip scale package (CSP) comprising: a first set of CSP contact balls or bumps; a second set of CSP contact balls or bumps; and a channel routing region, the channel routing region being devoid of any CSP contact balls or bumps.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

30.

System with hardware register and controller external to processor that facilitates transitions between firmware images using hardware register written with firmware image entry points

      
Application Number 17472196
Grant Number 11899567
Status In Force
Filing Date 2021-09-10
First Publication Date 2023-03-16
Grant Date 2024-02-13
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Bhat, Vivek T.
  • Hemkumar, Nariankadu D.

Abstract

A system includes a memory programmed with multiple firmware images each having a distinct entry point, a processor, a writable hardware register initially seeded with an initial firmware image entry point address. A controller external to the processor, prior to an initial processor reset, reads the hardware register and causes the processor to begin fetching instructions at the initial firmware image entry point read from the hardware register. Prior to a subsequent reset, the external controller facilitates at least one transition to at least one of the multiple firmware images other than the initial firmware image by reading the entry point of the other firmware images from the hardware register and causing the processor to begin fetching instructions at the entry point of the other firmware images read from the hardware register.

IPC Classes  ?

  • G06F 11/36 - Preventing errors by testing or debugging of software
  • G06F 9/445 - Program loading or initiating
  • G06F 9/30 - Arrangements for executing machine instructions, e.g. instruction decode

31.

Randomization of current in a power converter

      
Application Number 17985494
Grant Number 11671018
Status In Force
Filing Date 2022-11-11
First Publication Date 2023-03-09
Grant Date 2023-06-06
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Mackay, Graeme G.
  • Lawrence, Jason W.

Abstract

A method of randomizing inductor current in at least one of a plurality of parallel coupled peak/valley current-controlled power converters may include comparing the inductor current to a threshold to generate a comparison signal, delaying the comparison signal by a plurality of delay amounts to generate a plurality of delayed versions of the comparison signal, and randomly selecting one of the plurality of delayed versions of the comparison signal for controlling the inductor current during one or both of a charging state and a transfer state of the at least one of the plurality of parallel coupled peak/valley current-controlled power converters.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02M 3/156 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02M 3/157 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
  • H02M 1/44 - Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
  • H02M 1/15 - Arrangements for reducing ripples from dc input or output using active elements

32.

System and method for use in haptic signal generation

      
Application Number 17972052
Grant Number 11951389
Status In Force
Filing Date 2022-10-24
First Publication Date 2023-03-02
Grant Date 2024-04-09
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lindemann, Eric
  • Kurek, Michael
  • Matai, Meenakshi

Abstract

The application describes techniques for adaptively setting a threshold that will be used to determine the gain applied to a haptics signal.

IPC Classes  ?

  • A63F 13/285 - Generating tactile feedback signals via the game input device, e.g. force feedback
  • A63F 13/215 - Input arrangements for video game devices characterised by their sensors, purposes or types comprising means for detecting acoustic signals, e.g. using a microphone
  • A63F 13/23 - Input arrangements for video game devices for interfacing with the game device, e.g. specific interfaces between game controller and console
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/16 - Sound input; Sound output
  • G10L 25/21 - Speech or voice analysis techniques not restricted to a single one of groups characterised by the type of extracted parameters the extracted parameters being power information
  • H04R 1/02 - Casings; Cabinets; Mountings therein
  • H04R 3/04 - Circuits for transducers for correcting frequency response

33.

Circuitry for analyte measurement

      
Application Number 17463796
Grant Number 11846600
Status In Force
Filing Date 2021-09-01
First Publication Date 2023-03-02
Grant Date 2023-12-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Ido, Toru

Abstract

Circuitry for measuring a characteristic of an electrochemical cell, the circuitry comprising: a comparator having a first comparator input, a second comparator input and a comparator output; a feedback path between the comparator output and the second comparator input configured to provide a feedback signal to the second comparator input; and a loop filter configured to apply filtering to the feedback path to generate the feedback signal, wherein the loop filter comprises the electrochemical cell.

IPC Classes  ?

  • G01N 27/327 - Biochemical electrodes
  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values

34.

Pseudo-bypass mode for power converters

      
Application Number 17550492
Grant Number 11843317
Status In Force
Filing Date 2021-12-14
First Publication Date 2023-03-02
Grant Date 2023-12-12
Owner Cirrus Logic Inc. (USA)
Inventor
  • Akram, Hasnain
  • Mackay, Graeme G.
  • Lawrence, Jason W.

Abstract

A system may include a boost converter configured to receive an input voltage and boost the input voltage to an output voltage and control circuitry configured to enforce a maximum current limit to limit a current drawn by the boost converter and in response to the output voltage decreasing below the input voltage, dynamically increase the current above the maximum current limit to cause the output voltage to be approximately equal to the input voltage.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection
  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values

35.

Methods, apparatus and systems for biometric processes

      
Application Number 17981170
Grant Number 11934506
Status In Force
Filing Date 2022-11-04
First Publication Date 2023-02-23
Grant Date 2024-03-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Harvey, Thomas Ivan
  • Lesso, John Paul

Abstract

A method for use in a biometric process, comprising: for a first function and a second function, applying an acoustic stimulus to a user's ear; and for the second function: receiving a response signal of a user's ear to the acoustic stimulus; and extracting, from the response signal, one or more features for use in a biometric process, wherein the first function is a function other than to induce the response signal for use in the biometric process.

IPC Classes  ?

  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G06F 3/16 - Sound input; Sound output
  • G06F 9/54 - Interprogram communication
  • H04R 3/04 - Circuits for transducers for correcting frequency response

36.

Use of shared feedback among two or more reactive schemes

      
Application Number 17968393
Grant Number 11722054
Status In Force
Filing Date 2022-10-18
First Publication Date 2023-02-09
Grant Date 2023-08-08
Owner Cirrus Logic Inc. (USA)
Inventor
  • Sharma, Ajit
  • Lawrence, Jason W.
  • Mackay, Graeme G.

Abstract

A power delivery system may include a power converter configured to electrically couple to a power source and further configured to supply electrical energy to one or more loads electrically coupled to an output of the power converter and control circuitry configured to control the power converter in accordance with a control variable. The control circuitry may include a first control mechanism configured to generate a first intermediate control variable based on a first physical quantity associated with the power delivery system, a second control mechanism configured to generate a second intermediate control variable based on a second physical quantity associated with the power delivery system, a selector configured to select the control variable from the first intermediate control variable and the second intermediate control variable, and a shared feedback memory element configured to feed back the control variable to inputs of the first control mechanism and the second control mechanism, such that the first control mechanism generates the first intermediate control variable based on the first physical quantity and the control variable, and the second control mechanism generates the second intermediate control variable based on the second physical quantity and the control variable.

IPC Classes  ?

  • H02M 1/32 - Means for protecting converters other than by automatic disconnection

37.

Sensor signal correction

      
Application Number 17968565
Grant Number 11947756
Status In Force
Filing Date 2022-10-18
First Publication Date 2023-02-09
Grant Date 2024-04-02
Owner Cirrus Logic Inc. (USA)
Inventor
  • Sanz-Robinson, Josh
  • Maru, Siddharth
  • Das, Tejasvi

Abstract

A correction unit for use in a sensor system, the sensor system comprising a force sensor configured to output a sensor signal indicative of a temporary mechanical distortion of a material under an applied force, the correction unit configured, based on the sensor signal, to: estimate an effect of the applied force on how the material will return towards an undistorted form upon a substantial reduction or removal of the applied force; and generate a corrected signal based on the estimation.

IPC Classes  ?

  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/02 - Input arrangements using manually operated switches, e.g. using keyboards or dials
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer

38.

Identifying mechanical impedance of an electromagnetic load using least-mean-squares filter

      
Application Number 17961011
Grant Number 11736093
Status In Force
Filing Date 2022-10-06
First Publication Date 2023-02-02
Grant Date 2023-08-22
Owner Cirrus Logic Inc. (USA)
Inventor
  • Marchais, Emmanuel
  • Peso Parada, Pablo
  • Lindemann, Eric

Abstract

A method for identifying a mechanical impedance of an electromagnetic load may include generating a waveform signal for driving an electromagnetic load and, during driving of the electromagnetic load by the waveform signal or a signal derived therefrom, receiving a current signal representative of a current associated with the electromagnetic load and a back electromotive force signal representative of a back electromotive force associated with the electromagnetic load. The method may also include implementing an adaptive filter to identify parameters of the mechanical impedance of the electromagnetic load, wherein an input of a coefficient control for adapting coefficients of the adaptive filter is a first signal derived from the back electromotive force signal and a target of the coefficient control for adapting coefficients of the adaptive filter is a second signal derived from the current signal.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • H03H 17/06 - Non-recursive filters
  • H03H 7/12 - Bandpass or bandstop filters with adjustable bandwidth and fixed centre frequency
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • H02N 2/06 - Drive circuits; Control arrangements
  • G01H 15/00 - Measuring mechanical or acoustic impedance

39.

Fast offset calibration for sensor and analog front end

      
Application Number 17573000
Grant Number 11799428
Status In Force
Filing Date 2022-01-11
First Publication Date 2023-02-02
Grant Date 2023-10-24
Owner Cirrus Logic Inc. (USA)
Inventor
  • Singh, Saurabh
  • Prakash, Chandra B.

Abstract

A method may include receiving, by a calibration circuit, an output of a subsystem comprising the sensor and the analog front end. The method may further include separating the output individually into the sensor offset and the amplifier offset by using inherent properties of separate frequency ranges for the sensor offset and the amplifier offset. The method may also include calibrating, by the calibration circuit, the sensor offset by determining a first calibration value for the sensor offset such that the output approximates zero during an idle-channel condition. The method may additionally include calibrating, by the calibration circuit, the amplifier offset by determining a second calibration value for the amplifier offset such that the output approximates zero during the idle-channel condition.

IPC Classes  ?

  • H03F 3/04 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
  • G01D 18/00 - Testing or calibrating apparatus or arrangements provided for in groups

40.

Active noise cancellation system using infinite impulse response filtering

      
Application Number 17468990
Grant Number 11564035
Status In Force
Filing Date 2021-09-08
First Publication Date 2023-01-24
Grant Date 2023-01-24
Owner Cirrus Logic, Inc. (USA)
Inventor Ebenezer, Samuel P.

Abstract

An integrated circuit for implementing at least a portion of a personal audio device may include an output for providing a signal to a transducer including both a source audio signal for playback to a listener and an anti-noise signal for countering the effects of ambient audio sounds in an acoustic output of the transducer, a reference microphone input for receiving a reference microphone signal indicative of the ambient audio sounds, an error microphone input for receiving an error microphone signal indicative of the output of the transducer and the ambient audio sounds at the transducer, and a processing circuit configured to implement an adaptive infinite impulse response filter having a response that generates the anti-noise signal to reduce the presence of the ambient audio sounds at the error microphone and implement a coefficient control block that shapes the response of the adaptive infinite impulse response filter in conformity with the error microphone signal by generating coefficients that determine the response of the adaptive infinite impulse response filter in order to minimize the ambient audio sounds at the error microphone, wherein the coefficient control block selects the coefficients from a library of filter entries, each filter entry of the library of filter entries defining a respective response for the adaptive infinite impulse response filter.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 3/02 - Circuits for transducers for preventing acoustic reaction

41.

Methods and systems for equalisation

      
Application Number 17945517
Grant Number 11916526
Status In Force
Filing Date 2022-09-15
First Publication Date 2023-01-19
Grant Date 2024-02-27
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Anderson, Craig Alexander

Abstract

A method of equalising an audio signal derived from a microphone, the method comprising: receiving the audio signal; applying an order-statistic filter to the audio signal in the frequency domain to generate a statistically filtered audio signal; equalising the received audio signal based on the statistically filtered audio signal to generate an equalised audio signal.

IPC Classes  ?

  • H03G 5/16 - Automatic control
  • H04R 3/04 - Circuits for transducers for correcting frequency response

42.

Computing circuitry

      
Application Number 17947423
Grant Number 11651168
Status In Force
Filing Date 2022-09-19
First Publication Date 2023-01-19
Grant Date 2023-05-16
Owner Cirrus Logic, Inc. (USA)
Inventor Lesso, John Paul

Abstract

This application relates to computing circuitry, and in particular to analogue computing circuitry suitable for neuromorphic computing. An analogue computation unit for processing data is supplied with a first voltage from a voltage regulator which is operable in a sequence of phases to cyclically regulate the first voltage. A controller is configured to control operation of the voltage regulator and/or the analogue computation unit, such that the analogue computation unit processes data during a plurality of compute periods that avoid times at which the voltage regulator undergoes a phase transition which is one of a predefined set of phase transitions between defined phases in said sequence of phases. This avoids performing computation operations during a phase transition of the voltage regulator that could result in a transient or disturbance in the first voltage, which could adversely affect the computing.

IPC Classes  ?

  • G06G 7/00 - Devices in which the computing operation is performed by varying electric or magnetic quantities
  • G06G 7/48 - Analogue computers for specific processes, systems, or devices, e.g. simulators
  • H02M 1/084 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters using a control circuit common to several phases of a multi-phase system
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/12 - Analogue/digital converters
  • G06N 3/065 - Analogue means

43.

Analog-to-digital converter-embedded fixed-phase variable gain amplifier stages for dual monitoring paths

      
Application Number 17541596
Grant Number 11552649
Status In Force
Filing Date 2021-12-03
First Publication Date 2023-01-10
Grant Date 2023-01-10
Owner Cirrus Logic, Inc. (USA)
Inventor Zanbaghi, Ramin

Abstract

A delta-sigma modulator may include a loop filter, a quantizer, an input gain element having a programmable input gain and coupled between an input of the delta-sigma modulator and an input of the loop filter, a feedforward gain element having a programmable feedforward gain and coupled between the input of the delta-sigma modulator and an output of the loop filter, and a quantizer gain element having a quantizer gain and coupled between the output of the loop filter and an input of the quantizer. The programmable input gain is controlled in order to control a variable gain of the delta-sigma modulator. The programmable feedforward gain is controlled to be equal to the ratio of the programmable input gain and the quantizer gain such that the delta-sigma modulator has a fixed phase response.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation
  • H03M 1/12 - Analogue/digital converters
  • H03M 1/10 - Calibration or testing

44.

Systems and methods for estimation of sensor resistance

      
Application Number 17668445
Grant Number 11644493
Status In Force
Filing Date 2022-02-10
First Publication Date 2023-01-05
Grant Date 2023-05-09
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Singh, Saurabh
  • Prakash, Chandra B.
  • Kimball, Eric
  • Peterson, Cory J.
  • Lobo, Ryan

Abstract

A method for estimating resistances of a circuit having a plurality of resistances comprising a first resistance and a second resistance may include applying a first bias voltage across the circuit and measuring a first voltage at a common node between the first resistance and the second resistance in order to determine a mathematical relationship between the first resistance and the second resistance, applying a second bias voltage across the circuit and a third resistance in parallel with the circuit and measuring a second voltage at the common node between the first resistance and the second resistance in order to determine a mathematical relationship between the third resistance and at least one of the first resistance and the second resistance, and based on at least the measurement of the first voltage and the measurement of the second voltage, determining the first resistance and the second resistance as a function of the third resistance.

IPC Classes  ?

  • G01R 27/08 - Measuring resistance by measuring both voltage and current
  • G01R 27/02 - Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
  • G01R 17/10 - Measuring arrangements involving comparison with a reference value, e.g. bridge ac or dc measuring bridges
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof

45.

Detection of speech

      
Application Number 17943745
Grant Number 11842725
Status In Force
Filing Date 2022-09-13
First Publication Date 2023-01-05
Grant Date 2023-12-12
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John Paul

Abstract

A method of own voice detection is provided for a user of a device. A first signal is detected, representing air-conducted speech using a first microphone of the device. A second signal is detected, representing bone-conducted speech using a bone-conduction sensor of the device. The first signal is filtered to obtain a component of the first signal at a speech articulation rate, and the second signal is filtered to obtain a component of the second signal at the speech articulation rate. The component of the first signal at the speech articulation rate and the component of the second signal at the speech articulation rate are compared, and it is determined that the speech has not been generated by the user of the device, if a difference between the component of the first signal at the speech articulation rate and the component of the second signal at the speech articulation rate exceeds a threshold value.

IPC Classes  ?

46.

Pre-conditioning a node of a circuit

      
Application Number 17356606
Grant Number 11936373
Status In Force
Filing Date 2021-06-24
First Publication Date 2022-12-29
Grant Date 2024-03-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Sadati, Hamed
  • Breslin, John A.
  • Hegde, Sushanth
  • Melanson, John L.

Abstract

Pre-conditioning circuitry for pre-conditioning a node of a circuit to support a change in operation of the circuit, wherein the circuit is operative to change a state of the node to effect the change in operation of the circuit, and wherein the pre-conditioning circuitry is configured to apply a voltage, current or charge directly to the node to reduce the magnitude of the change to the state of the node required by the circuit to achieve the change in operation of the circuit.

IPC Classes  ?

  • H03K 17/30 - Modifications for providing a predetermined threshold before switching
  • H03K 17/042 - Modifications for accelerating switching by feedback from the output circuit to the control circuit
  • H03K 17/06 - Modifications for ensuring a fully conducting state

47.

Method and apparatus for detecting a load

      
Application Number 17354237
Grant Number 11668738
Status In Force
Filing Date 2021-06-22
First Publication Date 2022-12-22
Grant Date 2023-06-06
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Mistry, Mehul
  • Khare, Rupesh
  • Fuller, Jack

Abstract

Circuitry for detecting a capacitive load coupled between a first node and a second node, the circuitry comprising: drive circuitry for applying a first voltage to a first node over a first time period; processing circuitry configured to: measure a second voltage at the first node; and determine that the load is a capacitive load based on the second voltage.

IPC Classes  ?

  • G01R 27/26 - Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • H04R 29/00 - Monitoring arrangements; Testing arrangements

48.

Auto-centering of sensor frequency of a resonant sensor

      
Application Number 17894429
Grant Number 11714113
Status In Force
Filing Date 2022-08-24
First Publication Date 2022-12-22
Grant Date 2023-08-01
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Maru, Siddharth
  • Konradi, Vadim
  • Beardsworth, Matthew
  • Das, Tejasvi

Abstract

A system may include a resistive-inductive-capacitive sensor, a driver configured to drive the resistive-inductive-capacitive sensor at a driving frequency, and a measurement circuit communicatively coupled to the resistive-inductive-capacitive sensor and configured to determine a measured change in a resonant frequency of the resistive-inductive-capacitive sensor and based on the measured change, modify the driving frequency.

IPC Classes  ?

  • G01R 27/28 - Measuring attenuation, gain, phase shift, or derived characteristics of electric four-pole networks, i.e. two-port networks; Measuring transient response
  • G01D 5/243 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the phase or frequency of ac

49.

Amplifier systems

      
Application Number 17894799
Grant Number 11949382
Status In Force
Filing Date 2022-08-24
First Publication Date 2022-12-22
Grant Date 2024-04-02
Owner Cirrus Logic Inc. (USA)
Inventor
  • Clarkin, Philip
  • Perry, Ivan
  • Tovell, Mark H.
  • Napoli, Roberto
  • Rhodes, David

Abstract

The present disclosure relates to circuitry comprising: amplifier circuitry configured to receive a variable supply voltage, wherein the supply voltage varies according to an output signal of the amplifier circuitry; monitoring circuitry configured to monitor one or more parameters of an output signal of the amplifier circuitry; and processing circuitry configured to receive an indication of the voltage of the variable supply voltage and an indication of the monitored parameters from the monitoring circuitry and to apply a correction to one or more of the monitored parameters to compensate for coupling between the variable supply voltage and the monitoring circuitry.

IPC Classes  ?

  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03M 1/12 - Analogue/digital converters
  • H04R 3/00 - Circuits for transducers

50.

Methods and systems for detecting and managing unexpected spectral content in an amplifier system

      
Application Number 17549399
Grant Number 11908310
Status In Force
Filing Date 2021-12-13
First Publication Date 2022-12-22
Grant Date 2024-02-20
Owner Cirrus Logic Inc. (USA)
Inventor
  • Taipale, Dana J.
  • Hendrix, Jon D.
  • Marchais, Emmanuel A.

Abstract

A method may include receiving, by a transducer driving system, a first signal for driving an amplifier that drives an electromagnetic load and receiving, by the transducer driving system, a second signal driven by the amplifier in order to control a feedback loop of the transducer driving system. The method may also include detecting unexpected spectral content in the second signal, declaring an indicator event based on the detected unexpected spectral content, determining whether the indicator event occurs in an undesired pattern, and in response to the indicator event occurring in the undesired pattern, modifying a behavior of the transducer driving system.

IPC Classes  ?

  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems

51.

Methods and systems for in-system estimation of actuator parameters

      
Application Number 17574188
Grant Number 11933822
Status In Force
Filing Date 2022-01-12
First Publication Date 2022-12-22
Grant Date 2024-03-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Reynaga, Jorge L.
  • Janko, Marco A.
  • Marchais, Emmanuel A.
  • Melanson, John L.

Abstract

A method for estimating actuator parameters for an actuator, in-situ and in real-time, may include driving the actuator with a test signal imperceptible to a user of a device comprising the actuator during real-time operation of the device, measuring a voltage and a current associated with the actuator and caused by the test signal, determining one or more parameters of the actuator based on the voltage and the current, determining an actuator type of the actuator based on the one or more parameters, and controlling a playback signal to the actuator based on the actuator type.

IPC Classes  ?

  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
  • G01R 27/02 - Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems
  • H02P 29/00 - Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors

52.

Methods and systems for managing mixed mode electromechanical actuator drive

      
Application Number 17572769
Grant Number 11765499
Status In Force
Filing Date 2022-01-11
First Publication Date 2022-12-22
Grant Date 2023-09-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Hendrix, Jon D.
  • Marchais, Emmanuel A.
  • Joseph, Nicholas
  • Tran, Bryant
  • Janko, Marco A.
  • Preecs, Noel

Abstract

In accordance with embodiments of the present disclosure, a method of driving a playback waveform to an electromagnetic actuator by a transducer driving system may include operating the transducer driving system in a first mode wherein the electromagnetic actuator is driven with the playback waveform in a closed loop to form a closed-loop voltage drive system that includes a negative impedance, operating the transducer driving system in a second mode wherein the electromechanical actuator is driven with the playback waveform in an open loop, and operating a mode switch for transitioning the transducer driving system to operate between the first mode and the second mode.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • H03F 1/56 - Modifications of input or output impedances, not otherwise provided for

53.

Multiphase inductive boost converter with multiple operational phases

      
Application Number 17892575
Grant Number 11616434
Status In Force
Filing Date 2022-08-22
First Publication Date 2022-12-08
Grant Date 2023-03-28
Owner Cirrus Logic, Inc. (USA)
Inventor
  • King, Eric J.
  • Melanson, John L.
  • Mackay, Graeme G.
  • Zhang, Lingli

Abstract

A battery management system configured to electrically couple to a battery may include a boost converter comprising a plurality of switches arranged to provide a boosted output voltage at an output of the boost converter from a source voltage of the battery and a bypass switch coupled between the battery and the output, wherein the battery management system is operable in a plurality of modes comprising a bypass mode wherein the source voltage is bypassed to the output and when the battery management system is in the bypass mode, at least one switch of the plurality of switches is enabled to increase a conductance between the battery and the output.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H02M 3/04 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
  • H04R 3/00 - Circuits for transducers

54.

DATA TRANSFER

      
Application Number 17845703
Status Pending
Filing Date 2022-06-21
First Publication Date 2022-12-01
Owner
  • CIRRUS LOGIC, INC. (USA)
  • CIRRUS LOGIC, INC. (USA)
Inventor
  • Lesso, John Paul
  • Frith, Peter John
  • Pennock, John Laurence

Abstract

This application relates to methods and apparatus for transfer of multiple digital data streams, especially of digital audio data over a single communications link such as a single wire. The application describes audio interface circuitry comprising a pulse-length-modulation (PLM) modulator. The PLM is responsive to a plurality of data streams (PDM-R, PDM-L), to generate a series of data pulses (PLM) with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal (TCLK). The timing of the rising and falling edge of each data pulse is dependent upon a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. Circuitry for receiving and extracting the data is also disclosed. An interface receives the stream of data pulses (PLM) and data extraction circuitry samples the data pulse to determine which of the possible data symbols the pulse represents and determines a data value for at least one received data stream.

IPC Classes  ?

  • G10L 19/008 - Multichannel audio signal coding or decoding using interchannel correlation to reduce redundancy, e.g. joint-stereo, intensity-coding or matrixing

55.

Symmetric layout for high-voltage amplifier

      
Application Number 17303251
Grant Number 11942468
Status In Force
Filing Date 2021-05-25
First Publication Date 2022-12-01
Grant Date 2024-03-26
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Khenkin, Aleksey
  • Richardson, Justin
  • Robinson, Michael
  • Patten, David

Abstract

A packaged semiconductor die may include a package terminal array comprising a plurality of terminals, wherein a spacing between the plurality of terminals of the ball grid array is less than 0.5 mm. First and second high-voltage circuits of the die may output a differential signal to a first and second terminal that may exceed 15 volts, in which the first high-voltage circuit and the second high-voltage circuit are positioned symmetrically around an axis and in which the first terminal and the second terminal are located at an edge of the package terminal array. A low-voltage circuit may be coupled to a third terminal and positioned between the first high-voltage circuit and the second high-voltage circuit, wherein the low-voltage circuit comprises circuitry organized in columns aligned along an axis and having a width defined by a fraction of the terminal spacing pitch.

IPC Classes  ?

  • H03F 3/195 - High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/66 - High-frequency adaptations
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
  • H03F 3/45 - Differential amplifiers

56.

Audio system with compressor sidechain frequency-biasing filter for switched-mode power supply overboost energy utilization

      
Application Number 17323551
Grant Number 11581865
Status In Force
Filing Date 2021-05-18
First Publication Date 2022-11-24
Grant Date 2023-02-14
Owner Cirrus Logic, Inc. (USA)
Inventor Roberto, Miles Klett

Abstract

An audio system has an amplifier for driving an audio actuator and includes a switched-mode power supply that draws power from a power source (e.g., battery) to supply power to the amplifier, a capacitor charged by the switched-mode power supply to supply power to the amplifier, and a feed-forward compressor that performs dynamic range compression of an audio input to provide an audio output for amplification by the amplifier. The compressor includes a sidechain frequency-biasing filter that generates a frequency-biased version of the audio input that is attenuated as frequency increases which causes the compressor to decrease the compression as frequency increases. A control block limits current drawn from the battery by the switched-mode power supply independent of audio input frequency, but the frequency-biasing filter enables the amplifier to service audio power transients greater than the current-limited power supply can supply by advantageously concurrently sourcing extra power from the capacitor.

IPC Classes  ?

  • H03G 9/02 - Combinations of two or more types of control, e.g. gain control and tone control in untuned amplifiers
  • H03G 7/00 - Volume compression or expansion in amplifiers
  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F 3/217 - Class D power amplifiers; Switching amplifiers

57.

DRIVER CIRCUITRY AND OPERATION

      
Application Number 17874357
Status Pending
Filing Date 2022-07-27
First Publication Date 2022-11-17
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Thomsen, Axel
  • King, Eric J.
  • Hoff, Thomas H.
  • Melanson, John L.
  • Black, Angus
  • Morgan, Ross C.
  • Blyth, Malcolm

Abstract

This application relates to methods and apparatus for driving a transducer with switching drivers. A switching driver has first and second supply node for receiving supply voltages and includes an output bridge stage, a capacitor and a network of switches. The network of switches is operable in different switch states to provide different switching voltages to the output bridge stage. A controller is configured to control the switch state of the network of switches and a duty cycle of output switches of the output bridge stage based on an input signal to generate an output signal for driving the transducer.

IPC Classes  ?

  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • H02N 2/00 - Electric machines in general using piezoelectric effect, electrostriction or magnetostriction
  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

58.

Minimizing transient artifact of position estimate in inductively-sensed electromagnetic actuator system with shared inductive sensor

      
Application Number 17568248
Grant Number 11948739
Status In Force
Filing Date 2022-01-04
First Publication Date 2022-11-10
Grant Date 2024-04-02
Owner Cirrus Logic Inc. (USA)
Inventor
  • Marchais, Emmanuel A.
  • Das, Tejasvi
  • Maru, Siddharth

Abstract

A system may include an electromagnetic actuator, a first coil configured to drive mechanical displacement of the electromagnetic actuator, a second coil configured to drive mechanical displacement of the electromagnetic actuator, and an inductance sensing subsystem having an inductance sensing path coupled to the first coil and the second coil. The inductance sensing subsystem may be configured to select one of the first coil and the second coil for driving mechanical displacement of the electromagnetic actuator, select the other of the first coil and the second coil as a sensing coil for sensing displacement of the electromagnetic actuator, determine a displacement of the electromagnetic actuator based on a measurement of estimated inductance of the sensing coil, and when switching selection of the sensing coil from the first coil to the second coil determine the displacement of the first coil based on a measured inductance of the first coil at approximately the time of switching selection, estimate state variables of the inductance sensing path to be used with the second coil based on the displacement, and apply the state variables to the inductance sensing path after switching selection of the sensing coil from the first coil to the second coil.

IPC Classes  ?

  • H01F 7/18 - Circuit arrangements for obtaining desired operating characteristics, e.g. for slow operation, for sequential energisation of windings, for high-speed energisation of windings

59.

Current control circuitry

      
Application Number 17860918
Grant Number 11844157
Status In Force
Filing Date 2022-07-08
First Publication Date 2022-11-03
Grant Date 2023-12-12
Owner Cirrus Logic Inc. (USA)
Inventor
  • Smith, Dave
  • Singh, Saurabh
  • Buist, Andrew
  • Cerebiejus, Paulius
  • Mccloy-Stevens, Mark J.
  • Orr, Terence A.

Abstract

The present disclosure relates to current control circuitry for controlling a current through a load, the current control circuitry comprising: amplifier circuitry; reference voltage generator circuitry configured to supply a fixed reference voltage to a first input of the amplifier circuitry; an output stage comprising: a control terminal coupled to an output of the amplifier circuitry; a current input terminal configured to be coupled to the load; a current output terminal; a clock-controlled variable resistance coupled to the current output terminal of the output stage, wherein a resistance of the variable resistance is based on a digital code input to the variable resistance; and a feedback path between the current output terminal of the output stage and a second terminal of the amplifier circuitry for providing a feedback voltage to a second input of the amplifier circuitry.

IPC Classes  ?

  • H05B 45/345 - Current stabilisation; Maintaining constant current
  • H03F 3/04 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only

60.

Single-microphone wind detection for audio device

      
Application Number 17384983
Grant Number 11490198
Status In Force
Filing Date 2021-07-26
First Publication Date 2022-11-01
Grant Date 2022-11-01
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Li, Ning
  • Buddha, Teja
  • Sabet, Mohamed
  • Olsen, Doug

Abstract

A method for detecting wind noise incident on a single microphone may include receiving an audio signal indicative of sound incident on the single microphone, dividing the audio signal into a plurality of audio frames, and determining whether wind noise is incident on the single microphone based on a combination of a correlation metric between successive audio frames of the plurality of audio frames and a power ratio difference between a first power ratio and a second power ratio. The first power ratio may equal an amount of power present in a first frequency range of the audio signal to a total amount of power present in the audio signal across all frequencies. The second power ratio may equal an amount of power present in a second frequency range of the audio signal to the total amount of power present in the audio signal across all frequencies.

IPC Classes  ?

61.

Minimizing total harmonic distortion and power supply induced intermodulation distortion in a single-ended class-d pulse width modulation amplifier

      
Application Number 17338160
Grant Number 11489498
Status In Force
Filing Date 2021-06-03
First Publication Date 2022-11-01
Grant Date 2022-11-01
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Prakash, Chandra
  • Peterson, Cory J.
  • Kimball, Eric

Abstract

An amplifier system may include a first stage having a plurality of inputs configured to receive a differential pulse-width modulation input signal and generate an intermediate signal based on the differential pulse-width modulation input signal, a quantizer configured to generate a modulated signal based on the intermediate signal, a single-ended class-D output stage configured to generate a single-ended output signal as a function of the differential pulse-width modulation input signal, a feedback network configured to feed back the single-ended output signal to a first input of the plurality of inputs and to feed back a ground voltage to a second input of the plurality of inputs, a plurality of buffers, each particular buffer configured to receive a respective component of the differential pulse-width modulation input signal and generate a respective buffered component, and an input network coupled between the plurality of buffers and the first stage. Each particular buffer of the plurality of buffers may include a buffering subcircuit configured to buffer the respective component of the differential pulse-width modulation input signal associated with the particular buffer in order to generate the respective buffered component and a biasing subcircuit configured to limit a magnitude of the respective component of the differential pulse-width modulation input signal driven to circuitry of the buffering subcircuit for driving the respective buffered component.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion

62.

Digital-to-analog conversion architecture and method

      
Application Number 17498183
Grant Number 11489534
Status In Force
Filing Date 2021-10-11
First Publication Date 2022-11-01
Grant Date 2022-11-01
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Lee, Seung Bae
  • Bhagia, Sunny
  • Mehta, Jaiminkumar
  • Bhattacharya, Anindya
  • Melanson, John L.

Abstract

Digital-to-analog converter (DAC) architecture, comprising: a matrix DAC array comprising a plurality of cells arranged in a first dimension and a second dimension, each cell comprising a local decoder configured to transition the cell between at least two states; and decoding circuitry configured to: receive a digital input signal; and control the plurality of local decoders based on a received digital input signal, wherein each incremental change in the digital input signal results in a transition of a single cell of the plurality of cells such that the plurality of cells transition in sequence, the sequence of transitions of the plurality of cells defining a path through the DAC array; wherein when the path proceeds in the first dimension, the path proceeds to an adjacent cell of the plurality of cells at least 50% of the time; and wherein when the path proceeds in the second dimension, the path proceeds to an adjacent cell of the plurality of cells at least 50% of the time.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/08 - Continuously compensating for, or preventing, undesired influence of physical parameters of noise

63.

Compensation for air gap changes and temperature changes in a resonant phase detector

      
Application Number 17848051
Grant Number 11595037
Status In Force
Filing Date 2022-06-23
First Publication Date 2022-10-20
Grant Date 2023-02-28
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Beardsworth, Matthew
  • Das, Tejasvi
  • Maru, Siddharth
  • Lapointe, Luke

Abstract

A system may include a sensor configured to output a sensor signal indicative of a distance between the sensor and a mechanical member associated with the sensor, a measurement circuit communicatively coupled to the sensor and configured to determine a physical force interaction with the mechanical member based on the sensor signal, and a compensator configured to monitor the sensor signal and to apply a compensation factor to the sensor signal to compensate for changes to properties of the sensor based on at least one of changes in a distance between the sensor and the mechanical member and changes in a temperature associated with the sensor.

IPC Classes  ?

  • H03K 17/97 - Switches controlled by moving an element forming part of the switch using a magnetic movable element
  • H03K 17/14 - Modifications for compensating variations of physical values, e.g. of temperature
  • H03K 17/975 - Switches controlled by moving an element forming part of the switch using a capacitive movable element

64.

Cross-over distortionless pulse-width modulated (PWM)/linear motor control system

      
Application Number 17230789
Grant Number 11962261
Status In Force
Filing Date 2021-04-14
First Publication Date 2022-10-20
Grant Date 2024-04-16
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Parupalli, Vamsikrishna
  • May, Mark
  • Smith, Eric B.
  • You, Zhong

Abstract

An electronic motor control system provides selectable linear and pulse-width modulated (PWM) operation without generating cross-over distortion. The system includes an output stage that has a pair of push-pull drivers each coupled to a terminal of the motor. The electronic motor control system also includes a pulse-width modulated (PWM) driver for providing pulse-width modulated drive signals to an input of the output stage when the pulse-width modulated mode is selected and a linear amplifier stage that provides a linear analog signal to the input of the output stage in linear mode, so that both drivers are operated to supply the current to the motor. In pulse-width modulated mode, a driver is selected for PWM operation, while the other driver is operated to supply a fixed voltage. A feedback control loop senses motor current and provides outputs to the pulse-width modulator and the linear amplifier stage.

IPC Classes  ?

  • H02P 5/46 - Arrangements specially adapted for regulating or controlling the speed or torque of two or more electric motors for speed regulation of two or more dynamo-electric motors in relation to one another
  • G02B 7/09 - Mountings, adjusting means, or light-tight connections, for optical elements for lenses with mechanism for focusing or varying magnification adapted for automatic focusing or varying magnification
  • G02B 27/64 - Imaging systems using optical elements for stabilisation of the lateral and angular position of the image
  • H02P 7/03 - Arrangements for regulating or controlling the speed or torque of electric DC motors for controlling the direction of rotation of DC motors
  • H02P 7/29 - Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using pulse modulation
  • H02P 7/292 - Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using static converters, e.g. AC to DC

65.

Amplifier circuitry

      
Application Number 17835326
Grant Number 11909362
Status In Force
Filing Date 2022-06-08
First Publication Date 2022-10-13
Grant Date 2024-02-20
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John Paul

Abstract

FF) from the input and a combiner (105) is operable to determine an error signal (ε) based on a difference between the feedback signal and the feedforward signal. The feedforward comprises a compensation module (201) configured to apply a controlled transfer function to the feedforward signal in the closed-loop mode of operation, such that an overall transfer function for the amplifier is substantially the same in the closed-loop mode of operation and the open-loop mode of operation.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03F 1/34 - Negative-feedback-circuit arrangements with or without positive feedback

66.

Single-inductor multiple output (SIMO) switching power supply having offset common-mode voltage for operating a class-d audio amplifier

      
Application Number 17218992
Grant Number 11552567
Status In Force
Filing Date 2021-03-31
First Publication Date 2022-10-13
Grant Date 2023-01-10
Owner CIRRUS LOGIC, INC (USA)
Inventor
  • Zhao, Xin
  • Yan, Jun
  • Fei, Xiaofan
  • May, Mark
  • Melanson, John L.

Abstract

A single-inductor multiple output (SIMO) switched-power DC-DC converter for a class-D amplifier provides outputs that are symmetric about a common-mode input voltage of the amplifier, while remaining asymmetric about a return terminal of the amplifier and switching converter. The DC-DC converter includes an inductive element, a switching circuit that energizes the inductive element from an input source, and a control circuit that controls the switching circuit. The control circuit may have multiple switching modes, and in one of the multiple switching modes, the switching circuit may couple the inductive element between outputs of the converter so that stored energy produces a differential change between the voltages of the outputs. The control circuit may implement a first control loop that maintains a common mode voltage of the pair of outputs at a predetermined voltage independent of the individual voltages of the pair of outputs.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

67.

Equalization in a multi-path audio amplifier for canceling variations due to multi-path output impedance differences

      
Application Number 17521268
Grant Number 11677360
Status In Force
Filing Date 2021-11-08
First Publication Date 2022-10-13
Grant Date 2023-06-13
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Yin, Leyi
  • Melanson, John L.
  • Lindemann, Eric
  • Vellanki, Amar
  • Chen, Jianhao
  • Choukinishi, Venugopal
  • Shum, Wai-Shun
  • Fei, Xiaofan

Abstract

A multi-path audio amplification system that provides an output drive signal to electromechanical output transducers provides improved undistorted headroom, reduced path switching noise, and/or improved frequency response performance. Multiple signal amplification paths receive an audio input signal and have corresponding multiple output stages that have differing output impedances. A mode selector selects an active one of the multiple signal amplification paths is selected to supply the output drive signal. Outputs of the multiple output stages are coupled to the electromechanical transducer to provide the output drive signal and at least one of the multiple signal amplification paths includes an equalization filter for filtering the audio input signal to compensate for phase or gain differences referenced from the input to the outputs of the multiple output stages due to interaction between the differing output impedances and an impedance of the electromechanical transducer.

IPC Classes  ?

  • H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • H04R 29/00 - Monitoring arrangements; Testing arrangements

68.

Circuitry for estimating displacement of a piezoelectric transducer

      
Application Number 17216767
Grant Number 11849643
Status In Force
Filing Date 2021-03-30
First Publication Date 2022-10-13
Grant Date 2023-12-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Steven, Robert A.

Abstract

Circuitry for estimating a displacement of a piezoelectric transducer in response to a drive signal applied to the piezoelectric transducer, the circuitry comprising: monitoring circuitry configured to be coupled to the piezoelectric transducer and to output a sense signal indicative of an electrical signal associated with the piezoelectric transducer as a result of the drive signal; wherein the circuitry is configured to generate a difference signal based on the drive signal and the sense signal; and wherein the circuitry further comprises processing circuitry configured to apply at least one transfer function to the difference signal to generate a signal indicative of the displacement of the piezoelectric transducer.

IPC Classes  ?

  • H01L 41/04 - SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR - Details thereof - Details of piezo-electric or electrostrictive elements
  • H10N 30/40 - Piezoelectric or electrostrictive devices with electrical input and electrical output, e.g. functioning as transformers
  • H10N 30/20 - Piezoelectric or electrostrictive devices with electrical input and mechanical output, e.g. functioning as actuators or vibrators
  • H10N 30/80 - Constructional details

69.

Signal amplitude-selected signal predistortion in an amplifier

      
Application Number 17348982
Grant Number 11539331
Status In Force
Filing Date 2021-06-16
First Publication Date 2022-10-13
Grant Date 2022-12-27
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Vellanki, Amar
  • Zhao, Xin
  • Bai, Jing
  • Melanson, John L.
  • He, Ku
  • Shum, Wai-Shun
  • Fei, Xiaofan
  • Morton, Alan M.

Abstract

An amplification system with an output driver stage for providing an output signal to acoustic output transducers such as speakers or haptic output devices removes signal distortion caused by output stage non-linearities by pre-distorting an input signal. The system includes the output driver stage, an input stage for receiving the input signal, and a processing block that receives the input signal and provides an output signal to the output driver stage. The processing block includes a pre-distortion circuit that applies a pre-distortion function to the input signal to generate the output signal if a signal level of the input signal is greater than a threshold amplitude, and if the signal level is less than or equal to the threshold amplitude, generates the output signal from the input signal by bypassing the pre-distortion circuit.

IPC Classes  ?

  • H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion
  • H04R 3/02 - Circuits for transducers for preventing acoustic reaction
  • H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
  • H04R 29/00 - Monitoring arrangements; Testing arrangements

70.

Switching driver circuitry

      
Application Number 17365201
Grant Number 11469753
Status In Force
Filing Date 2021-07-01
First Publication Date 2022-10-11
Grant Date 2022-10-11
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Sadati, Hamed
  • Tamura, Yu

Abstract

A switching driver circuit may have an output stage having an output switch connected between a switching voltage node and an output node. A switch network may control a switching voltage at the switching voltage node so that in one mode the switching voltage node is coupled to a positive voltage and in another mode the switching voltage node is coupled to ground voltage via a first switching path of the switch network. The circuit may also include an n-well switching block operable to, when the first switching voltage node is coupled to a positive voltage, connect the n-well of the first output switch to the switching voltage node, and, when the first switching voltage node is coupled to the ground voltage, connect the n-well of the first output switch to a first ground which is separate to the first switching voltage node and independent of the first switching path.

IPC Classes  ?

  • H03K 17/10 - Modifications for increasing the maximum permissible switched voltage
  • H03F 3/185 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only with field-effect devices
  • G11C 5/14 - Power supply arrangements
  • H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H03K 19/00 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
  • G05F 3/20 - Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode-transistor combinations
  • G10K 11/34 - Sound-focusing or directing, e.g. scanning using electrical steering of transducer arrays, e.g. beam steering

71.

Charge pump circuit

      
Application Number 17845007
Grant Number 11811312
Status In Force
Filing Date 2022-06-21
First Publication Date 2022-10-06
Grant Date 2023-11-07
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Lesso, John P.
  • Frith, Peter J.
  • Pennock, John L.

Abstract

A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.

IPC Classes  ?

  • H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H03F 3/181 - Low-frequency amplifiers, e.g. audio preamplifiers
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

72.

Characterization of force-sensor equipped devices

      
Application Number 17218322
Grant Number 11733112
Status In Force
Filing Date 2021-03-31
First Publication Date 2022-10-06
Grant Date 2023-08-22
Owner Cirrus Logic Inc. (USA)
Inventor
  • Birchall, Tom
  • Sepehr, Hamid
  • Campbell, Colin
  • Kulpe, Jason
  • Yong, Chin
  • Peso Parada, Pablo

Abstract

A method of recording measurement data for characterizing a response of a given type of device to an applied force, the given type defining devices of that type as comprising a defined arrangement of a surface and N force sensors of the device concerned, where N≥1, each force sensor configured to output a sensor signal, wherein in the defined arrangement the N force sensors are operatively coupled to a defined input region of the surface so as to sense a force applied to that input region, the method comprising: for a specimen device of the given type, performing at least one measurement procedure, each measurement procedure comprising at least one measurement operation, each measurement operation comprising applying a defined force at a corresponding location on the input region of the device concerned and recording measurement data for that device and location based on the sensor signals of the N force sensors of that device. Also disclosed are a related computer-implemented method of generating a characterization definition for devices of the given type, a computer-implemented method of generating a configuration definition for devices of the given type for a given use case defined by a use-case definition, a method of configuring a candidate device of the given type for the given use case, and a method of assessing or calibrating a candidate device of the given type.

IPC Classes  ?

  • G06F 3/04886 - Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser using a touch-screen or digitiser, e.g. input of commands through traced gestures by partitioning the display area of the touch-screen or the surface of the digitising tablet into independently controllable areas, e.g. virtual keyboards or menus
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G01L 5/16 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes for measuring several components of force

73.

Multi-output multi-phase boost converter with dynamically assignable phases

      
Application Number 17220641
Grant Number 11962180
Status In Force
Filing Date 2021-04-01
First Publication Date 2022-10-06
Grant Date 2024-04-16
Owner Cirrus Logic Inc. (USA)
Inventor
  • Marchais, Emmanuel
  • Morgan, Ross C.
  • Perry, Ivan
  • King, Eric J.

Abstract

A power delivery system may include an inductive power converter comprising a shared connection to a shared voltage from a battery, multiple inductive phases, each of the multiple inductive phases configured to generate a respective voltage from the shared voltage, multiple regulated voltage connections, and one or more switches configured and arranged to selectively assign at least one of the multiple inductive phases to a regulated voltage connection selected from the multiple regulated voltage connections.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02M 3/04 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters

74.

Audio apparatus, sensor module and user device

      
Application Number 17636495
Grant Number 11956586
Status In Force
Filing Date 2020-05-14
First Publication Date 2022-10-06
Grant Date 2024-04-09
Owner Cirrus Logic Inc. (USA)
Inventor Hatfield, Robert James

Abstract

An audio apparatus is described for communicating with a user device, the audio apparatus comprising: a sensor configured to sense a user input and to generate an input signal representing the user input; and electronic circuitry operable to receive the input signal. The electronic circuitry is configured to: process the input signal, and generate a control signal for controlling at least one switch based on the input signal.

IPC Classes  ?

  • H04R 1/10 - Earpieces; Attachments therefor
  • H04M 1/60 - Substation equipment, e.g. for use by subscribers including speech amplifiers
  • H04R 5/033 - Headphones for stereophonic communication
  • H04R 25/00 - Deaf-aid sets

75.

Pseudo-differential phase measurement and quality factor compensation

      
Application Number 17217235
Grant Number 11507199
Status In Force
Filing Date 2021-03-30
First Publication Date 2022-10-06
Grant Date 2022-11-22
Owner Cirrus Logic, Inc. (USA)
Inventor Melanson, John L.

Abstract

A system may include a resistive-inductive-capacitive sensor, a driver configured to drive the resistive-inductive-capacitive sensor with a plurality of driving signals, each driving signal of the plurality of driving signals having a respective driving frequency, and a measurement circuit communicatively coupled to the resistive-inductive-capacitive sensor and configured to measure a first value of a physical quantity associated with the resistive-inductive-capacitive sensor in response to a first driving signal of the plurality of driving signals, wherein the first driving signal has a first driving frequency; measure a second value of the physical quantity associated with the resistive-inductive-capacitive sensor in response to a second driving signal of the plurality of driving signals, wherein the second driving signal has a second driving frequency; measure a third value of the physical quantity associated with the resistive-inductive-capacitive sensor in response to the first driving signal; measure a fourth value of the physical quantity associated with the resistive-inductive-capacitive sensor in response to the second driving signal; determine a first difference between the third value and the first value; determine a second difference between the fourth value and the second value; and based on the first difference and the second difference, determine if a change in a resonant property of the resistive-inductive-capacitive sensor has occurred, and determine if a change in a quality factor of the resistive-inductive-capacitive sensor has occurred.

IPC Classes  ?

  • G06F 3/02 - Input arrangements using manually operated switches, e.g. using keyboards or dials
  • G01D 5/24 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
  • G01D 5/20 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
  • G01R 27/26 - Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants

76.

Binaural wind noise reduction

      
Application Number 17460595
Grant Number 11463809
Status In Force
Filing Date 2021-08-30
First Publication Date 2022-10-04
Grant Date 2022-10-04
Owner Cirrus Logic, Inc. (USA)
Inventor Allen, Justin L.

Abstract

A wind noise suppression system may include a local wind noise suppression block, a receiver, and a wind noise suppression fusion block. The local wind noise suppression block may be configured to analyze an audio signal and generate, based on the audio signal, local wind noise information associated with a first device comprising the wind noise suppression system, wherein the local wind noise information includes parameters for suppressing local wind noise at the first device. The receiver may be configured to receive remote wind noise information associated with a second device, wherein the remote wind noise information includes parameters for suppressing remote wind noise at the second device. The wind noise suppression fusion block may be configured to combine the local wind noise information and the remote wind noise information into fused wind noise information and apply parameters of the fused wind noise information to modify audio information for playback to an audio transducer of the first device.

IPC Classes  ?

  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • H04R 5/033 - Headphones for stereophonic communication
  • H04R 5/04 - Circuit arrangements
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04B 17/309 - Measuring or estimating channel quality parameters
  • H04W 4/20 - Services signalling; Auxiliary data signalling, i.e. transmitting data via a non-traffic channel

77.

Ratiometric current-monitor sense resistance mismatch evaluation and calibration

      
Application Number 17212124
Grant Number 11500406
Status In Force
Filing Date 2021-03-25
First Publication Date 2022-09-29
Grant Date 2022-11-15
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Zanbaghi, Ramin
  • Kimball, Eric

Abstract

Current monitoring techniques are included in an electronic system that provides power to a load from a power output stage that supplies power to a load. Multiple current control devices form the power output stage in series with multiple sense resistors that provide corresponding sense voltages indicative of current provided through the multiple current control devices to the load in the same or different time intervals. A calibration control circuit controls injection of current through the multiple sense resistors individually and measures the corresponding sense voltages generated by the current to determine resistance values of the multiple sense resistors. A correction subsystem computes a first ratio of a first resistance to a second resistance and a second ratio of a third resistance to a fourth resistance of the multiple sense resistors, and controls compensation for a difference between the first ratio and the second ratio to remove the measurement error.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion
  • G05F 1/59 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load

78.

Maximizing dynamic range in resonant sensing

      
Application Number 17215157
Grant Number 11821761
Status In Force
Filing Date 2021-03-29
First Publication Date 2022-09-29
Grant Date 2023-11-21
Owner Cirrus Logic Inc. (USA)
Inventor
  • Das, Tejasvi
  • Maru, Siddharth
  • Melanson, John L.

Abstract

A system may include a resistive-inductive-capacitive sensor configured to sense a physical quantity, and a measurement circuit communicatively coupled to the resistive-inductive-capacitive sensor and configured to measure one or more resonance parameters associated with the resistive-inductive-capacitive sensor and indicative of the physical quantity and, in order to maximize dynamic range in determining the physical quantity from the one or more resonance parameters, dynamically modify, across the dynamic range, either of reliance on the one or more resonance parameters in determining the physical quantity or one or more resonance properties of the resistive-inductive-capacitive sensor.

IPC Classes  ?

  • G01D 5/20 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature

79.

Methods and apparatus for obtaining biometric data

      
Application Number 17839938
Grant Number 11710475
Status In Force
Filing Date 2022-06-14
First Publication Date 2022-09-29
Grant Date 2023-07-25
Owner Cirrus Logic, Inc. (USA)
Inventor Lesso, John P.

Abstract

A method of modelling speech of a user of a headset comprising a microphone, the method comprising: receiving a first sample, from a bone-conduction sensor, representing bone-conducted speech of the user; obtaining a measure of fundamental frequency of the bone-conducted speech in each of a plurality of speech frames of the first sample; obtaining a first distribution of the fundamental frequencies of the bone-conducted speech over the plurality of speech frames; receiving, from the microphone, a second sample; determining a first acoustic condition at the headset based on the second signal; performing a biometric process based on the first distribution of fundamental frequencies and the first acoustic condition.

IPC Classes  ?

  • G10L 13/04 - Methods for producing synthetic speech; Speech synthesisers - Details of speech synthesis systems, e.g. synthesiser structure or memory management
  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G10L 17/06 - Decision making techniques; Pattern matching strategies
  • G10L 25/15 - Speech or voice analysis techniques not restricted to a single one of groups characterised by the type of extracted parameters the extracted parameters being formant information
  • G10L 17/04 - Training, enrolment or model building

80.

Gain and mismatch calibration for a phase detector used in an inductive sensor

      
Application Number 17215117
Grant Number 11808669
Status In Force
Filing Date 2021-03-29
First Publication Date 2022-09-29
Grant Date 2023-11-07
Owner Cirrus Logic Inc. (USA)
Inventor
  • Das, Tejasvi
  • Maru, Siddharth
  • Melanson, John L

Abstract

A system may include a resonant sensor configured to sense a physical quantity, a measurement circuit communicatively coupled to the resonant sensor and configured to measure one or more resonance parameters associated with the resonant sensor and indicative of the physical quantity using an incident/quadrature detector having an incident channel and a quadrature channel and perform a calibration of a non-ideality between the incident channel and the quadrature channel of the system, the calibration comprising determining the non-ideality by controlling the sensor signal, an oscillation signal for the incident channel, and an oscillation signal for the quadrature channel; and correcting for the non-ideality.

IPC Classes  ?

  • H03B 21/00 - Generation of oscillations by combining unmodulated signals of different frequencies
  • G01N 27/02 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance

81.

Systems and methods for active noise cancellation including secondary path estimation for playback correction

      
Application Number 17358485
Grant Number 11457312
Status In Force
Filing Date 2021-06-25
First Publication Date 2022-09-27
Grant Date 2022-09-27
Owner Cirrus Logic, Inc. (USA)
Inventor Sira, Sandeep P.

Abstract

A device may include a housing, a transducer coupled to the housing for reproducing an audio signal including both a source audio signal for playback to a listener and an anti-noise signal for countering the effects of ambient audio sounds in an acoustic output of the transducer, an error microphone coupled to the housing in proximity to the transducer for providing an error microphone signal indicative of the acoustic output of the transducer and the ambient audio sounds at the transducer, and a processing circuit. The processing circuit may implement a feedback filter having a response that generates the anti-noise signal from a playback corrected error, the playback corrected error based on a difference between the error microphone signal and a secondary path estimate signal, an adaptive secondary path estimate filter configured to model an electro-acoustic path of the source audio signal and have a secondary path estimate response that generates the secondary path estimate signal from the source audio signal, and a coefficient control block that shapes the response of the secondary path estimate filter in conformity with a reference signal and an internal error signal in order to minimize the ambient audio sounds at the transducer, wherein the reference signal is equal to a sum of the source audio signal and the anti-noise signal.

IPC Classes  ?

  • H04R 3/02 - Circuits for transducers for preventing acoustic reaction

82.

Timing signal synchronisation

      
Application Number 17331967
Grant Number 11455002
Status In Force
Filing Date 2021-05-27
First Publication Date 2022-09-27
Grant Date 2022-09-27
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Whyte, Neil
  • Brewster, Andy
  • Black, Angus

Abstract

A device comprising: a data interface comprising: a data input for receiving a data signal; a clock input for receiving a clock signal for clocking the data signal; and a timing input for receiving a first timing signal having a first frequency; and a timing signal generator configured to generate, based on the first timing signal and the data signal, a second timing signal having a second frequency, the first frequency being a integer multiple of the second frequency, a phase of the second timing signal being aligned with an event in the data signal.

IPC Classes  ?

  • G06F 1/12 - Synchronisation of different clock signals
  • G06F 1/08 - Clock generators with changeable or programmable clock frequency
  • G06F 1/10 - Distribution of clock signals

83.

Apparatus and method for obtaining directional audio signals

      
Application Number 17205352
Grant Number 11477569
Status In Force
Filing Date 2021-03-18
First Publication Date 2022-09-22
Grant Date 2022-10-18
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Zhou, Dayong
  • Zwernemann, Brad

Abstract

A method of obtaining a directional microphone signal, the method comprising: receiving first and second microphone signals from first and second microphones separated by a distance; obtaining a combined microphone signal based on one or more of the first and second microphone signals; obtaining a difference microphone signal by subtracting the second microphone signal from the first microphone signal; obtaining a transformed combined microphone signal by applying a Hilbert transform to the combined microphone signal; combining the transformed combined microphone signal with the difference microphone signal to obtain the directional microphone signal.

IPC Classes  ?

  • H04R 5/00 - Stereophonic arrangements
  • H04R 1/40 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers
  • H04R 3/00 - Circuits for transducers
  • G06F 17/14 - Fourier, Walsh or analogous domain transformations
  • H04R 29/00 - Monitoring arrangements; Testing arrangements

84.

Low power high precision piecewise linear (PWL) waveform generator

      
Application Number 17343084
Grant Number 11451215
Status In Force
Filing Date 2021-06-09
First Publication Date 2022-09-20
Grant Date 2022-09-20
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Song, Miao
  • Zhao, Xin
  • Das, Tejasvi
  • Wardlaw, Jason
  • Kost, Michael A.

Abstract

A piece-wise linear (PWL) waveform generator includes a current generator that generates a reference current, an output capacitor across which an output voltage is developed to form a PWL waveform, charging and discharging current sources for charging/discharging the output capacitor based on the reference current, a clock-controlled switch network for controlling the charging/discharging of the output capacitor, and a feedback control loop that senses the output voltage and controls the current generator to vary the reference current based on the output voltage. A first switch controlled by a first clock signal periodically connects/disconnects a current source output to/from a load impedance and a second switch controlled by a second clock signal periodically connects/disconnects a capacitor to/from the current source while disconnected from the load impedance. The capacitor capacitance is based on a predetermined voltage to mitigate glitching when the first switch connects the current source output to the load impedance.

IPC Classes  ?

  • H03K 3/011 - Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature
  • H03K 4/08 - Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
  • G06F 1/04 - Generating or distributing clock signals or signals derived directly therefrom

85.

Amplifier circuitry

      
Application Number 17189873
Grant Number 11552609
Status In Force
Filing Date 2021-03-02
First Publication Date 2022-09-08
Grant Date 2023-01-10
Owner Cirrus Logic, Inc. (USA)
Inventor Lesso, John P.

Abstract

SL) of signal level of the output signal.

IPC Classes  ?

  • H03F 3/38 - Dc amplifiers with modulator at input and demodulator at output; Modulators or demodulators specially adapted for use in such amplifiers
  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03F 3/72 - Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation

86.

Driver circuitry

      
Application Number 17538169
Grant Number 11594958
Status In Force
Filing Date 2021-11-30
First Publication Date 2022-09-08
Grant Date 2023-02-28
Owner Cirrus Logic, Inc. (USA)
Inventor
  • King, Eric J.
  • Thomsen, Axel
  • Doy, Anthony S.
  • Hoff, Thomas H.
  • Melanson, John L.

Abstract

Driver circuitry for driving a load based on an input signal, comprising: at least one variable boost stage comprising: first and second input nodes configured to receive a first voltage and a second voltage respectively; first and second flying capacitor nodes for connection to a flying capacitor therebetween; a network of switching paths for selectively connecting the first and second input nodes with the first and second flying capacitor nodes; an output stage for selectively connecting a driver output node to each of the first and second flying capacitor nodes; and a controller operable in a first boost mode to: control the output stage to selectively connect the driver output node to the first flying capacitor node; control the network of switching paths to switch connection of the second flying capacitor node between the first and second input nodes at a controlled duty cycle; and in a first charge top-up cycle, control the network of switching paths to connect the first input node to the first flying capacitor node during a phase of the controlled duty cycle in which the first input node is connected to the second flying capacitor node; wherein the frequency of the controlled duty cycle is greater than the frequency of the charge top-up cycle.

IPC Classes  ?

  • H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 3/156 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators

87.

Frequency-selective common-mode control and output stage biasing in an operational amplifier for a class-D amplifier loop filter

      
Application Number 17194395
Grant Number 11522509
Status In Force
Filing Date 2021-03-08
First Publication Date 2022-09-08
Grant Date 2022-12-06
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Zhao, Xin
  • Das, Tejasvi
  • Fei, Xiaofan

Abstract

An operational amplifier with one or more fully-differential amplifier stages has a common-mode control input. A low-frequency feedback control path is coupled between an output of the fully-differential amplifier stages and the common-mode control input to control low-frequency drift of the common-mode voltage of the output of the stages. A high-frequency feed-forward control path couples a pair of inputs of the stages to control high-frequency ripple of a common-mode voltage of the inputs of the stages. One or more of the differential amplifier stages may have a bias input that controls a direct-current (DC) bias voltage of gates of pull-up transistors of the stage that is both DC and capacitively coupled to the gates so that the stage operates with class A bias at DC and with class AB bias at high frequencies.

IPC Classes  ?

88.

Communication apparatus with ambient noise reduction

      
Application Number 17748472
Grant Number 11741935
Status In Force
Filing Date 2022-05-19
First Publication Date 2022-09-01
Grant Date 2023-08-29
Owner Cirrus Logic, Inc. (USA)
Inventor Sibbald, Alastair

Abstract

A host device configured to be wirelessly coupled to an accessory device, the host device comprising noise reduction circuitry, wherein, in use of the host device: a signal generated by a microphone of the accessory device in response to ambient noise is supplied to the noise reduction circuitry; the noise reduction circuitry applies a noise reduction transfer function to the signal supplied thereto to generate a noise cancellation signal; and the noise cancellation signal is supplied to at least one loudspeaker of the accessory device; and wherein the noise reduction transfer function applied by the noise reduction circuitry is user selectable or user adjustable.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04M 1/60 - Substation equipment, e.g. for use by subscribers including speech amplifiers
  • H04R 1/10 - Earpieces; Attachments therefor
  • G10K 11/16 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general
  • H04R 5/033 - Headphones for stereophonic communication
  • H04M 1/72412 - User interfaces specially adapted for cordless or mobile telephones with means for local support of applications that increase the functionality by interfacing with external accessories using two-way short-range wireless interfaces

89.

Class D amplifier circuitry

      
Application Number 17186741
Grant Number 11588452
Status In Force
Filing Date 2021-02-26
First Publication Date 2022-09-01
Grant Date 2023-02-21
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Lesso, John P.
  • Singleton, David P.

Abstract

Class D amplifier circuitry comprising: modulator circuitry; and output stage circuitry, wherein the modulator circuitry is configured to: receive an input signal and first and second carrier signals, wherein the second carrier signal is offset in amplitude with respect to the first carrier signal; generate first and second modulated output signals, each of the first and second modulated output signals being based on the input signal and the first and second carrier signals; and generate a plurality of control signals for the output stage circuitry per signal period of the modulated output signals, wherein the plurality of control signals are based on the first and second modulated output signals, and wherein at least one of the plurality of control signals per signal period comprises a signal level transition.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion

90.

Current sensing

      
Application Number 17678345
Grant Number 11815534
Status In Force
Filing Date 2022-02-23
First Publication Date 2022-09-01
Grant Date 2023-11-14
Owner Cirrus Logic Inc. (USA)
Inventor
  • Rashid, Tahir
  • Mistry, Mehul

Abstract

This invention relates to current sensing, in particular for a signal processing circuit (500) for outputting an output signal (Sout) based on an input signal (Sin). An output stage (101) includes an output transistor (102) driven, in use, by a drive signal. A current monitor (501) is configured to monitor, in use, a first current through the output transistor, wherein the current monitor comprises a current sensor (105) having a sense transistor (106) configured to be driven based on the drive signal so as to generate a sense current related to the first current. A compensation controller (301) receives an indication of signal level of the input signal and controllably varies operation of the current monitor (501) so as to at least partially compensate for signal-dependent variation in a relationship between the first current and the first sense current.

IPC Classes  ?

  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
  • H03G 3/30 - Automatic control in amplifiers having semiconductor devices

91.

Determining a temperature coefficient value of a resistor

      
Application Number 17185514
Grant Number 11639911
Status In Force
Filing Date 2021-02-25
First Publication Date 2022-08-25
Grant Date 2023-05-02
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Kummaraguntla, Ravi K.
  • Holland, Kathryn R.

Abstract

The present disclosure relates to circuitry for determining a temperature coefficient value of a resistor. The circuitry comprises circuitry for supplying an AC current signal to the resistor, circuitry for measuring a first voltage across the resistor when the AC current signal is supplied; and processing circuitry configured to determine the temperature coefficient value based on the first voltage.

IPC Classes  ?

  • G01N 27/14 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance of an electrically-heated body in dependence upon change of temperature
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof

92.

Driver circuitry and operation

      
Application Number 17740468
Grant Number 11777495
Status In Force
Filing Date 2022-05-10
First Publication Date 2022-08-25
Grant Date 2023-10-03
Owner Cirrus Logic Inc. (USA)
Inventor
  • Melanson, John L.
  • King, Eric J.
  • Hoff, Thomas H.
  • Thomsen, Axel

Abstract

This application relates to methods and apparatus for driving a transducer with switching drivers where the switching driver has an output bridge stage for switching an output node between switching voltages and a modulator for controlling the duty cycle of the output bridge stage based on an input signal. The switching driver also includes a voltage controller for providing the switching voltages which is operable to provide different switching voltages in different driver modes. A controller is provided to control the driver mode of operation and the duty cycle of the switching driver based on the input signal, and the controller is configured to transition from a present driver mode to a new driver mode by controlling the voltage controller to provide the switching voltages for the new mode and controlling the modulator to vary the duty cycle of the output bridge stage. The change in duty cycle is controlled such that there is no substantial discontinuity in switching ripple due to the mode transition.

IPC Classes  ?

  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • H02N 2/00 - Electric machines in general using piezoelectric effect, electrostriction or magnetostriction
  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

93.

Amplifier circuitry

      
Application Number 17741149
Grant Number 11848652
Status In Force
Filing Date 2022-05-10
First Publication Date 2022-08-25
Grant Date 2023-12-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Baveja, Sameer
  • Sadati, Hamed

Abstract

P) derived from a second amplifier node which varies with the signal at the amplifier input but does not form part of said feedback loop. The comparator is configured to compare the first signal to the second signal and generate a comparison signal (COMP), wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability.

IPC Classes  ?

  • H03F 3/45 - Differential amplifiers
  • H03F 1/26 - Modifications of amplifiers to reduce influence of noise generated by amplifying elements
  • H03F 1/52 - Circuit arrangements for protecting such amplifiers

94.

Amplifier circuitry

      
Application Number 17741180
Grant Number 11855597
Status In Force
Filing Date 2022-05-10
First Publication Date 2022-08-25
Grant Date 2023-12-26
Owner Cirrus Logic Inc. (USA)
Inventor
  • Baveja, Sameer
  • Sadati, Hamed

Abstract

P) derived from a second amplifier node which varies with the signal at the amplifier input but does not form part of said feedback loop. The comparator is configured to compare the first signal to the second signal and generate a comparison signal (COMP), wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability.

IPC Classes  ?

  • H03F 3/45 - Differential amplifiers
  • H03F 1/26 - Modifications of amplifiers to reduce influence of noise generated by amplifying elements
  • H03F 1/52 - Circuit arrangements for protecting such amplifiers

95.

Dynamic range enhancement (DRE) control in adaptive noise cancellation (ANC) applications

      
Application Number 17369723
Grant Number 11423872
Status In Force
Filing Date 2021-07-07
First Publication Date 2022-08-23
Grant Date 2022-08-23
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • He, Ku
  • Fei, Xiaofan

Abstract

A system that reproduces an output signal including dynamic range enhancement (DRE) reduces audible artifacts generated by changes in operating range of the dynamic range enhancement (DRE) when the output signal includes an adaptive noise canceling (ANC) component. A first detection circuit determines an input signal amplitude and a second detection circuit determines a measure of an amplitude of a noise canceling component of the input signal. A control circuit determines whether the amplitude of the noise canceling component is significant with respect to the input signal amplitude and controls characteristics of a dynamic range enhancer to override a default behavior of the dynamic range enhancer if the amplitude of the noise-canceling component is significant with respect to the input signal amplitude. The characteristics may include rise/fall times of a gain control of the dynamic range enhancer and may be controlled in multiple separate frequency bands.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

96.

Reproducibility of haptic waveform

      
Application Number 17728668
Grant Number 11847906
Status In Force
Filing Date 2022-04-25
First Publication Date 2022-08-18
Grant Date 2023-12-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Alderson, Jeffrey D.
  • Melanson, John L.
  • Doy, Anthony S.
  • Lindemann, Eric

Abstract

A system may include an electromagnetic load capable of generating a haptic event and a haptic processor configured to receive at least one first parameter indicative of a desired perception of the haptic event to a user of a device comprising the electromagnetic load, receive at least one second parameter indicative of one or more characteristics of the device, and process the at least one first parameter and the at least one second parameter to generate a driving signal to the electromagnetic load in order to produce the desired perception to the user despite variances in the device that cause an actual perception of the haptic event to vary from the desired perception.

IPC Classes  ?

  • H04B 3/36 - Repeater circuits
  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems
  • B06B 1/04 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy operating with electromagnetism

97.

Control methods for a force sensor system

      
Application Number 17735582
Grant Number 11692889
Status In Force
Filing Date 2022-05-03
First Publication Date 2022-08-18
Grant Date 2023-07-04
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Peso Parada, Pablo
  • Sepehr, Hamid

Abstract

A method of controlling a force sensor system to define at least one button implemented by at least one force sensor, the method comprising: receiving a force sensor input; determining a gradient of the force sensor input; and controlling the force sensor system based on the determined gradient.

IPC Classes  ?

  • G01L 5/00 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes
  • G01L 25/00 - Testing or calibrating of apparatus for measuring force, torque, work, mechanical power, or mechanical efficiency
  • G06F 3/03 - Arrangements for converting the position or the displacement of a member into a coded form
  • G01L 1/22 - Measuring force or stress, in general by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using resistance strain gauges
  • G01K 3/00 - Thermometers giving results other than momentary value of temperature

98.

Sigma-delta modulator with residue converter for low-offset measurement system

      
Application Number 17667953
Grant Number 11777516
Status In Force
Filing Date 2022-02-09
First Publication Date 2022-08-18
Grant Date 2023-10-03
Owner Cirrus Logic Inc. (USA)
Inventor
  • Melanson, John L.
  • Thomsen, Axel
  • Kozak, Mucahit
  • Wilson, Paul
  • King, Eric J.

Abstract

A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity. The sensor readout channel may include a first-order sigma-delta modulator having a modulator input and a modulator output, first outside chopping switches located at the modulator input, second outside chopping switches located at the modulator output, an auxiliary path having an analog-to-digital converter (ADC) having an auxiliary path input and an auxiliary path output, the auxiliary path input configured to receive as its input signal a signal output by a memory element of the first-order sigma-delta modulator, and a signal combiner configured to combine a modulator output signal generated by the first-order sigma-delta modulator with an auxiliary path output signal generated by the auxiliary path to generate a combined output signal.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation

99.

Chop tone management for a current sensor or a voltage sensor

      
Application Number 17173813
Grant Number 11652455
Status In Force
Filing Date 2021-02-11
First Publication Date 2022-08-11
Grant Date 2023-05-16
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Kummaraguntla, Ravi K.
  • Amadi, Christophe J.
  • Melanson, John L.
  • Thomsen, Axel
  • Tucker, John C.
  • King, Eric J.

Abstract

A signal processing system may include a signal path and a chop management circuit. The signal path may comprise a chopper configured to chop a differential input signal to the signal path at a chopping frequency and a low-pass filter downstream of the chopper and configured to filter out intermodulation products of a direct current offset of the signal path and intermodulation products of an aggressor on the differential input signal in order to generate an output signal. The chop management circuit may be communicatively coupled to the chopper and configured to, based on operational parameters associated with the signal path, dynamically manage energy of one or more clock signals used to define the chopping frequency.

IPC Classes  ?

  • H03F 3/387 - Dc amplifiers with modulator at input and demodulator at output; Modulators or demodulators specially adapted for use in such amplifiers with semiconductor devices only
  • G01R 31/3842 - Arrangements for monitoring battery or accumulator variables, e.g. SoC combining voltage and current measurements
  • G01R 31/40 - Testing power supplies
  • H03F 3/181 - Low-frequency amplifiers, e.g. audio preamplifiers

100.

Predictive sensor tracking optimization in multi-sensor sensing applications

      
Application Number 17170174
Grant Number 11619519
Status In Force
Filing Date 2021-02-08
First Publication Date 2022-08-11
Grant Date 2023-04-04
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Lapointe, Luke
  • Maru, Siddharth
  • Das, Tejasvi

Abstract

A system may include a plurality of sensors, a measurement circuit communicatively coupled to the plurality of sensors and configured to measure one or more physical quantities associated with the plurality of sensors, and a predictive optimization subsystem configured to detect an event associated with a first sensor of the plurality of sensors and responsive to the event, execute a predictive action with respect to one or more of the other sensors of the plurality of sensors.

IPC Classes  ?

  • G01D 5/14 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
  • G01D 5/20 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
  • G06N 20/00 - Machine learning
  • G01K 11/00 - Measuring temperature based on physical or chemical changes not covered by group , , , or
  • G01K 13/00 - Thermometers specially adapted for specific purposes
  • G06F 3/02 - Input arrangements using manually operated switches, e.g. using keyboards or dials
  • G06N 5/04 - Inference or reasoning models
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