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2023
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Invention
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Voltage generator for analog neural memory array.
In one example, a system comprises an analog n... |
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Invention
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Adaptive bias decoder for non-volatile memory system.
In one example, a non-volatile memory syst... |
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Invention
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Programming of a selected non-volatile memory cell by changing programming pulse characteristics.... |
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Invention
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Output circuit.
In one example, a circuit comprises an input transistor comprising a first termi... |
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Invention
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Neural network device.
In one example, a neural network device comprises a first plurality of sy... |
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Invention
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Word line driver for vector-by-matrix multiplication array.
In one example, a system comprises a... |
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Invention
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Input and output blocks for an array of memory cells.
In one example, a system comprises an arra... |
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Invention
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Determination of a bias voltage to apply to one or more memory cells in a neural network.
A firs... |
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Invention
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Determination of a bias voltage to apply to one or more memory cells.
In one example, a method c... |
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Invention
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Programming of a selected non-volatile memory cell.
In one example, a method comprises performin... |
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Invention
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Memory device of non-volatile memory cells.
A memory device includes a non-volatile memory cells... |
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Invention
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Setting levels for a programming operation in a neural network array.
In one example, a method c... |
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Invention
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Neural network array comprising one or more coarse cells and one or more fine cells.
In one exam... |
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Invention
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Method of forming pairs of three-gate non-volatile flash memory cells using two polysilicon depos... |
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Invention
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Method of scanning an image using non-volatile memory array neural network classifier.
A method ... |
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Invention
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Split array architecture for analog neural memory in a deep learning artificial neural network.
... |
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Invention
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Output circuitry for non-volatile memory array in neural network.
Numerous examples are disclose... |
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Invention
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Summing circuit for neural network.
Numerous examples of summing circuits for a neural network a... |
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2022
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Invention
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Input circuit for artificial neural network array. Numerous examples are disclosed of input circu... |
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Invention
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Multiple row programming operation in artificial neural network array. Numerous examples are disc... |
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Invention
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Output circuit for artificial neural network array. Numerous examples are disclosed of output cir... |
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Invention
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Verification method and system in artificial neural network array. of the vector-by-matrix multip... |
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Invention
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Verification method and system in artificial neural network array.
Numerous examples are disclos... |
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Invention
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Output circuit for artificial neural network array.
Numerous examples are disclosed of output ci... |
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Invention
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Input circuit for artificial neural network array.
Numerous examples are disclosed of input circ... |
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Invention
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Multiple row programming operation in artificial neural network array.
Numerous examples are dis... |
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Invention
|
Vector-by-matrix-multiplication array utilizing analog outputs. Numerous examples are disclosed o... |
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Invention
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Artificial neural network comprising a three-dimensional integrated circuit. Numerous examples ar... |
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Invention
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Vector-by-matrix-multiplication array utilizing analog inputs. Numerous examples are disclosed of... |
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Invention
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Method of screening non-volatile memory cells. A method for screening memory cells includes erasi... |
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Invention
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Artificial neural network comprising reference array for i-v slope configuration. Numerous exampl... |
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Invention
|
Method of screening non-volatile memory cells.
A method for screening memory cells includes eras... |
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Invention
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Vector-by-matrix-multiplication array utilizing analog inputs.
Numerous examples are disclosed o... |
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Invention
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Vector-by-matrix-multiplication array utilizing analog outputs.
Numerous examples are disclosed ... |
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Invention
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Artificial neural network comprising a three-dimensional integrated circuit.
Numerous examples a... |
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Invention
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Artificial neural network comprising reference array for i-v slope configuration.
Numerous examp... |
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Invention
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Method of forming memory cells, high voltage devices and logic devices on a semiconductor substra... |
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Invention
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Method of forming a device with planar split gate non-volatile memory cells, planar hv devices, a... |
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Invention
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Method of forming a semiconductor device with memory cells, high voltage devices and logic device... |
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Invention
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Calibration of electrical parameters in a deep learning artificial neural network. knnkk. |
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Invention
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Artificial neural network comprising an analog array and a digital array. Numerous examples are d... |
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Invention
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Calibration of electrical parameters in a deep learning artificial neural network. Numerous examp... |
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Invention
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Calibration of electrical parameters in a deep learning artificial neural network.
Numerous exam... |
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Invention
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Artificial neural network comprising an analog array and a digital array.
Numerous examples are ... |
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2003
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G/S
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Computer hardware, peripherals and integrated circuit components for digital, networking, wireles... |
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1998
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G/S
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Embedded controllers. Instructional manuals. |
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1991
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G/S
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computer hardware, peripherals, integrated circuit components and related documentation; namely, ... |
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1990
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G/S
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integrated circuit memories and related instruction manuals sold together as a unit |
