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2023
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Invention
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Fault-injection protection circuit for protecting against laser fault injection.
A fault-injecti... |
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Invention
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Level shifter with voltage stress durability and method for driving the same.
A level shifter in... |
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Invention
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Programming method of non-volatile memory cell.
A programming method of a non-volatile memory ce... |
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Invention
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One time programming memory cell with fin field-effect transistor using physically unclonable fun... |
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Invention
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One time programming memory cell with gate-all-around transistor for physically unclonable functi... |
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Invention
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Short channel effect based random bit generator.
A random bit generator includes a voltage sourc... |
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Invention
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Selection circuit.
A selection circuit includes a main selection circuit and an auxiliary select... |
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Invention
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Electrostatic discharge circuit.
An ESD circuit includes a first P-type transistor, a second P-t... |
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Invention
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Erasable programmable non-volatile memory cell.
A non-volatile memory cell includes a p-type wel... |
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Invention
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Voltage level shifter and operation method thereof.
A voltage level shifter includes an input tr... |
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Invention
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Antifuse-type one time programming memory cell with gate-all-around transistor.
An antifuse-type... |
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Invention
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Manufacturing method for nonvolatile charge-trapping memory apparatus.
A manufacturing method fo... |
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Invention
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Memory cell and array structure of non-volatile memory and associated control method.
A memory c... |
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Invention
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Resistive memory cell and associated cell array structure.
A resistive memory cell includes a P-... |
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Invention
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Memory cell of charge-trapping non-volatile memory.
A memory cell of a charge-trapping non-volat... |
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2022
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Invention
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Non-volatile memory and voltage detecting circuit thereof.
A voltage detecting circuit for a non... |
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Invention
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Charge pump apparatus and calibration method thereof. A charge pump apparatus includes a first ch... |
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Invention
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Sensing device for non-volatile memory.
A sensing device for a non-volatile memory includes a re... |
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Invention
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Non-volatile memory cell and non-volatile memory cell array.
A non-volatile memory cell includes... |
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Invention
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Erasable programmable single-ploy non-volatile memory cell and associated array structure.
An er... |
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Invention
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Forming control method applied to resistive random-access memory cell array.
A forming control m... |
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Invention
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Driving circuit for non-volatile memory.
A driving circuit includes a cross coupled circuit, a f... |
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Invention
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Method for manufacturing semiconductor structure and capable of controlling thicknesses of oxide ... |
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Invention
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Program control circuit for antifuse-type one time programming memory cell array. A program contr... |
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Invention
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Magnetoresistive random access memory for physically unclonable function technology and associate... |
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Invention
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High voltage switch device. A switch device includes a P-type substrate, a first gate structure, ... |
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Invention
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Resistive memory device and forming method thereof with improved forming time and improved formin... |
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Invention
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Differential memory cell array structure for multi-time programming non-volatile memory.
A diffe... |
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Invention
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Erasable programmable single-poly non-volatile memory cell and associated array structure. An era... |
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Invention
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Fuse-type one time programming memory cell.
A fuse-type one time programming memory cell include... |
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Invention
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Stacked-gate non-volatile memory cell.
A stacked-gate non-volatile memory cell includes a semico... |
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2021
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Invention
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Memory device having reference memory array structure resembling data memory array structure, and... |
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Invention
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Antifuse-type one time programming memory cell and cell array structure with same. An antifuse-ty... |
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Invention
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Integrated circuit with capability of inhibiting esd zap. An integrated circuit is provided. An E... |
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Invention
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Memory device for improving weak-program or stuck bit. Provided is a memory device including a me... |
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Invention
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Anti-fuse memory device, memory array, and programming method of an anti-fuse memory device for p... |
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Invention
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Resistive memory cell and associated cell array structure.
A cell array structure includes a fir... |
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Invention
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Memory structure and operation method thereof. A memory structure including a substrate, a gate s... |
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Invention
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Memory device capable of improving erase and program efficiency. A memory device includes a first... |
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Invention
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Charge pump circuit capable of generating voltages in erasing operation, program operation and re... |
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Invention
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Memory cell of non-volatile memory. A memory cell of a non-volatile memory includes a memory elem... |
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Invention
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Charge pump apparatus and calibration method thereof. A charge pump apparatus including a first c... |
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Invention
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Non-volatile memory with multi-level cell array and associated program control method. A non-vola... |
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Invention
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Level shifter. A level shifter includes a self-initialization circuit. The self-initialization ci... |
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Invention
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Sensing circuit and method for multi-level memory cell. A sensing circuit includes a cell clock g... |
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Invention
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Memory device and method for operating memory device. A memory device includes a well, a poly lay... |
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Invention
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Write voltage generator for non-volatile memory. A write voltage generator is connected with a ma... |
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Invention
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Memory cell array of programmable non-volatile memory. A memory cell of a memory cell array inclu... |
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2020
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Invention
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Programming and verifying method for multilevel memory cell array. A programming and verifying me... |
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2016
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G/S
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Semiconductor chips and semiconductor devices, all for use in computing devices, communication pr... |
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2012
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G/S
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Design and testing of integrated circuits for others; testing and analysis of integrated circuits... |
