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2021
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G/S
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Custom manufacture of semiconductors and integrated circuits. Custom design, engineering and test... |
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G/S
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Custom manufacture of semiconductors and integrated circuits |
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G/S
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Custom manufacture of semiconductors and integrated circuits Custom design, engineering and testi... |
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Invention
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Gate structures. The present disclosure generally relates to semiconductor structures and, more p... |
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G/S
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Semiconductors, processed semiconductor wafers, and integrated circuits Custom manufacture of sem... |
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G/S
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Semiconductors, processed semiconductor wafers, and integrated circuits. Custom manufacture of se... |
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G/S
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Semiconductors, processed semiconductor wafers, and integrated circuits |
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G/S
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Semiconductors, processed semi-conductor wafers, and integrated circuits Custom manufacture of s... |
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G/S
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Semiconductors, processed semi-conductor wafers, and integrated circuits. Custom manufacture of s... |
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G/S
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Semiconductors, processed semi-conductor wafers, and integrated circuits |
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G/S
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Semiconductors, processed semi-conductor wafers, and integrated circuits |
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G/S
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Semiconductors, processed semi-conductor wafers, and integrated circuits. |
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2020
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Invention
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Tight pitch wirings and capacitor(s). The present disclosure relates to semiconductor structures ... |
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Invention
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Diode structures. The present disclosure relates to semiconductor structures and, more particular... |
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Invention
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Dual thickness fuse structures. The present disclosure relates to semiconductor structures and, m... |
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Invention
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Metal on metal multiple patterning. The present disclosure relates to a structure which includes ... |
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Invention
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Forming replacement low-k spacer in tight pitch fin field effect transistors. A semiconductor dev... |
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2019
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Invention
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Methods, apparatus, and system for reducing leakage current in semiconductor devices.
Methods, a... |
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Invention
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Dual metal-insulator-semiconductor contact structure and formulation method. A method of making a... |
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Invention
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Chamferless via structures. Chamferless via structures and methods of manufacture are provided. T... |
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Invention
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Semiconductor device with transistor local interconnects. A semiconductor device includes a subst... |
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Invention
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Contacts formed with self-aligned cuts.
Structures and methods of fabricating structures that in... |
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Invention
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Line end structures for semiconductor devices. A method of fabricating a semiconductor device str... |
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Invention
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Compact device structures for a bipolar junction transistor.
Device structures for a bipolar jun... |
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Invention
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Dual-curvature cavity for epitaxial semiconductor growth.
Methods of forming a field-effect tran... |
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Invention
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Low resistance source drain contact formation with trench metastable alloys and laser annealing. ... |
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Invention
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Isolation structures of finfet semiconductor devices.
A method of fabricating a semiconductor de... |
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Invention
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Semiconductor structure with shaped trench and methods of forming the same.
The present disclosu... |
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2018
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Invention
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Inverter structure with different sized contacts.
An inverter structure includes a p-type field ... |
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Invention
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Semiconductor devices having equal thickness gate spacers. A method is presented for forming equa... |
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Invention
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Methods of forming stress liners using atomic layer deposition to form gapfill seams.
One illust... |
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Invention
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Stacked semiconductor devices and method of manufacturing the same.
The present disclosure relat... |
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Invention
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Methods, apparatus, and system to control gate height and cap thickness across multiple gates.
A... |
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Invention
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Methods, apparatus and system for automated reticle movement for semiconductor processing.
At le... |
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Invention
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Wafer distortion measurement and overlay correction.
A method includes measuring a topography of... |
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Invention
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Waveguide bends with mode-confining structures.
Waveguide bends and methods of fabricating waveg... |
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Invention
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Semiconductor device with improved gate-source/drain metallization isolation.
A method of formin... |
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Invention
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Semiconductor device structure and method of forming such a semiconductor device structure.
The ... |
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Invention
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Transistors having double spacers at tops of gate conductors.
Methods form transistor devices th... |
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Invention
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Method for forming and trimming gate cut structure.
A method includes forming a semiconductor de... |
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Invention
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Material combinations for polish stops and gate caps.
Structures for a field-effect transistor a... |
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Invention
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Vertical-transport field-effect transistors with self-aligned contacts. Methods of forming contac... |
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Invention
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Field-effect transistors with a composite channel.
Device structures for a field-effect transist... |
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Invention
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Bitcell layout for a two-port sram cell employing vertical-transport field-effect transistors.
S... |
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Invention
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Photolithography system and method using a reticle with multiple different sets of redundant fram... |
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Invention
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Device structures formed with a silicon-on-insulator substrate that includes a trap-rich layer.
... |
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Invention
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Rule check structures.
The present disclosure generally relates to semiconductor structures and,... |
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Invention
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Photolithography system and method incorporating a photomask-pellicle apparatus with an angled pe... |
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Invention
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Air gap formation in back-end-of-line structures.
Interconnect structures and methods for formin... |
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Invention
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Shielded mram cell. One illustrative integrated circuit (IC) product disclosed herein includes an... |
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Invention
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Methods of shielding an embedded mram array on an integrated circuit product comprising cmos base... |
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Invention
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Inspection units with ultraviolet radiation sources operating at different wavelengths.
Inspecti... |
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Invention
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Single work function enablement for silicon nanowire device.
A method of forming nanosheet and n... |
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Invention
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Back-end-of-line structures with air gaps.
Interconnect structures and methods for forming an in... |
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2017
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Invention
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Comparator having differential fdsoi transistor pair with gate connected to back-gate to reduce r... |
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Invention
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Semiconductor structure with substantially straight contact profile.
The present disclosure rela... |
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Invention
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Methods of forming conductive lines and vias and the resulting structures.
One illustrative meth... |
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Invention
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Self-aligned gate isolation.
Fin field effect transistors (FinFETs) and their methods of manufac... |
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Invention
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Methods for forming ic structure having recessed gate spacers and related ic structures.
The pre... |
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2016
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Invention
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Rov hot-stab with integrated sensor. An ROV hot-stab device (100) comprising a hot stab body (102... |
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G/S
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Custom manufacture of semiconductors and integrated circuits; manufacturing consultation services... |
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2015
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G/S
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Semiconductors, processed wafers, and integrated circuits. Custom manufacture of semiconductors a... |
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2012
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G/S
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Custom manufacture of semiconductors and integrated circuits; custom design, engineering and test... |
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2010
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G/S
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Semiconductors; processed semiconductor photomasks. Custom manufacture of semiconductors and inte... |
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2009
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G/S
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Semiconductors, processed wafers, and integrated circuits. |
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G/S
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Semiconductors, processed wafers, and integrated circuits. |
