Ibiden Co., Ltd.

Japan

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        Patent 1,728
        Trademark 12
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        United States 956
        World 778
        Europe 5
        Canada 1
Owner / Subsidiary
[Owner] Ibiden Co., Ltd. 1,735
Ibiden Porzellanfabrik Frauenthal GmbH 5
Ibiden Greentec Co. Ltd. 2
Date
New (last 4 weeks) 15
2024 October 20
2024 September 14
2024 August 15
2024 July 15
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IPC Class
H05K 3/46 - Manufacturing multi-layer circuits 285
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits 247
B01J 35/04 - Foraminous structures, sieves, grids, honeycombs 226
B01D 39/20 - Other self-supporting filtering material of inorganic material, e.g. asbestos paper or metallic filtering material of non-woven wires 183
H05K 1/02 - Printed circuits - Details 167
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NICE Class
09 - Scientific and electric apparatus and instruments 9
17 - Rubber and plastic; packing and insulating materials 9
01 - Chemical and biological materials for industrial, scientific and agricultural use 8
07 - Machines and machine tools 7
11 - Environmental control apparatus 3
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Status
Pending 123
Registered / In Force 1,617
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1.

WIRING SUBSTRATE

      
Application Number 18643279
Status Pending
Filing Date 2024-04-23
First Publication Date 2024-10-31
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kuwabara, Masashi
  • Kagohashi, Susumu
  • Sakai, Jun
  • Yoshikawa, Kyohei

Abstract

A wiring substrate includes a first build-up part including an insulating layer and a conductor layer, and a second build-up part laminated on the first build-up part and including an insulating layer and a conductor layer. The minimum width and minimum inter-wiring distance of wirings in the first build-up part are smaller than the minimum width and minimum inter-wiring distance of wirings in the second build-up part. The insulating layer in the first build-up part includes resin and inorganic particles including first inorganic particles partially embedded in the resin and second inorganic particles completely embedded in the resin such that the first inorganic particles have first portions protruding from the resin and second portions embedded in the resin, respectively. The insulating layer of the first build-up part has a surface covered by the conductor layer and including a surface of the resin and exposed surfaces of the first portions.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/03 - Use of materials for the substrate

2.

WIRING SUBSTRATE

      
Application Number 18646819
Status Pending
Filing Date 2024-04-26
First Publication Date 2024-10-31
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kuwabara, Masashi
  • Kagohashi, Susumu
  • Sakai, Jun
  • Yoshikawa, Kyohei

Abstract

A wiring substrate includes a first build-up part including first insulating layers, first conductor layers, and first via conductors, and a second build-up part including second insulating layers and second conductor layers. The minimum wiring width and minimum inter-wiring distance in the first conductor layers are smaller than the minimum wiring width and minimum inter-wiring distance in the second conductor layers. The first conductor layers and via conductors include a first layer and a second layer formed on the first layer. The first layer includes a lower layer including a sputtering film including an alloy including copper, aluminum, and at least one element selected from nickel, zinc, gallium, silicon, and magnesium, and an upper layer including a sputtering film including copper. The lower layer is formed in contact with surfaces of the first insulating layers and inner wall surfaces and bottom surfaces in via openings for the first via conductors.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups

3.

BUS BAR AND METHOD FOR PRODUCING SAME, AND POWER STORAGE DEVICE

      
Application Number JP2024010611
Publication Number 2024/219137
Status In Force
Filing Date 2024-03-18
Publication Date 2024-10-24
Owner IBIDEN CO., LTD. (Japan)
Inventor Goto Shinnosuke

Abstract

Provided are a bus bar in which an insulating film is formed in a desired region and peeling or the like of the insulating film can be suppressed, even if a bus bar body has a complicated shape, and a method for producing the same. A bus bar (20) has a bus bar body (25) and an insulating film (10) formed on the surface of the bus bar body (25). The bus bar body (25) has a pair of main surface portions (25a) that face each other, a plurality of end surface portions (25b) that join the facing main surface portions (25a) to each other, and corner portions (25c) that are formed between the main surface portions (25a) and the end surface portions (25b). The outer surfaces of the insulating film (10) formed on the corner portions (25c) of the bus bar body (25) have R shapes. In addition, the film thickness of the insulating film (10) formed on the corner portions (25c) of the bus bar body (25) is greater than the film thickness of the insulating film (10) formed on the main surface portions (25a) of the bus bar body (25).

IPC Classes  ?

  • H01B 7/00 - Insulated conductors or cables characterised by their form
  • C09D 7/43 - Thickening agents
  • C09D 7/61 - Additives non-macromolecular inorganic
  • C09D 183/04 - Polysiloxanes
  • H01B 13/00 - Apparatus or processes specially adapted for manufacturing conductors or cables
  • H02G 3/22 - Installations of cables or lines through walls, floors or ceilings, e.g. into buildings

4.

WIRING SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18631441
Status Pending
Filing Date 2024-04-10
First Publication Date 2024-10-17
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Wada, Kentaro
  • Kondo, Koji
  • Kunieda, Kenji
  • Umetsu, Masashi
  • Okaga, Yuta

Abstract

A wiring substrate includes insulating layers including a first insulating layer and a second insulating layer, conductive layers including a first conductive layer including a pad and a second conductive layer, a coating film covering the first conductive layer including the pad and improving adhesion between the first conductive layer and the second insulating layer, and a via conductor formed in a through hole penetrating through the second insulating layer and the coating film on the pad and connecting the pad and the second conductive layer. The pad has a surface formed such that a root mean square roughness of the surface is in a range of 0.10 μm to 0.23 μm, and a peeling part is formed between the pad and the second insulating layer such that the peeling part is formed within 15 μm around an outer edge of the through hole on the surface of the pad.

IPC Classes  ?

  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material

5.

COIL SUBSTRATE, COIL SUBSTRATE FOR MOTOR, AND MOTOR

      
Application Number JP2024014092
Publication Number 2024/214649
Status In Force
Filing Date 2024-04-05
Publication Date 2024-10-17
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Hirasawa Takahisa
  • Furuno Takayuki

Abstract

Provided are a coil substrate, a coil substrate for a motor, and a motor with which it is possible to maintain a circular shape of a cross-section of the coil substrate even when the density of the coil wiring is increased, or the size of the coil substrate is reduced. The coil substrate according to an embodiment comprises a flexible substrate, a coil that is a first wiring on a first surface of the flexible substrate, and a coil that is a second wiring on a second surface of the flexible substrate. The coil that is the first wiring and the coil that is the second wiring are arranged with a plurality of coils arranged from a first side to a second side of the flexible substrate. The flexible substrate includes a first region near one end, a second region adjacent to the other end side of the first region, and a third region that is positioned near the other end and adjacent to the other end side of the second region. A first insulating layer is formed on the first surface and a second insulating layer is formed on the second surface. In the first region, the first insulating layer is not formed, while the second insulating layer is formed. In the second region, the first insulating layer and the second insulating layer are formed.

IPC Classes  ?

  • H02K 3/26 - Windings characterised by the conductor shape, form or construction, e.g. with bar conductors consisting of printed conductors
  • H01F 5/00 - Coils

6.

WIRING SUBSTRATE

      
Application Number 18623091
Status Pending
Filing Date 2024-04-01
First Publication Date 2024-10-10
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kuwabara, Masashi
  • Kagohashi, Susumu

Abstract

A wiring substrate includes a core substrate having a through-hole conductor, a resin insulating layer formed on the core substrate, a conductor layer formed on the insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor formed in the insulating layer. The via conductor electrically connects the through-hole conductor and conductor layer. The via conductor includes the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a glass substrate and has a through hole penetrating through the glass substrate. The through-hole conductor is formed in the through hole. The seed layer is covering inner wall surface of the insulating layer in opening in which the via conductor is formed. The seed layer has a first portion and a second portion electrically connected to the first portion. That part of the first portion is formed on the second portion.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/02 - Printed circuits - Details
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/09 - Use of materials for the metallic pattern
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
  • H05K 3/42 - Plated through-holes

7.

WIRING SUBSTRATE

      
Application Number 18626395
Status Pending
Filing Date 2024-04-04
First Publication Date 2024-10-10
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kuwabara, Masashi
  • Kagohashi, Susumu

Abstract

A wiring substrate includes a first build-up part including first insulating and conductor layers, and via conductors, and a second build-up part including second insulating and conductor layers. The minimum wiring width in the first conductor layers is smaller than the minimum wiring width in the second conductor layers. The minimum inter-wiring distance in the first conductor layers is smaller than the minimum inter-wiring distance in the second conductor layers. Each first conductor layer and each via conductor include first and second layers. The first layer includes a first portion covering respective surface of the first insulating layers, a second portion covering inner wall surface in respective via opening in the first insulating layers, and a third portion covering bottom surface in the respective via opening. The thickness of the first portion is larger than the thickness of the second portion and larger than the thickness of the third portion.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

8.

WIRING SUBSTRATE

      
Application Number 18626736
Status Pending
Filing Date 2024-04-04
First Publication Date 2024-10-10
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kuwabara, Masashi
  • Sakai, Jun
  • Shimada, Shiho

Abstract

A wiring substrate includes a first build-up part including an insulating layer and a conductor layer, and a second build-up part including an insulating layer and a conductor layer. The minimum wiring width of wirings in the conductor layer of the first build-up part is smaller than the minimum wiring width of wirings in the conductor layer of the second build-up part. The minimum inter-wiring distance of the wirings in the first part is smaller than the minimum inter-wiring distance of the wirings in the second part. The first build-up part is formed such that the conductor layer includes a conductor pattern including a first metal layer, a second metal layer, and a third metal layer. The width of the first metal layer is larger than the width of the second metal layer. The width of the third metal layer is larger than the width of the first metal layer.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups

9.

METHOD OF PRODUCING INORGANIC FIBER MAT AND INORGANIC FIBER MAT

      
Application Number 18700263
Status Pending
Filing Date 2023-12-06
First Publication Date 2024-10-10
Owner IBIDEN CO., LTD. (Japan)
Inventor Yamazaki, Tomohisa

Abstract

Provided is a method of producing an inorganic fiber mat, the method including: a preparing step of preparing a first inorganic fiber molding including an organic binder attached thereto and derived from a needle-punched mat; a defibrating step of defibrating the first inorganic fiber molding to obtain defibrated inorganic fibers; and a papermaking step of forming the inorganic fiber mat by papermaking using a slurry containing the defibrated inorganic fibers.

IPC Classes  ?

  • D04H 1/72 - Non-woven fabrics formed wholly or mainly of staple fibres or like relatively short fibres characterised by the method of forming fleeces or layers, e.g. reorientation of fibres the fibres being randomly arranged
  • D04H 1/4209 - Inorganic fibres
  • D21B 1/12 - Fibrous raw materials or their mechanical treatment by dividing raw materials into small particles, e.g. fibres by wet methods; by the use of steam

10.

THERMAL INSULATION SHEET, METHOD FOR PRODUCING THERMAL INSULATION SHEET, AND BATTERY PACK

      
Application Number 18293275
Status Pending
Filing Date 2022-02-25
First Publication Date 2024-10-10
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Shimada, Shohei
  • Yamaguchi, Masataka
  • Jimbo, Naoyuki

Abstract

A thermal insulation sheet containing a thermal insulation material containing inorganic particles and a resin film covering at least a part of a surface of the thermal insulation material. A method for producing the thermal insulation sheet, including: molding a material for a thermal insulation material containing the inorganic particles into a sheet shape; and coating the surface of the thermal insulation material molded into the sheet shape with the resin film forming composition by a screen printing method or a spray coat printing method to form the resin film.

IPC Classes  ?

  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding
  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials
  • H01M 50/204 - Racks, modules or packs for multiple batteries or multiple cells
  • H01M 50/293 - Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders characterised by spacing elements or positioning means within frames, racks or packs characterised by the material

11.

SHEET FORMATION MAT AND METHOD FOR MANUFACTURING SHEET FORMATION MAT

      
Application Number JP2024006546
Publication Number 2024/209826
Status In Force
Filing Date 2024-02-22
Publication Date 2024-10-10
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Matsuda, Wataru
  • Yamazaki, Tomohisa
  • Maeda, Toshiyuki

Abstract

Provided is a sheet formation mat having sufficiently high surface pressure. This sheet formation mat is composed of inorganic fibers. The sheet formation mat is characterized: by comprising fiber bundles formed by interlacing 10 or more of the inorganic fibers so as to be twisted, as well as the inorganic fibers which do not constitute the fiber bundles. The papermaking mat is also characterized in that: the average length of the fiber bundles is 5-15 mm; the average width of the fiber bundles is 0.2-1.0 mm; the fiber bundles include fiber bundles in a wavy state; and a traced length of the fiber bundles in a wavy state measured by the following traced length measuring method is longer than the length of the fiber bundles in a wavy state by 0.1 mm or more. Traced length measuring method: A fiber bundle in a wavy state is statically placed on a flat surface. When the statically-placed fiber bundle in a wavy state is viewed from above, one end part to another end part of the fiber bundle in a wavy state is traced along the fiber bundle in a wavy state, and the traced distance is set as "the traced length of the fiber bundle in a wavy state".

IPC Classes  ?

  • F01N 3/28 - Construction of catalytic reactors
  • D04H 1/58 - Non-woven fabrics formed wholly or mainly of staple fibres or like relatively short fibres from fleeces or layers composed of fibres without existing or potential cohesive properties by applying, incorporating or activating chemical or thermoplastic bonding agents, e.g. adhesives
  • D04H 1/4209 - Inorganic fibres
  • D06M 11/45 - Oxides or hydroxides of elements of Groups 3 or 13 of the Periodic System; Aluminates
  • D06M 11/79 - Treating fibres, threads, yarns, fabrics or fibrous goods made from such materials, with inorganic substances or complexes thereof; Such treatment combined with mechanical treatment, e.g. mercerising with silicon or compounds thereof with silicon dioxide, silicic acids or their salts
  • D06M 15/09 - Cellulose ethers
  • D06M 15/55 - Epoxy resins
  • D06M 15/233 - Macromolecular compounds obtained by reactions only involving carbon-to-carbon unsaturated bonds of hydrocarbons, or reaction products thereof, e.g. afterhalogenated or sulfochlorinated aromatic, e.g. styrene
  • D06M 15/244 - Macromolecular compounds obtained by reactions only involving carbon-to-carbon unsaturated bonds of halogenated hydrocarbons
  • D06M 15/263 - Macromolecular compounds obtained by reactions only involving carbon-to-carbon unsaturated bonds of unsaturated carboxylic acids; Salts or esters thereof
  • D06M 15/327 - Macromolecular compounds obtained by reactions only involving carbon-to-carbon unsaturated bonds of unsaturated alcohols or esters thereof
  • D06M 15/693 - Treating fibres, threads, yarns, fabrics or fibrous goods made from such materials with macromolecular compounds; Such treatment combined with mechanical treatment with natural or synthetic rubber, or derivatives thereof
  • D21H 13/36 - Inorganic fibres or flakes

12.

WIRING SUBSTRATE

      
Application Number 18625662
Status Pending
Filing Date 2024-04-03
First Publication Date 2024-10-10
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kuwabara, Masashi
  • Kagohashi, Susumu

Abstract

A wiring substrate includes a first build-up part including first insulating and conductor layers, and via conductors, and a second build-up part including second insulating and conductor layers. The first build-up part is laminated on the second build-up part. The minimum wiring width of wirings in the first conductor layers is smaller than the minimum wiring width of wirings in the second conductor layers. The minimum inter-wiring distance of the wirings in the first conductor layers is smaller than the minimum inter-wiring distance of the wirings in the second conductor layers. The first conductor layers and via conductors include a first layer and a second layer. The first layer of each via conductor is covering inner wall surface in a via opening and has a first portion and a second portion. The first portion has a portion formed closer to the center of the via opening than the second portion.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits

13.

THERMAL INSULATION MATERIAL AND METHOD FOR PRODUCING THERMAL INSULATION MATERIAL

      
Application Number 18292639
Status Pending
Filing Date 2022-07-25
First Publication Date 2024-10-10
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kobayashi, Tomoya
  • Kitaguchi, Hiro

Abstract

A thermal insulation material having carbon fibers, the thermal insulation material containing; a covering layer containing pyrolytic carbon at a surface of the thermal insulation material; and a base layer containing carbon-based particles between the carbon fibers below the covering layer. A method for producing a thermal insulation material including: forming a base layer by impregnating a surface of a molded body containing carbon fibers with a slurry containing carbon-based particles; and forming a covering layer containing pyrolytic carbon on the base layer by applying a chemical vapor deposition method to the molded body in a CVD furnace.

IPC Classes  ?

  • C04B 35/83 - Carbon fibres in a carbon matrix
  • C04B 35/628 - Coating the powders
  • C04B 35/64 - Burning or sintering processes
  • C23C 16/26 - Deposition of carbon only
  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials

14.

MAT MADE BY PAPERMAKING PROCESS, WOUND BODY, AND METHOD FOR PRODUCING MAT MADE BY PAPERMAKING PROCESS

      
Application Number JP2024006533
Publication Number 2024/209825
Status In Force
Filing Date 2024-02-22
Publication Date 2024-10-10
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Matsuda, Wataru
  • Yamazaki, Tomohisa
  • Maeda, Toshiyuki

Abstract

Provided is a mat made by a papermaking process that is less likely to be cracked even when wound around a base material. A mat made by a papermaking process according to the present invention is composed of inorganic fibers, and has a first principal surface and a second principal surface facing the first principal surface. A plurality of linear protrusions are formed on the first principal surface. The protrusions are oriented in one direction in the plane direction of the first principal surface in a plan view of the mat made by a papermaking process. The protrusions have an average length of 5 to 200 mm, an average width of 1 to 50 mm, and an average height of 0.05 to 0.50 mm. At least five protrusions are formed in an arbitrary area of 10 cm by 10 cm in length and breadth on the first principal surface. The protrusions each include a fiber bundle formed by a plurality of fibers interlaced in a twisted manner.

IPC Classes  ?

  • D21H 13/36 - Inorganic fibres or flakes
  • D21H 13/40 - Inorganic fibres or flakes siliceous vitreous, e.g. mineral wool or glass fibres
  • D21H 15/02 - Pulp or paper, comprising fibres or web-forming material characterised by features other than their chemical constitution characterised by configuration
  • D21J 1/00 - Fibreboard

15.

MAT MADE BY PAPERMAKING PROCESS, AND METHOD FOR MANUFACTURING MAT MADE BY PAPERMAKING PROCESS

      
Application Number JP2024006554
Publication Number 2024/209827
Status In Force
Filing Date 2024-02-22
Publication Date 2024-10-10
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Matsuda, Wataru
  • Yamazaki, Tomohisa
  • Maeda, Toshiyuki

Abstract

Provided is a mat made by a papermaking process, the mat being less likely to have cracks even when wound around a base material, and having a sufficiently high surface pressure. The mat made by a papermaking process is configured from inorganic fibers, and is characterized by comprising a fiber bundle formed by interlacing 10 or more of the inorganic fibers in a twisted manner, and the inorganic fibers that do not constitute the fiber bundle, wherein: the average length of the fiber bundle exceeds 5 mm; and, when the mat made by a papermaking process is opened by a method indicated below for opening the mat made by a papermaking process, and a slurry including the inorganic fibers is obtained, an underwater bulk specific gravity of the inorganic fibers included in the slurry is 0.012 to 0.035 g/cm3. A method for opening the mat made by a papermaking process: Heat-treat the mat made by a papermaking process at 600°C for 1 hour. Weigh out 5.0 grams of fibers from the mat made by a papermaking process while disentangling the fibers, and put the fibers into a container containing 400 cc of water. After stirring at a speed of 1000 rpm for 10 minutes, transfer the mixture to a measuring cylinder and add water until the total capacity is 500 cc. Let the mixture stand for 30 minutes, read the height of the settled fibers, and calculate the underwater bulk specific gravity by using the following formula (1). (1): Underwater bulk specific gravity (g/cm3) = 5.0 (g)/sedimentation volume of fibers (cm3)

IPC Classes  ?

  • F01N 3/28 - Construction of catalytic reactors
  • C04B 38/00 - Porous mortars, concrete, artificial stone or ceramic ware; Preparation thereof
  • D06M 11/45 - Oxides or hydroxides of elements of Groups 3 or 13 of the Periodic System; Aluminates
  • D06M 11/79 - Treating fibres, threads, yarns, fabrics or fibrous goods made from such materials, with inorganic substances or complexes thereof; Such treatment combined with mechanical treatment, e.g. mercerising with silicon or compounds thereof with silicon dioxide, silicic acids or their salts
  • D06M 15/09 - Cellulose ethers
  • D06M 15/233 - Macromolecular compounds obtained by reactions only involving carbon-to-carbon unsaturated bonds of hydrocarbons, or reaction products thereof, e.g. afterhalogenated or sulfochlorinated aromatic, e.g. styrene
  • D06M 15/263 - Macromolecular compounds obtained by reactions only involving carbon-to-carbon unsaturated bonds of unsaturated carboxylic acids; Salts or esters thereof
  • D06M 15/333 - Macromolecular compounds obtained by reactions only involving carbon-to-carbon unsaturated bonds of unsaturated alcohols or esters thereof of vinyl acetate; Polyvinylalcohol
  • D06M 15/693 - Treating fibres, threads, yarns, fabrics or fibrous goods made from such materials with macromolecular compounds; Such treatment combined with mechanical treatment with natural or synthetic rubber, or derivatives thereof

16.

METHOD OF PRODUCING INORGANIC FIBER MAT AND INORGANIC FIBER MAT

      
Application Number 18698781
Status Pending
Filing Date 2023-12-06
First Publication Date 2024-10-03
Owner IBIDEN CO., LTD. (Japan)
Inventor Yamazaki, Tomohisa

Abstract

Provided is a method of producing an inorganic fiber mat the method including: a preparing step of preparing a first inorganic fiber molding derived from a needle-punched mat and a second inorganic fiber molding derived from a papermaking mat; a defibrating step of defibrating the first inorganic fiber molding and the second inorganic fiber molding to obtain defibrated inorganic fibers; and a papermaking step of forming the inorganic fiber mat by papermaking using a slurry containing the defibrated inorganic fibers.

IPC Classes  ?

  • D04H 1/70 - Non-woven fabrics formed wholly or mainly of staple fibres or like relatively short fibres characterised by the method of forming fleeces or layers, e.g. reorientation of fibres
  • D04H 1/4209 - Inorganic fibres
  • D04H 1/46 - Non-woven fabrics formed wholly or mainly of staple fibres or like relatively short fibres from fleeces or layers composed of fibres without existing or potential cohesive properties the fleeces or layers being consolidated by mechanical means, e.g. by rolling by needling or like operations to cause entanglement of fibres
  • D21B 1/12 - Fibrous raw materials or their mechanical treatment by dividing raw materials into small particles, e.g. fibres by wet methods; by the use of steam

17.

COVER PROTECTOR, METHOD FOR MANUFACTURING COVER PROTECTOR, AND BATTERY MODULE

      
Application Number JP2024009870
Publication Number 2024/203354
Status In Force
Filing Date 2024-03-13
Publication Date 2024-10-03
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Koga Yoshihiro
  • Shimada Shohei

Abstract

Provided are a cover protector that can protect a heat insulating material from scattered objects and can further improve heat insulation performance, a method for manufacturing the cover protector, and a battery module. A cover protector (1) comprises: a heat insulating material (2) containing inorganic particles; an inorganic fiber sheet (3); and an adhesive layer (4) that joins the heat insulating material (2) and the inorganic fiber sheet (3), and contains an organic material. When viewed in the lamination direction of the heat insulating material (2) and the inorganic fiber sheet (3), the adhesive layer (4) has a plurality of island-shaped parts (5) and a mesh-shaped part (6) that connects the island-shaped parts (5) to each other.

IPC Classes  ?

  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials
  • B32B 5/02 - Layered products characterised by the non-homogeneity or physical structure of a layer characterised by structural features of a layer comprising fibres or filaments
  • B32B 7/027 - Thermal properties
  • B32B 9/00 - Layered products essentially comprising a particular substance not covered by groups
  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding
  • H01M 50/204 - Racks, modules or packs for multiple batteries or multiple cells

18.

COVER PROTECTOR AND MANUFACTURING METHOD THEREFOR, AND BATTERY MODULE

      
Application Number JP2024009873
Publication Number 2024/203355
Status In Force
Filing Date 2024-03-13
Publication Date 2024-10-03
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Koga Yoshihiro
  • Shimada Shohei

Abstract

Provided are: a cover protector and a method for manufacturing same, capable of enhancing adhesiveness between a heat insulating material and a prescribed surface such as an inner wall surface of a battery case; and a battery module. A cover protector (10) includes: a heat insulating material (1) containing first organic fibers (3); and an organic film (2) bonded to at least a portion of a surface of the heat insulating material (1). At least a portion of the first organic fibers (3) protrudes from the surface of the heat insulating material (1). A battery module (100) includes: the cover protector (10); a storage battery (110); and a battery case (120) that accommodates the cover protector (10) and the storage battery (110).

IPC Classes  ?

  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials
  • B32B 5/02 - Layered products characterised by the non-homogeneity or physical structure of a layer characterised by structural features of a layer comprising fibres or filaments
  • B32B 7/027 - Thermal properties
  • B32B 27/12 - Layered products essentially comprising synthetic resin next to a fibrous or filamentary layer
  • H01M 10/625 - Vehicles
  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding
  • H01M 50/204 - Racks, modules or packs for multiple batteries or multiple cells

19.

HEAT INSULATING MATERIAL FOR COMBUSTION CHAMBER, WATER HEATER, AND BOILER

      
Application Number JP2024011292
Publication Number 2024/203847
Status In Force
Filing Date 2024-03-22
Publication Date 2024-10-03
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Okabe, Takahiko
  • Takeuchi, Hiroaki

Abstract

This heat insulation material for a combustion chamber is a plate-like molding including inorganic fibers, the heat insulation material being characterized in that when the bulk densities of a first main surface part, a second main surface part, and a central part between the first main surface part and the second main surface part in the thickness direction are compared, at least the bulk density of the first main surface part is smaller than the bulk density of the central part, and the first main surface part is arranged toward the inner wall surface of the combustion chamber.

IPC Classes  ?

  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials
  • F22B 37/36 - Arrangements for sheathing or casing boilers
  • F23M 5/00 - Casings; Linings; Walls
  • F24H 1/12 - Continuous-flow heaters, i.e. heaters in which heat is generated only while the water is flowing, e.g. with direct contact of the water with the heating medium in which the water is kept separate from the heating medium

20.

HEAT TRANSFER SUPPRESSING SHEET, METHOD FOR MANUFACTURING SAME, AND BATTERY MODULE

      
Application Number JP2024012288
Publication Number 2024/204375
Status In Force
Filing Date 2024-03-27
Publication Date 2024-10-03
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Onaya Naoki
  • Koga Yoshihiro

Abstract

Provided are: a heat transfer suppressing sheet which has a multilayer structure and has a more outstanding heat insulating effect and flame retarding effect, in addition to which the multilayer structure can be maintained even when exposed to a high heat or a flame from a battery cell that has undergone thermal runaway; and a battery module that is provided with the heat transfer suppressing sheet and that is extremely safe. In a heat transfer suppressing sheet (A1), a laminated body including a heat insulating material (A10) and an inorganic sheet (A20) is sewn together using a sewing thread (A30) that has a melting point lower than that of inorganic fibers of the inorganic sheet (A20), and that is preferably thinner than openings of the inorganic sheet (A20), and a battery module (A100) accommodates storage batteries (A110) in a battery case (A120), the heat transfer suppressing sheet (A1) being disposed between the storage batteries (A110), and/or the top of the battery case (A120), and/or a side wall of the battery case (A120), and/or the bottom wall of the battery case (A120).

IPC Classes  ?

  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials
  • H01M 10/613 - Cooling or keeping cold
  • H01M 10/625 - Vehicles
  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding
  • H01M 10/659 - Means for temperature control structurally associated with the cells by heat storage or buffering, e.g. heat capacity or liquid-solid phase changes or transition

21.

HEAT TRANSFER SUPPRESSION SHEET, METHOD FOR PRODUCING SAME, AND BATTERY PACK

      
Application Number JP2024004664
Publication Number 2024/202596
Status In Force
Filing Date 2024-02-09
Publication Date 2024-10-03
Owner IBIDEN CO., LTD. (Japan)
Inventor Higuchi Tatsuhiro

Abstract

The present invention provides: a heat transfer suppression sheet which has excellent thermal insulation performance; a method for producing this heat transfer suppression sheet; and a battery pack which comprises this heat transfer suppression sheet. This heat transfer suppression sheet (10) contains dry silica particles (1), while having pores (2) inside. The dry silica particles (1) have an average primary particle diameter of 25 nm or less, and the total volume of pores having a mode diameter of 68 nm or less is 10% or more with respect to the total volume of the pores. This method for producing a heat transfer suppression sheet (10) has a processing step in which a material mixture containing dry silica particles (1) is processed into a sheet shape by a dry method. The dry silica particles (1) have an average primary particle diameter of 25 nm or less.

IPC Classes  ?

  • H01M 10/613 - Cooling or keeping cold
  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials
  • H01M 10/625 - Vehicles
  • H01M 10/651 - Means for temperature control structurally associated with the cells characterised by parameters specified by a numeric value or mathematical formula, e.g. ratios, sizes or concentrations
  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding

22.

HEAT TRANSFER SUPPRESSION SHEET AND BATTERY PACK

      
Application Number JP2024011921
Publication Number 2024/204180
Status In Force
Filing Date 2024-03-26
Publication Date 2024-10-03
Owner IBIDEN CO., LTD. (Japan)
Inventor Han Mingxu

Abstract

Provided is a heat transfer suppression sheet with which heat insulation properties can be further improved, damage caused by scattered matter during thermal runaway can be suppressed, and the heat insulation properties can be maintained. Also provided is a battery pack having this heat transfer suppression sheet. A heat transfer suppression sheet (50) includes: a heat insulation material (10) having inorganic particles (4), and organic fibers (1) or inorganic fibers (15); and a mica sheet (51) laminated on at least one of a first surface (10a) and a second surface (10b), which are orthogonal to the thickness direction of the heat insulation material (10). Meanwhile, a battery pack (100) has a plurality of battery cells (20a, 20b, 20c) and the heat transfer suppression sheet (50), and the plurality of battery cells (20a, 20b, 20c) are connected in series or in parallel.

IPC Classes  ?

  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials
  • H01M 10/613 - Cooling or keeping cold
  • H01M 10/625 - Vehicles
  • H01M 10/653 - Means for temperature control structurally associated with the cells characterised by electrically insulating or thermally conductive materials
  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding

23.

ASSEMBLED BATTERY AND BATTERY PACK

      
Application Number 18275101
Status Pending
Filing Date 2022-01-31
First Publication Date 2024-09-26
Owner IBIDEN CO., LTD. (Japan)
Inventor Tange, Keisuke

Abstract

An assembled battery in which a plurality of battery cells is connected serially or in parallel, the battery cells each having an electrode surface having an electrode and a peripheral surface orthogonal to the electrode surface and being disposed such that the peripheral surfaces face each other. The assembled battery contains the battery cells, an insulating material covering the peripheral surface of the battery cells, and a heat dissipation member covering the peripheral surface of the battery cells which is covered with the insulating material. The insulating material has a plurality of holes piercing the insulating material from a surface thereof facing the battery cells to a surface thereof facing the heat dissipation member.

IPC Classes  ?

  • H01M 10/6551 - Surfaces specially adapted for heat dissipation or radiation, e.g. fins or coatings
  • H01M 10/613 - Cooling or keeping cold
  • H01M 10/653 - Means for temperature control structurally associated with the cells characterised by electrically insulating or thermally conductive materials
  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding

24.

HEAT TRANSFER SUPPRESSION SHEET, METHOD FOR PRODUCING SAME, AND BATTERY PACK

      
Application Number JP2023047120
Publication Number 2024/195249
Status In Force
Filing Date 2023-12-27
Publication Date 2024-09-26
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Watanabe Shogo
  • Ido Takahiko

Abstract

Provided is a heat transfer suppression sheet which is capable of suppressing the reduction of the service life of a battery by reducing unevenness of pressing force to a battery cell by an elastic sheet. This heat transfer suppression sheet (10) has a heat insulation material (11) that contains inorganic particles, an elastic sheet (12) that is superposed on the heat insulation material (11), and a resin film (13) that covers the heat insulation material (11) and the elastic sheet (12). The heat insulating material (11) has a pair of heat insulating material main surfaces (11a) that are orthogonal to the thickness direction, and the elastic sheet (12) has a pair of elastic sheet main surfaces (12a) that are orthogonal to the thickness direction, and a plurality of elastic sheet end surfaces (12b) that connect the pair of elastic sheet main surfaces (12a). In addition, the heat insulating material (11) and the elastic sheet (12) are superposed upon each other in such a manner that a heat insulating material main surface (11a) and an elastic sheet main surface (12a) face each other. Furthermore, at least one end surface among the plurality of elastic sheet end surfaces (12b) is inclined further inward with the distance from the heat insulating material (11) by being pressed by the resin film (13).

IPC Classes  ?

  • H01M 50/293 - Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders characterised by spacing elements or positioning means within frames, racks or packs characterised by the material
  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding
  • H01M 50/291 - Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders characterised by spacing elements or positioning means within frames, racks or packs characterised by their shape

25.

WIRING SUBSTRATE

      
Application Number 18613202
Status Pending
Filing Date 2024-03-22
First Publication Date 2024-09-26
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kuwabara, Masashi
  • Sakai, Jun
  • Fukushima, Shiho

Abstract

A wiring substrate includes a core substrate including a through-hole conductor, a first resin insulating layer, a first conductor layer including a seed layer and an electrolytic plating layer, a via conductor formed such that the via conductor electrically connects the through-hole conductor and first conductor layer, and a second resin insulating layer covering the first conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is penetrating through the glass substrate, the seed layer includes a first layer formed on the first resin insulating layer and a second layer formed on the first layer, and the first conductor layer includes a conductor circuit such that a width of the first layer is larger than a width of the second layer in the conductor circuit and a width of the electrolytic plating layer is larger than the width of the first layer in the conductor circuit.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering

26.

WIRING BOARD AND COMPONENT-MOUNTED WIRING BOARD

      
Application Number JP2024009382
Publication Number 2024/190749
Status In Force
Filing Date 2024-03-11
Publication Date 2024-09-19
Owner IBIDEN CO., LTD. (Japan)
Inventor Kunieda, Masatoshi

Abstract

The present invention suppresses a connection loss between an electronic component and a photoelectric component, and a reduction in data speed caused by the connection loss between the electronic component and the photoelectric component. A wiring board (1) according to an embodiment of the present invention comprises: a first component mounting region (A1) on a component mounting surface (1a); a photoelectric component mounting region (A0); and optical wiring (31) that can be optically connected to a photoelectric component (E0). A recess (20) is formed in the component mounting surface (1a) of the wiring board (1). The first component mounting region (A1) is provided in the recess (20). The first component mounting region (A1) at least partially overlaps the photoelectric component mounting region (A0) in a plan view.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/46 - Manufacturing multi-layer circuits

27.

FLAMEPROOF SHEET, ASSEMBLED BATTERY, AND BATTERY PACK

      
Application Number 18274553
Status Pending
Filing Date 2022-01-31
First Publication Date 2024-09-19
Owner IBIDEN CO., LTD. (Japan)
Inventor Tange, Keisuke

Abstract

A flameproof sheet for use in an assembled battery in which a plurality of battery cells is connected serially or in parallel, the battery cells each having an electrode surface having an electrode and a peripheral surface orthogonal to the electrode surface and being disposed such that the peripheral surfaces face each other. The flameproof sheet contains a pair of flameproof materials and an elastic member disposed between the pair of flameproof materials.

IPC Classes  ?

  • H01M 50/383 - Flame arresting or ignition-preventing means
  • H01M 50/209 - Racks, modules or packs for multiple batteries or multiple cells characterised by their shape adapted for prismatic or rectangular cells
  • H01M 50/213 - Racks, modules or packs for multiple batteries or multiple cells characterised by their shape adapted for cells having curved cross-section, e.g. round or elliptic
  • H01M 50/291 - Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders characterised by spacing elements or positioning means within frames, racks or packs characterised by their shape
  • H01M 50/293 - Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders characterised by spacing elements or positioning means within frames, racks or packs characterised by the material

28.

WIRING SUBSTRATE

      
Application Number 18599671
Status Pending
Filing Date 2024-03-08
First Publication Date 2024-09-12
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Furutani, Toshiki
  • Kuwabara, Masashi
  • Sakai, Jun
  • Inishi, Takuya

Abstract

A wiring substrate includes a core substrate including a glass substrate and a through-hole conductor formed in the glass substrate, a resin insulating layer formed on the core substrate and including resin and inorganic particles, a conductor layer formed on the insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor formed in the insulating layer such that the via conductor is electrically connected to the through-hole conductor formed in the glass substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The conductor layer and the via conductor are formed such that the seed layer is formed by sputtering, and the resin insulating layer has an opening in which the via conductor is formed such that the inorganic particles include first particles forming an inner wall surface in the opening and second particles embedded in the insulating layer.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering

29.

PRINTED WIRING BOARD

      
Application Number 18597975
Status Pending
Filing Date 2024-03-07
First Publication Date 2024-09-12
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Sakai, Jun
  • Yoshikawa, Kyohei
  • Hatanaka, Shunya

Abstract

A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first and second conductor layers and has a land portion extending on a boundary part of the resin insulating layer. The via conductor is formed in a via hole formed in the resin insulating layer. The resin insulating layer is formed such that the boundary part has a surface roughness that is larger than a surface roughness of the surface on which the second conductor layer formed and that an inner wall surface in the via hole in the resin insulating layer is equal to or larger than the surface roughness of the boundary part of the resin insulating layer.

IPC Classes  ?

  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering
  • H05K 3/42 - Plated through-holes

30.

WIRING SUBSTRATE

      
Application Number 18595674
Status Pending
Filing Date 2024-03-05
First Publication Date 2024-09-12
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Furutani, Toshiki
  • Yoshikawa, Kyohei
  • Inishi, Takuya
  • Sakai, Jun

Abstract

A wiring substrate includes a core substrate including a through-hole conductor, a resin insulating layer formed on the core substrate, a conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor formed in the resin insulating layer such that the via conductor is connected to the through-hole conductor in the core substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is formed in a through hole penetrating through the glass substrate, and the conductor layer and via conductor are formed such that the seed layer is formed by sputtering and includes an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering
  • H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material

31.

INSULATION FILM AND METHOD FOR FORMING SAME, AND COMPOSITE MEMBER

      
Application Number JP2023047227
Publication Number 2024/185276
Status In Force
Filing Date 2023-12-28
Publication Date 2024-09-12
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Goto Shinnosuke
  • Ushida Takeshi
  • Fujita Yoshitaka

Abstract

Provided is an insulation film which exhibits excellent heat resistance in addition to insulating properties, which does not require a winding operation such as using ceramic tape, which does not exhibit problems such as uneven winding and gaps being generated and peeling off of the film, and which can also easily be adapted to conductive base materials having complex shapes. In an insulation film (1), at least an inorganic material (20) is dispersed in a first matrix (10) comprising silicone. Further, a material of the first matrix (10) or a material of a second matrix of a different component than the first matrix (10) may be impregnated. The insulation film (1) is formed by, for example, dip coating.

IPC Classes  ?

  • H01M 50/526 - Interconnectors for connecting terminals of adjacent batteries; Interconnectors for connecting cells outside a battery casing characterised by the material having a layered structure
  • C09D 7/61 - Additives non-macromolecular inorganic
  • C09D 183/04 - Polysiloxanes
  • H01M 50/522 - Inorganic material
  • H01M 50/524 - Organic material
  • H01M 50/588 - Means for preventing undesired use or discharge for preventing incorrect connections inside or outside the batteries outside the batteries, e.g. incorrect connections of terminals or busbars
  • H01M 50/591 - Covers

32.

BUS BAR AND METHOD FOR MANUFACTURING SAME, AND ELECTRIC POWER STORAGE DEVICE

      
Application Number JP2023047220
Publication Number 2024/180897
Status In Force
Filing Date 2023-12-28
Publication Date 2024-09-06
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Goto Shinnosuke
  • Kawasaki Hironori

Abstract

Provided is a bus bar which does not require wrapping work such as ceramic tape, which does not cause problems such as the occurrence of wrapping inconsistencies, gaps, and peeling, which can be easily applied to complex shapes, and which can be simply manufactured. A bus bar (20) is used in an electric power storage device that includes a battery cell, and includes: a bus bar body (25) including a plurality of flat portions (5a, 5c, 5e), and corner portions (5d, 5b) formed between adjacent flat portions and extending linearly; and an insulating film (10) formed on the surface of the bus bar body (25). The thickness of the insulating film formed on the corner portions (5d, 5e) of the bus bar body (25) is less than the thickness of the insulating film formed on the flat portions (5a, 5c, 5e) of the bus bar body (25).

IPC Classes  ?

  • H01M 50/526 - Interconnectors for connecting terminals of adjacent batteries; Interconnectors for connecting cells outside a battery casing characterised by the material having a layered structure
  • H01M 50/505 - Interconnectors for connecting terminals of adjacent batteries; Interconnectors for connecting cells outside a battery casing comprising a single busbar
  • H01M 50/522 - Inorganic material
  • H01M 50/524 - Organic material

33.

BUS BAR AND METHOD FOR PRODUCING SAME, AND ELECTRIC POWER STORAGE DEVICE

      
Application Number JP2023047224
Publication Number 2024/180898
Status In Force
Filing Date 2023-12-28
Publication Date 2024-09-06
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kawasaki Hironori
  • Goto Shinnosuke

Abstract

The present invention provides: a bus bar which is capable of stably ensuring insulation properties; a method for producing a bus bar; and an electric power storage device. A bus bar (1) which is used for an electric power storage device that comprises a battery cell is formed by covering a bus bar main body (5) containing a conductive material with an insulating coating film (10). A corner part (7) of the bus bar main body (5) is rounded. A method for producing the bus bar (1) comprises: a step for rounding a corner part of a bus bar main body (5) that contains a conductive material; and a step for forming an insulating coating film (10) by applying an insulating coating material to the bus bar main body (5) and subsequently curing the insulating coating material. An electric power storage device according to the present invention is obtained by connecting a plurality of battery cells or battery modules by means of the bus bar.

IPC Classes  ?

  • H01M 50/526 - Interconnectors for connecting terminals of adjacent batteries; Interconnectors for connecting cells outside a battery casing characterised by the material having a layered structure
  • H01M 50/503 - Interconnectors for connecting terminals of adjacent batteries; Interconnectors for connecting cells outside a battery casing characterised by the shape of the interconnectors
  • H01M 50/505 - Interconnectors for connecting terminals of adjacent batteries; Interconnectors for connecting cells outside a battery casing comprising a single busbar
  • H01M 50/522 - Inorganic material
  • H01M 50/524 - Organic material
  • H01M 50/588 - Means for preventing undesired use or discharge for preventing incorrect connections inside or outside the batteries outside the batteries, e.g. incorrect connections of terminals or busbars
  • H01M 50/591 - Covers
  • H01M 50/548 - Terminals characterised by the disposition of the terminals on the cells on opposite sides of the cell

34.

BUS BAR, MANUFACTURING METHOD FOR BUS BAR, AND POWER STORAGE DEVICE

      
Application Number JP2023047226
Publication Number 2024/180900
Status In Force
Filing Date 2023-12-28
Publication Date 2024-09-06
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kawasaki Hironori
  • Goto Shinnosuke

Abstract

Provided are: a bus bar which can stably ensure insulation properties and can be protected from high temperature or flame caused by the occurrence of abnormalities in a battery cell; and a manufacturing method for a bus bar. This bus bar (1) has: a bus bar body (5) containing a conductive material; and a heat-resistant insulating film (10) containing a filler and covering the bus bar body, wherein the surface roughness (Ry) of the heat-resistant insulating film (10) satisfies 0

IPC Classes  ?

  • H01M 50/526 - Interconnectors for connecting terminals of adjacent batteries; Interconnectors for connecting cells outside a battery casing characterised by the material having a layered structure
  • H01M 50/505 - Interconnectors for connecting terminals of adjacent batteries; Interconnectors for connecting cells outside a battery casing comprising a single busbar
  • H01M 50/522 - Inorganic material
  • H01M 50/524 - Organic material
  • H01M 50/588 - Means for preventing undesired use or discharge for preventing incorrect connections inside or outside the batteries outside the batteries, e.g. incorrect connections of terminals or busbars
  • H01M 50/591 - Covers

35.

BUS BAR AND METHOD FOR PRODUCING SAME, AND ELECTRIC POWER STORAGE DEVICE

      
Application Number JP2023047225
Publication Number 2024/180899
Status In Force
Filing Date 2023-12-28
Publication Date 2024-09-06
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kawasaki Hironori
  • Goto Shinnosuke

Abstract

The present invention provides a bus bar which can be produced at a low cost and is capable of stably ensuring insulation properties. A bus bar (1a), which is used for an electric power storage device that comprises a battery cell, comprises: a bus bar main body (25) that contains a conductive material and has a plurality of main surfaces (a first main surface (25a) and a second main surface (25b)) that are perpendicular to a plate thickness direction (27); and an insulating film (26) that covers the bus bar main body (25). Among the plurality of main surfaces of the bus bar main body (25), the first main surface (25a) has a first region (21) in which the insulating film (26) formed on the first main surface (25a) has the maximum film thickness T1max, and a second region (22) in which the insulating film (26) formed on the first main surface (25a) has the minimum film thickness T1min. The ratio (T1max/T1min) of the maximum film thickness T1max to the minimum film thickness T1min is more than 1.0 but not more than 7.0.

IPC Classes  ?

  • H01M 50/526 - Interconnectors for connecting terminals of adjacent batteries; Interconnectors for connecting cells outside a battery casing characterised by the material having a layered structure
  • H01M 50/505 - Interconnectors for connecting terminals of adjacent batteries; Interconnectors for connecting cells outside a battery casing comprising a single busbar
  • H01M 50/522 - Inorganic material
  • H01M 50/524 - Organic material

36.

PRINTED WIRING BOARD

      
Application Number 18591021
Status Pending
Filing Date 2024-02-29
First Publication Date 2024-09-05
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Sakai, Jun
  • Yoshikawa, Kyohei
  • Hatanaka, Shunya

Abstract

A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on the resin insulating layer and including a seed layer and a metal layer on the seed layer, a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer, and a base layer formed on the resin insulating layer and including resin and one of iron and chromium in a range of 0.2 at % to 5.0 at % with respect to the resin such that the base layer includes part formed between the resin insulating layer and the seed layer.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/02 - Printed circuits - Details
  • H05K 1/03 - Use of materials for the substrate

37.

PRINTED WIRING BOARD

      
Application Number 18585113
Status Pending
Filing Date 2024-02-23
First Publication Date 2024-08-29
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kagohashi, Susumu
  • Yoshikawa, Kyohei
  • Inishi, Takuya
  • Sakai, Jun

Abstract

A printed wiring board includes a first conductor layer, a resin insulating layer including resin and inorganic particles, a second conductor layer including a seed layer and an electrolytic plating layer on the seed layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and via conductor are formed such that the seed layer includes an alloy including copper, aluminum and a metal including one or more metals selected from nickel, zinc, gallium, silicon and magnesium, and the resin insulating layer is formed such that the inorganic particles include first inorganic particles forming an inner wall surface in the opening and second inorganic particles embedded in the resin insulating layer and that shapes of the first inorganic particles are different from shapes of the second inorganic particles.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/09 - Use of materials for the metallic pattern
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 3/42 - Plated through-holes

38.

PRINTED WIRING BOARD

      
Application Number 18585129
Status Pending
Filing Date 2024-02-23
First Publication Date 2024-08-29
Owner IBIDEN CO., LTD. (Japan)
Inventor Kagohashi, Susumu

Abstract

A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on the resin insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor connecting the first conductor layer and the second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and via conductor are formed such that the seed layer includes a first layer including copper, aluminum and one or more metals selected from nickel, zinc, gallium, silicon and magnesium, and a second layer formed on the first layer and including copper. The seed layer in the via conductor has a first portion and a second portion such that the first portion is electrically connected to the second portion and has a portion formed on the second portion.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/09 - Use of materials for the metallic pattern
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 3/42 - Plated through-holes

39.

COIL SUBSTRATE, MOTOR COIL SUBSTRATE, AND MOTOR

      
Application Number JP2024004979
Publication Number 2024/172062
Status In Force
Filing Date 2024-02-14
Publication Date 2024-08-22
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Hirasawa Takahisa
  • Furuno Takayuki

Abstract

Provided are a coil substrate with which a high-performance motor can be obtained, a motor coil substrate that is formed using the coil substrate, and a motor that is formed using the motor coil substrate. A coil substrate according to the present invention comprises a flexible substrate having a first surface and a second surface on the side opposite the first surface, a coil formed by wiring provided to at least one of the first surface and the second surface, and a resin insulation layer that covers the wiring. The wiring has a first layer and a second layer covering the outer surface of the first layer. The wiring width is 60-400 µm, and the wiring thickness is 20-200 µm.

IPC Classes  ?

  • H02K 3/26 - Windings characterised by the conductor shape, form or construction, e.g. with bar conductors consisting of printed conductors

40.

WIRING SUBSTRATE

      
Application Number 18581432
Status Pending
Filing Date 2024-02-20
First Publication Date 2024-08-22
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Furutani, Toshiki
  • Kuwabara, Masashi
  • Kagohashi, Susumu

Abstract

A wiring substrate includes a core substrate including a glass substrate, a resin insulating layer including inorganic particles and resin, a conductor layer including a seed layer and an electrolytic plating layer such that the conductor layer includes signal wirings, and a via conductor formed in an opening formed in the resin insulating layer and including the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a through-hole conductor formed such that the core substrate has a through hole penetrating through the glass substrate and the through-hole conductor is formed in the through hole, the via conductor is electrically connected to the through-hole conductor formed in the core substrate, and the resin insulating layer is formed such that the surface upon which the conductor layer is formed includes the resin and an inner wall surface in the opening includes the resin and inorganic particles.

IPC Classes  ?

  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
  • H05K 3/42 - Plated through-holes

41.

COIL SUBSTRATE, MOTOR COIL SUBSTRATE, AND MOTOR

      
Application Number JP2024004980
Publication Number 2024/172063
Status In Force
Filing Date 2024-02-14
Publication Date 2024-08-22
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Hirasawa Takahisa
  • Furuno Takayuki

Abstract

Provided are: a coil substrate yielding a high-performance motor; a motor coil substrate that is formed by using the coil substrate; and a motor that is formed by using the motor coil substrate. This coil substrate has: a flexible substrate comprising a first surface and a second surface on the side opposite the first surface; a coil formed of a wiring provided to the first surface and/or the second surface; and a resin insulating layer covering the wiring. The wiring has a first layer, and a second layer coating the outer surface of the first layer. The second layer has a first portion coating the upper surface of the first layer, and a second portion coating the side surface of the first layer. The width of the wiring is 60 to 400 μm. The ratio T1/T2 of the thickness T1 of the first portion and the thickness T2 of the second portion satisfies relational expression 1. Expression 1: 1.0 < T1/T2 ≤ 1.4

IPC Classes  ?

  • H02K 3/26 - Windings characterised by the conductor shape, form or construction, e.g. with bar conductors consisting of printed conductors

42.

WIRING SUBSTRATE

      
Application Number 18640293
Status Pending
Filing Date 2024-04-19
First Publication Date 2024-08-15
Owner IBIDEN CO., LTD. (Japan)
Inventor Kunieda, Masatoshi

Abstract

A wiring substrate includes an electrical wiring part including insulating layers and conductor layers, and an optical wiring part formed on a surface of the electrical wiring part and including a support plate and an optical waveguide formed on the support plate. The optical wiring part is formed such that the optical waveguide includes at least one core part that transmits light and a cladding part surrounding the at least one core part and that the support plate has a thermal expansion coefficient that is lower than a thermal expansion coefficient of the optical waveguide.

IPC Classes  ?

  • G02B 6/122 - Basic optical elements, e.g. light-guiding paths
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/498 - Leads on insulating substrates
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits

43.

PRINTED WIRING BOARD

      
Application Number 18434888
Status Pending
Filing Date 2024-02-07
First Publication Date 2024-08-08
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kagohashi, Susumu
  • Sakai, Jun
  • Yoshikawa, Kyohei

Abstract

A printed wiring board includes a first conductor layer, a resin insulating layer including glass particles and resin, a second conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and the via conductor are formed such that the second conductor layer includes signal wirings and that the seed layer is formed by sputtering an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and the resin insulating layer is formed such that the surface of the resin insulating layer includes the resin and that an inner wall surface in the opening includes the resin and the glass particles.

IPC Classes  ?

  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/09 - Use of materials for the metallic pattern
  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
  • H05K 3/42 - Plated through-holes

44.

PENETRATION ENHANCER

      
Application Number JP2024001934
Publication Number 2024/162111
Status In Force
Filing Date 2024-01-24
Publication Date 2024-08-08
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kariya Satoru
  • Ishino Nobuyoshi

Abstract

The purpose of the present invention is to provide a penetration enhancer and an agricultural composition that can promote the penetration of organic substances into plant tissues. A penetration enhancer for organic substances in plants, comprising at least one compound selected from oxo fatty acids, derivatives thereof, or salts thereof, and hydroxylated fatty acids, derivatives thereof, or salts thereof. An agricultural composition comprising: (a) at least one compound selected from oxo fatty acids, derivatives thereof, or salts thereof; and hydroxylated fatty acids, derivatives thereof, or salts thereof; and (b) an organic substance for at least one type of plant.

IPC Classes  ?

  • A01N 25/00 - Biocides, pest repellants or attractants, or plant growth regulators, characterised by their forms, or by their non-active ingredients or by their methods of application; Substances for reducing the noxious effect of the active ingredients to organisms other than pests
  • A01N 27/00 - Biocides, pest repellants or attractants, or plant growth regulators containing hydrocarbons
  • A01N 37/44 - Biocides, pest repellants or attractants, or plant growth regulators containing organic compounds containing a carbon atom having three bonds to hetero atoms with at the most two bonds to halogen, e.g. carboxylic acids containing at least one carboxylic group or a thio-analogue, or a derivative thereof, and a nitrogen atom attached to the same carbon skeleton by a single or double bond, this nitrogen atom not being a member of a derivative or of a thio-analogue of
  • A01N 57/12 - Biocides, pest repellants or attractants, or plant growth regulators containing organic phosphorus compounds having phosphorus-to-oxygen bonds or phosphorus-to-sulfur bonds containing acyclic or cycloaliphatic radicals
  • A01N 57/16 - Biocides, pest repellants or attractants, or plant growth regulators containing organic phosphorus compounds having phosphorus-to-oxygen bonds or phosphorus-to-sulfur bonds containing heterocyclic radicals
  • A01P 21/00 - Plant growth regulators
  • A01N 37/36 - Biocides, pest repellants or attractants, or plant growth regulators containing organic compounds containing a carbon atom having three bonds to hetero atoms with at the most two bonds to halogen, e.g. carboxylic acids containing at least one carboxylic group or a thio-analogue, or a derivative thereof, and a singly bound oxygen or sulfur atom attached to the same carbon skeleton, this oxygen or sulfur atom not being a member of a carboxylic group or of a thio-anal
  • A01N 37/42 - Biocides, pest repellants or attractants, or plant growth regulators containing organic compounds containing a carbon atom having three bonds to hetero atoms with at the most two bonds to halogen, e.g. carboxylic acids containing within the same carbon skeleton a carboxylic group or a thio-analogue, or a derivative thereof, and a carbon atom having only two bonds to hetero atoms with at the most one bond to halogen, e.g. keto-carboxylic acids

45.

PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD

      
Application Number 18616256
Status Pending
Filing Date 2024-03-26
First Publication Date 2024-08-08
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Matsui, Yoshiki
  • Deguchi, Atsushi

Abstract

A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including first and second pads, a solder resist layer formed on the base layer, covering the conductor layer and having first opening exposing the first pad and second opening exposing the second pad, bumps including a first bump and a second bump such that the first bump is formed on the first conductor pad of the conductor layer and that the second bump is formed on the second conductor pad of the conductor layer. The second opening has diameter smaller than diameter of the first opening, the second bump has diameter smaller than diameter of the first bump, the first pad has a first recess formed on the first pad, the second pad has a second recess formed on the second pad, and the first recess is larger than the second recess.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/09 - Use of materials for the metallic pattern
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits

46.

PRINTED WIRING BOARD

      
Application Number 18434910
Status Pending
Filing Date 2024-02-07
First Publication Date 2024-08-08
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kagohashi, Susumu
  • Ishikawa, Kiyohiro

Abstract

A printed wiring board includes a first conductor layer, a resin insulating layer including inorganic particles and resin, a second conductor layer including a seed layer and an electrolytic plating layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The inorganic particles include first particles, second particles, third particles and fourth particles formed such that the first and second particles are solid particles, the third and fourth particles are hollow particles, the first and third particles form an inner wall surface of the opening in the resin insulating layer, the second and fourth particles are embedded in the resin insulating layer, the first particles have shapes that are different from shapes of the second particles, and the third particles have shapes that are different from shapes of the fourth particles.

IPC Classes  ?

  • H05K 1/05 - Insulated metal substrate
  • H05K 1/02 - Printed circuits - Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering

47.

WIRING SUBSTRATE

      
Application Number 18632346
Status Pending
Filing Date 2024-04-11
First Publication Date 2024-08-01
Owner IBIDEN CO., LTD. (Japan)
Inventor Kunieda, Masatoshi

Abstract

A wiring substrate includes an insulating layer, a conductor pad that is formed on a surface of the insulating layer and is connected to a component such that the insulating layer has a component region that is covered by the component connected to the conductor pad, and an optical waveguide including a core part that transmits light and is positioned on an outer side of the component region of the insulating layer such that the core part has an end surface exposed and facing a component region side. The optical waveguide is positioned such that the end surface of the core part is adjacent to the component region.

IPC Classes  ?

  • G02B 6/12 - Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits

48.

PRINTED WIRING BOARD

      
Application Number 18426547
Status Pending
Filing Date 2024-01-30
First Publication Date 2024-08-01
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Sakai, Jun
  • Shimada, Shiho

Abstract

A printed wiring board includes a conductor layer, an outermost insulating layer formed on the conductor layer and having an opening exposing a portion of the conductor layer, and a metal post formed in the opening of the outermost insulating layer and including a seed layer and an electrolytic plating layer formed on the seed layer such that the metal post has a height exceeding a surface of the outermost insulating layer and has a portion exceeding a height of the outermost insulating layer, the seed layer of the metal post has a first layer and a second layer formed on the first layer. The portion exceeding the height of the outermost insulating layer is formed such that a width of the first layer is larger than a width of the second layer, and a width of the electrolytic plating layer is larger than the width of the first layer.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/05 - Insulated metal substrate
  • H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering

49.

ANTIVIRAL SUBSTRATE, ANTIVIRAL COMPOSITION, METHOD FOR MANUFACTURING ANTIVIRAL SUBSTRATE, ANTIMICROBIAL SUBSTRATE, ANTIMICROBIAL COMPOSITION AND METHOD FOR MANUFACTURING ANTIMICROBIAL SUBSTRATE

      
Application Number 18433399
Status Pending
Filing Date 2024-02-06
First Publication Date 2024-08-01
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Horino, Katsutoshi
  • Takada, Kozo
  • Ito, Kazuhiro
  • Otsuka, Kohei
  • Tsukada, Kiyotaka

Abstract

In an antimicrobial substrate, a cured material of a binder containing a copper compound and a polymerization initiator is fixed onto a surface of a base material. At least a part of the copper compound is exposed on a surface of the cured material of the binder. A surface composition ratio of the cured material of the binder obtained by an energy dispersive X-ray analyzer is calculated on a basis of a peak intensity of a characteristic X-ray of a carbon element and a copper element that are a main constituent element of a resin component, and a weight ratio is C/Cu=28.0/1.0 to 200.0/1.0.

IPC Classes  ?

  • A01N 59/20 - Copper
  • A01N 25/04 - Dispersions or gels
  • C08F 2/20 - Suspension polymerisation with the aid of macromolecular dispersing agents
  • C08F 2/48 - Polymerisation initiated by wave energy or particle radiation by ultraviolet or visible light
  • C08F 20/18 - Esters of monohydric alcohols or phenols of phenols or of alcohols containing two or more carbon atoms with acrylic or methacrylic acids
  • C08K 5/07 - Aldehydes; Ketones
  • C09D 5/14 - Paints containing biocides, e.g. fungicides, insecticides or pesticides
  • C09D 7/63 - Additives non-macromolecular organic

50.

POWDERY PLANT ACTIVATOR

      
Application Number 18566190
Status Pending
Filing Date 2022-06-01
First Publication Date 2024-08-01
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kariya, Satoru
  • Mizuno, Katsuhide
  • Ishino, Nobuyoshi

Abstract

The objective of the invention is to provide a plant activator having a resistance to the wash-off and a superior handleability, transportability and storage stability. A powdery plant activator comprising, at least one compound selected from an oxo fatty acid or a derivative or a salt thereof and a hydroxy fatty acid or a derivative or a salt thereof, and an unsaturated fatty acid (excluding an oxo fatty acid and a hydroxy fatty acid).

IPC Classes  ?

  • A01N 37/06 - Unsaturated carboxylic acids or thio-analogues thereof; Derivatives thereof
  • A01C 21/00 - Methods of fertilising
  • A01G 22/05 - Fruit crops, e.g. strawberries, tomatoes or cucumbers
  • A01G 22/15 - Leaf crops, e.g. lettuce or spinach
  • A01G 22/22 - Rice
  • A01G 22/25 - Root crops, e.g. potatoes, yams, beet or wasabi
  • A01G 22/40 - Fabaceae, e.g. beans or peas
  • A01G 22/50 - Cotton
  • A01G 22/60 - Flowers; Ornamental plants
  • A01G 29/00 - Root feeders; Injecting fertilisers into the roots
  • A01N 25/12 - Powders or granules
  • A01N 37/36 - Biocides, pest repellants or attractants, or plant growth regulators containing organic compounds containing a carbon atom having three bonds to hetero atoms with at the most two bonds to halogen, e.g. carboxylic acids containing at least one carboxylic group or a thio-analogue, or a derivative thereof, and a singly bound oxygen or sulfur atom attached to the same carbon skeleton, this oxygen or sulfur atom not being a member of a carboxylic group or of a thio-anal
  • A01N 37/42 - Biocides, pest repellants or attractants, or plant growth regulators containing organic compounds containing a carbon atom having three bonds to hetero atoms with at the most two bonds to halogen, e.g. carboxylic acids containing within the same carbon skeleton a carboxylic group or a thio-analogue, or a derivative thereof, and a carbon atom having only two bonds to hetero atoms with at the most one bond to halogen, e.g. keto-carboxylic acids
  • A01P 21/00 - Plant growth regulators

51.

WIRING SUBSTRATE

      
Application Number 18428062
Status Pending
Filing Date 2024-01-31
First Publication Date 2024-08-01
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kuroda, Nobuhisa
  • Daizo, Tomoya

Abstract

A wiring substrate includes a first insulating layer, a first conductive layer laminated on a surface of the first insulating layer and including pads, a second insulating layer laminated on the first insulating layer such that the second insulating layer is covering the first conductive layer and has a cavity exposing the pads of the first conductive layer, an electronic component accommodated in the cavity of the second insulating layer such that the electronic component has electrodes formed on a surface of the electronic component, and a conductive connecting part formed between the electrodes of the electronic components and the pads of the first conductive layer in the cavity of the second insulating layer such that the conductive connecting part electrically connects the electrodes of the electronic components and the pads of the first conductive layer.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01L 23/498 - Leads on insulating substrates
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

52.

PRINTED WIRING BOARD

      
Application Number 18420841
Status Pending
Filing Date 2024-01-24
First Publication Date 2024-07-25
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kagohashi, Susumu
  • Sakai, Jun
  • Yoshikawa, Kyohei

Abstract

A printed wiring board includes a first conductor layer, a resin insulating layer, a second conductor layer, and a via conductor formed in an opening of the insulating layer and connecting the first conductor and second conductor layers. The second conductor layer and via conductor include a seed layer having a first portion formed on the surface of the insulating layer, a second portion formed on an inner wall surface in the opening, and a third portion formed on a portion of the first conductor layer exposed by the opening. A thickness of the first portion is greater than a thickness of the second portion and a thickness of the third portion. The seed layer includes a first layer including an alloy including copper, aluminum and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and a second layer formed on the first layer and including copper.

IPC Classes  ?

  • H05K 3/42 - Plated through-holes
  • H05K 3/14 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material
  • H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material

53.

WIRING SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18410477
Status Pending
Filing Date 2024-01-11
First Publication Date 2024-07-18
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kuroda, Nobuhisa
  • Murakami, Naoya

Abstract

A wiring substrate includes a core substrate having a cavity penetrating through the substrate, an electronic component accommodated in the cavity such that the component is positioned closer to a first surface of the substrate than a second surface of the substrate, a sealing resin filling the cavity of the substrate such that the sealing resin is covering a surface of the component on a second surface side of the substrate and that the cavity of the substrate has a portion not filled with the sealing resin on the second surface side of the substrate, and resin insulating layers including a first resin insulating layer laminated on the first surface of the substrate and a second resin insulating layer laminated on the second surface of the substrate such that a portion of the second resin insulating layer is filling the portion of the cavity not filled with the sealing resin.

IPC Classes  ?

  • H05K 3/44 - Manufacturing insulated metal core circuits
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
  • H05K 3/28 - Applying non-metallic protective coatings

54.

WIRING SUBSTRATE

      
Application Number 18414955
Status Pending
Filing Date 2024-01-17
First Publication Date 2024-07-18
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Furutani, Toshiki
  • Kuwabara, Masashi
  • Sakai, Jun
  • Inishi, Takuya

Abstract

A wiring substrate includes a first build-up part including first insulating layers and conductor layers, a second build-up part laminated to the first part and including second insulating layers and conductor layers, and via conductors including first via conductors in the first insulating layers and second via conductors in the second insulating layers. The first part is positioned closer to first surface side of the substrate than the second part. The first conductor layers include wirings having wiring width and inter-wiring distance that are smaller than wiring width and inter-wiring distance of wirings in the second conductor layers. The first insulating layers include resin and inorganic particles including first particles forming inner wall surfaces in through holes and second particles embedded in the first insulating layers having different shapes from the first particles. Each first conductor layers and via conductors includes a metal film layer and a plating film layer.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups

55.

WIRING BOARD

      
Application Number JP2023045718
Publication Number 2024/150628
Status In Force
Filing Date 2023-12-20
Publication Date 2024-07-18
Owner IBIDEN CO., LTD. (Japan)
Inventor Kunieda, Masatoshi

Abstract

The present invention improves the coupling efficiency between an optical component and optical wiring of a wiring board, and facilitates the mounting of the optical component. A wiring board (1) according to an embodiment comprises: an electric wiring unit (2) that includes an insulating layer and a conductor layer; an optical wiring area (A2) that is provided on one surface (2a) of the electric wiring unit (2); and a component area (A1) provided on the one surface (2a) of the electric wiring unit (2) and capable of having a component (E1) disposed thereon. The support member (7) is formed on the one surface (2a) of the electric wiring part (2) and is disposed so as to span the optical wiring area (A2) and the component area (A1).

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • H05K 1/02 - Printed circuits - Details
  • H05K 3/46 - Manufacturing multi-layer circuits

56.

WIRING BOARD

      
Application Number JP2023045719
Publication Number 2024/150629
Status In Force
Filing Date 2023-12-20
Publication Date 2024-07-18
Owner IBIDEN CO., LTD. (Japan)
Inventor Kunieda, Masatoshi

Abstract

The present invention improves the coupling efficiency between an optical component and optical wiring of a wiring board, and facilitates the mounting of the optical component. A wiring board (1) according to an embodiment comprises: an electric wiring unit (2) that includes an insulating layer and a conductor layer; an optical wiring area (A2) that is provided on one surface (2a) of the electric wiring unit (2); and a component area (A1) provided on the one surface (2a) of the electric wiring unit (2) and capable of having a component (E1) disposed thereon. Optical wiring (5) is disposed on the optical wiring region (A2), and a support substrate (6) is disposed on the optical wiring (5).

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • H05K 1/02 - Printed circuits - Details
  • H05K 3/46 - Manufacturing multi-layer circuits

57.

PRINTED WIRING BOARD

      
Application Number 18617671
Status Pending
Filing Date 2024-03-27
First Publication Date 2024-07-11
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kagohashi, Susumu
  • Tomida, Maaya

Abstract

A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer and including a signal wiring, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer. The resin insulating layer has an opening such that the opening is exposing a portion of the first conductor layer and that the via conductor is formed in the opening of the resin insulating layer, and the resin insulating layer includes inorganic particles and resin such that the resin is forming the surface of the resin insulating layer.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits

58.

WIRING SUBSTRATE

      
Application Number 18408617
Status Pending
Filing Date 2024-01-10
First Publication Date 2024-07-11
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Shimizu, Keisuke
  • Nishiwaki, Fumio
  • Kimura, Ryoya

Abstract

A wiring substrate includes a first wiring part including a first insulating layer and a first conductor layer laminated on the first insulating layer, and a second wiring part formed on the first part and including a second insulating layer and a second conductor layer laminated on the second insulating layer. The thickness of the second insulating layer is smaller than that of the first insulating layer. The thickness of the second conductor layer is smaller than that of the first conductor layer. The first conductor layer has a surface on the opposite side with respect to the first insulating layer such that the arithmetic mean roughness of the surface is smaller than that of a surface of the second conductor layer on the opposite side with respect to the second insulating layer. The second part is positioned closer to the outermost surface of the substrate than the first part.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H05K 3/46 - Manufacturing multi-layer circuits

59.

WIRING SUBSTRATE

      
Application Number 18408629
Status Pending
Filing Date 2024-01-10
First Publication Date 2024-07-11
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Shimizu, Keisuke
  • Nishiwaki, Fumio
  • Kimura, Ryoya

Abstract

A wiring substrate includes a first wiring part including a first insulating layer and a first conductor layer laminated on the first insulating layer, and a second wiring part including a second insulating layer and a second conductor layer laminated on the second insulating layer. The thickness of the second insulating layer is smaller than that of the first insulating layer. The thickness of the second conductor layer is smaller than that of the first conductor layer. The first conductor layer includes first wirings including differential wirings having the minimum wiring width of larger than 5 μm and minimum inter-wiring distance of larger than 7 μm. The second conductor layer includes second wirings having the maximum wiring width of 5 μm or less and the maximum inter-wiring distance of 7 μm or less. The second part is positioned closer to the outermost surface of the substrate than the first part.

IPC Classes  ?

60.

METHOD FOR MANUFACTURING WIRING SUBSTRATE

      
Application Number 18489884
Status Pending
Filing Date 2023-10-19
First Publication Date 2024-07-11
Owner IBIDEN CO., LTD. (Japan)
Inventor Terauchi, Ikuya

Abstract

A method for manufacturing a wiring substrate includes forming first conductor pads and second conductor pads having a shorter inter-pad distance than the first conductor pads, forming a second insulating layer covering the first conductor pads and the second conductor pads, forming first via holes exposing the first conductor pads, applying a first desmear treatment such that residues are removed from the first via holes, forming second via holes in the second insulating layer after the first desmear treatment such that the second via holes expose the second conductor pads, applying a second desmear treatment such that residues are removed from the second via holes, forming first via conductors in the first via holes such that the first via conductors are formed on the first conductor pads, and forming second via conductors in the second via holes such that the second via conductor are formed on the second conductor pads.

IPC Classes  ?

  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits

61.

METHOD FOR MANUFACTURING WIRING SUBSTRATE

      
Application Number 18489921
Status Pending
Filing Date 2023-10-19
First Publication Date 2024-07-11
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Fukui, Shogo
  • Ando, Ryo
  • Shimizu, Keisuke

Abstract

A method for manufacturing a wiring substrate includes forming conductor pads on a surface of an insulating layer, positioning, on or in the insulating layer, an electronic component having electrode pads, forming a second insulating layer covering the surface of the insulating layer, conductor pads and electronic component, forming first via holes exposing the conductor pads, applying a first desmear treatment to the second insulating layer such that residues are removed from the first via holes, forming second via holes in the second insulating layer after the first desmear treatment such that the second via holes expose the electrode pads of the electronic component positioned on or in the insulating layer, applying a second desmear treatment to the second insulating layer such that residues are removed from the second via holes, forming first via conductors in the first via holes, and forming second via conductors in the second via holes.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/498 - Leads on insulating substrates
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits

62.

AGENT FOR INCREASING A PLANT FUNCTIONAL COMPONENT CONTENT AND A METHOD FOR MANUFACTURING THE SAME

      
Application Number 18612558
Status Pending
Filing Date 2024-03-21
First Publication Date 2024-07-11
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Ohno, Katsuya
  • Nohara, Tomohiro

Abstract

The objective of the invention is to provide an agent for increasing a plant functional component content, which is capable of increasing a content of the plant functional component by being adequately sprayed to the plant or injected into the soil without using stress cultivation conditions or plants with high content of functional component, and a method for manufacturing the same. An agent for increasing a plant functional component content comprising a fatty acid metabolite obtainable by a metabolism of a fatty acid with 4-30 carbon atoms by proteobacteria under a dissolved oxygen concentration of 0.1-8 mg/L, and a method for manufacturing an agent for increasing a plant functional component content comprising a fatty acid metabolite, comprising a step for a fatty acid metabolism wherein a fatty acid with 4-30 carbon atoms is subjected to a proteobacterial metabolization under a dissolved oxygen concentration of 0.1-8 mg/L.

IPC Classes  ?

  • A01G 7/06 - Treatment of growing trees or plants, e.g. for preventing decay of wood, for tingeing flowers or wood, for prolonging the life of plants
  • C05F 11/08 - Organic fertilisers containing added bacterial cultures, mycelia or the like
  • C12P 1/04 - Preparation of compounds or compositions, not provided for in groups , by using microorganisms or enzymes; General processes for the preparation of compounds or compositions by using microorganisms or enzymes by using bacteria

63.

WIRING SUBSTRATE

      
Application Number 18489952
Status Pending
Filing Date 2023-10-19
First Publication Date 2024-07-11
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Terauchi, Ikuya
  • Fukui, Shogo
  • Ando, Ryo
  • Shimizu, Keisuke

Abstract

A wiring substrate includes first conductor pads formed on a surface of an insulating layer, second conductor pads formed on the surface of the insulating layer, a second insulating layer covering the surface of the insulating layer and first and second conductor pads, first via conductors formed in first via holes penetrating through the second insulating layer such that the first via conductors are formed on the first conductor pads, and second via conductors formed in second via holes penetrating through the second insulating layer such that the second via conductors are formed on the second conductor pads. The first and second conductor pads are formed such that an annular width amount of each second conductor pad is smaller than an annular width amount of each first conductor pad and that a haloing amount in each second conductor pad is smaller than a haloing amount in each first conductor pad.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits

64.

HEAT TRANSFER SUPPRESSION SHEET AND BATTERY PACK

      
Application Number JP2023046719
Publication Number 2024/143391
Status In Force
Filing Date 2023-12-26
Publication Date 2024-07-04
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kumano Keiji
  • Ido Takahiko

Abstract

Provided is a heat transfer suppression sheet in which even if an elastic sheet is pressed in the thickness direction thereof, excessive outward bulging of end surfaces parallel to the thickness direction can be suppressed, and a decrease in insulation performance due to a decrease in thickness can be suppressed. A heat transfer suppression sheet (10) has: an elastic sheet (11) having a pair of main surfaces (11a) orthogonal to the thickness direction and end surfaces (11b) substantially parallel to the thickness direction; and a bulge-suppressing sheet (12) continuously disposed at least along the end surfaces (11b). The tensile strength of the bulge-suppressing sheet (12) is preferably 20 MPa to 150 MPa, inclusive.

IPC Classes  ?

  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding
  • H01M 10/625 - Vehicles
  • H01M 50/293 - Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders characterised by spacing elements or positioning means within frames, racks or packs characterised by the material

65.

HEAT TRANSFER SUPPRESSION SHEET AND BATTERY PACK

      
Application Number JP2023046722
Publication Number 2024/143394
Status In Force
Filing Date 2023-12-26
Publication Date 2024-07-04
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kumano Keiji
  • Ido Takahiko

Abstract

Provided is a heat transfer suppression sheet capable of suppressing particle fall-off and maintaining excellent heat insulating properties. A heat transfer suppression sheet (10) comprises: a heat-insulating material (11) including inorganic particles; a resin film (12) in which the heat-insulating material (11) is enclosed and which has a plurality of first holes (14); and a coating material (13) stacked on the resin film (12) and coating at least some of the plurality of first holes (14).

IPC Classes  ?

  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding
  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials
  • H01M 10/613 - Cooling or keeping cold
  • H01M 10/625 - Vehicles
  • H01M 50/291 - Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders characterised by spacing elements or positioning means within frames, racks or packs characterised by their shape
  • H01M 50/293 - Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders characterised by spacing elements or positioning means within frames, racks or packs characterised by the material

66.

COIL SUBSTRATE, MOTOR COIL SUBSTRATE, AND MOTOR

      
Application Number 18605882
Status Pending
Filing Date 2024-03-15
First Publication Date 2024-07-04
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Hirasawa, Takahisa
  • Furuno, Takayuki

Abstract

A coil substrate includes a flexible substrate, and a coil including a first wiring formed on a first surface of the flexible substrate and a second wiring formed on a second surface of the flexible substrate on the opposite side with respect to the first surface. The flexible substrate is formed to be wound around an axis extending in an orthogonal direction orthogonal to a longitudinal direction of the flexible substrate such that the flexible substrate is formed into a cylindrical shape, and the coil is formed such that the first wiring has a first orthogonal part extending along the orthogonal direction, that the second wiring has a second orthogonal part extending along the orthogonal direction, and that at least one of the first orthogonal part and the second orthogonal part has at least one slit formed along the orthogonal direction.

IPC Classes  ?

  • H02K 3/28 - Layout of windings or of connections between windings
  • H02K 1/12 - Stationary parts of the magnetic circuit

67.

WIRING SUBSTRATE

      
Application Number 18537877
Status Pending
Filing Date 2023-12-13
First Publication Date 2024-06-20
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Ando, Ryo
  • Kuroda, Nobuhisa
  • Fukui, Shogo
  • Ichikawa, Kosei
  • Kato, Makoto

Abstract

A wiring substrate includes an insulating layer including a first layer and a second layer, and a conductor layer including a metal film formed on a surface of the second layer of the insulating layer such that the conductor layer includes a conductor pattern. The first layer includes resin and first inorganic particles, the second layer includes resin and second inorganic particles at the content rate that is lower than the content rate of the first inorganic particles in the first layer, and the thickness of the first layer is 90% or more of the thickness of the insulating layer. The second layer of the insulating layer includes a composite layer having the thickness in the range of 0.1 to 0.3 μm, and the composite layer includes part of the metal film in the conductor layer formed in gaps between the second inorganic particles and resin in the second layer.

IPC Classes  ?

68.

PRINTED WIRING BOARD

      
Application Number 18537920
Status Pending
Filing Date 2023-12-13
First Publication Date 2024-06-20
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Sakai, Jun
  • Inishi, Takuya

Abstract

A printed wiring board includes a base substrate, an electronic component accommodated in a cavity formed in the substrate, a resin insulating layer formed on the substrate such that the insulating layer is covering the electronic component, a conductor layer formed on the insulating layer, and via conductors formed in the insulating layer and each including a seed layer and an electrolytic plating layer formed on the seed layer such that the via conductors are connecting the conductor layer and electrodes of the electronic component. The insulating layer includes resin and inorganic particles and has via holes in which the via conductors is formed respectively such the inorganic particles include first inorganic particles having smooth surfaces and second inorganic particles embedded in the insulating layer and that an inner wall surface of each of the via holes includes the resin and the smooth surfaces of the first inorganic particles.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/42 - Plated through-holes

69.

WIRING SUBSTRATE

      
Application Number 18544708
Status Pending
Filing Date 2023-12-19
First Publication Date 2024-06-20
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Furutani, Toshiki
  • Kuwabara, Masashi
  • Kagohashi, Susumu

Abstract

A wiring substrate includes a first build-up part including first insulating layers, first conductor layers formed on the first insulating layers, and first via conductors formed in the first insulating layers, and a second build-up part laminated to the first build-up part and including second insulating layers, second conductor layers formed on the second insulating layers, and second via conductors formed in the second insulating layers. A wiring width and an inter-wiring distance of wirings in the first conductor layers of the first build-up part are smaller than a wiring width and an inter-wiring distance of wirings in the second conductor layers of the second build-up part, and the first build-up part is formed such that the first insulating layers include insulating resin and inorganic particles and that the insulating resin in the first insulating layers forms the surfaces of the first insulating layers covered by the first conductor layers.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups

70.

WIRING SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18542813
Status Pending
Filing Date 2023-12-18
First Publication Date 2024-06-20
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Sakai, Shunsuke
  • Okabe, Koji

Abstract

A wiring substrate includes a substrate, and a conductor layer formed on the substrate and including copper such that the conductor layer is patterned. The conductor layer is formed such that the upper surface of the conductor layer has a width that is equal to or larger than a width of the lower surface of the conductor layer and that the width of the lower surface is larger than the minimum width of a middle portion of the conductor layer between the upper surface and the lower surface.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process

71.

WIRING SUBSTRATE

      
Application Number 18522588
Status Pending
Filing Date 2023-11-29
First Publication Date 2024-06-13
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Furutani, Toshiki
  • Kuwabara, Masashi
  • Kagohashi, Susumu

Abstract

A wiring substrate includes insulating layers including inorganic particles and resin, conductor layers formed on first surfaces of the insulating layers, respectively, and including the outermost conductor layer and a conductor layer, and via conductors formed in the insulating layers such that the via conductors are connecting the conductor layers formed on the first surfaces of the insulating layers. The conductor layers are formed such that the outermost conductor layer includes first conductor pads positioned to mount a first component and second conductor pads positioned to mount a second component and that the conductor layer includes first wiring patterns connecting the first conductor pads and the second conductor pads, and the insulating layers are formed such that the first surfaces of the insulating layers are formed of the resin and do not have exposed surfaces of the inorganic particles.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering
  • H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material

72.

INORGANIC FIBER MAT PRODUCTION METHOD AND INORGANIC FIBER MAT

      
Application Number JP2023043606
Publication Number 2024/122566
Status In Force
Filing Date 2023-12-06
Publication Date 2024-06-13
Owner IBIDEN CO., LTD. (Japan)
Inventor Yamazaki, Tomohisa

Abstract

An inorganic fiber mat production method characterized by comprising: an opening step in which a first inorganic fiber molded body derived from a needled mat and a second inorganic fiber molded body derived from a sheet-type mat are used, the first inorganic fiber molded body and the second inorganic fiber molded body are opened, and inorganic fibers are obtained; and a sheet formation step in which sheet formation of an inorganic fiber mat is performed using a slurry including the opened inorganic fibers.

IPC Classes  ?

  • D21H 13/36 - Inorganic fibres or flakes
  • C04B 38/00 - Porous mortars, concrete, artificial stone or ceramic ware; Preparation thereof
  • D04H 1/4209 - Inorganic fibres
  • D04H 1/732 - Non-woven fabrics formed wholly or mainly of staple fibres or like relatively short fibres characterised by the method of forming fleeces or layers, e.g. reorientation of fibres the fibres being randomly arranged by fluid current, e.g. air-lay
  • D21H 11/14 - Secondary fibres
  • F01N 3/28 - Construction of catalytic reactors

73.

METHOD FOR PRODUCING INORGANIC-FIBER MAT, AND INORGANIC-FIBER MAT

      
Application Number JP2023043608
Publication Number 2024/122568
Status In Force
Filing Date 2023-12-06
Publication Date 2024-06-13
Owner IBIDEN CO., LTD. (Japan)
Inventor Yamazaki, Tomohisa

Abstract

A method for producing an inorganic-fiber mat, characterized by comprising: a fibrillation step in which a first inorganic-fiber molded object, which is derived from a needle mat containing an adhered organic binder, is fibrillated to obtain inorganic fibers; and a wet-lay sheet formation step in which a slurry containing the fibrillated inorganic fibers is used to form an inorganic-fiber mat by the wet-lay method.

IPC Classes  ?

  • F01N 3/28 - Construction of catalytic reactors
  • C04B 38/00 - Porous mortars, concrete, artificial stone or ceramic ware; Preparation thereof
  • D04H 1/732 - Non-woven fabrics formed wholly or mainly of staple fibres or like relatively short fibres characterised by the method of forming fleeces or layers, e.g. reorientation of fibres the fibres being randomly arranged by fluid current, e.g. air-lay
  • D04H 1/4209 - Inorganic fibres
  • D21B 1/04 - Fibrous raw materials or their mechanical treatment by dividing raw materials into small particles, e.g. fibres
  • D21B 1/12 - Fibrous raw materials or their mechanical treatment by dividing raw materials into small particles, e.g. fibres by wet methods; by the use of steam
  • D21H 13/36 - Inorganic fibres or flakes

74.

PRINTED WIRING BOARD

      
Application Number 18537853
Status Pending
Filing Date 2023-12-13
First Publication Date 2024-06-13
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Sakai, Jun
  • Inishi, Takuya

Abstract

A printed wiring board includes a laminate including resin insulating layers and conductor layers, and via conductors formed in via holes of the resin insulating layers and each including a seed layer and an electrolytic plating layer formed on the seed layer such that the via conductors connect the conductor layers adjacent to each other and that the via conductors include a first via conductor and a second via conductor formed on the first via conductor in a lamination direction of the laminate. The resin insulating layers include resin and inorganic particles such that the inorganic particles include first inorganic particles having smooth surfaces and second inorganic particles embedded in the resin insulating layers and that an inner wall surface of each of the via holes in the resin insulating layers includes the resin and the smooth surfaces of the first inorganic particles.

IPC Classes  ?

75.

COIL SUBSTRATE, MOTOR COIL SUBSTRATE, AND MOTOR

      
Application Number 18581985
Status Pending
Filing Date 2024-02-20
First Publication Date 2024-06-13
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Hirasawa, Takahisa
  • Furuno, Takayuki

Abstract

A coil substrate includes a flexible substrate, and coils formed on the flexible substrate such that each of the coils includes wirings formed on the first surface of the flexible substrate and wirings formed on the second surface of the flexible substrate. The coils include an N-th coil forming an N-th phase and an (N+1)-th coil formed adjacent to the N-th coil and forming an (N+1)-th phase different from the N-th phase, and each coil is formed such that an inter-wiring distance between the wirings forming the N-th coil and the wirings forming the (N+1)-th coil is larger than an inter-wiring distance between the wirings forming the N-th coil, and the inter-wiring distance between the wirings forming the N-th coil and the wirings forming the (N+1)-th coil is larger than an inter-wiring distance between the wirings forming the (N+1)-th coil.

IPC Classes  ?

  • H02K 3/26 - Windings characterised by the conductor shape, form or construction, e.g. with bar conductors consisting of printed conductors

76.

HEAT INSULATING MATERIAL, AND METHOD FOR PRODUCING HEAT INSULATING MATERIAL

      
Application Number JP2023042142
Publication Number 2024/117030
Status In Force
Filing Date 2023-11-24
Publication Date 2024-06-06
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Ito, Toshiki
  • Ota, Yusuke
  • Nomura, Kenta
  • Fujii, Shin

Abstract

This heat insulating material comprises a molded body including a carbon fiber and a scale-like graphite, the heat insulating material being characterized in that the carbon fiber and the scale-like graphite are bonded via a carbonaceous binder, and the scale-like graphite is included in at least a half area in the thickness direction of the molded body.

IPC Classes  ?

  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials
  • B32B 5/26 - Layered products characterised by the non-homogeneity or physical structure of a layer characterised by the presence of two or more layers which comprise fibres, filaments, granules, or powder, or are foamed or specifically porous one layer being a fibrous or filamentary layer another layer also being fibrous or filamentary
  • C04B 35/83 - Carbon fibres in a carbon matrix
  • C04B 38/00 - Porous mortars, concrete, artificial stone or ceramic ware; Preparation thereof

77.

THERMAL INSULATION MATERIAL

      
Application Number JP2023042145
Publication Number 2024/117031
Status In Force
Filing Date 2023-11-24
Publication Date 2024-06-06
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Ito, Toshiki
  • Ota, Yusuke
  • Nomura, Kenta
  • Fujii, Shin

Abstract

133) of the flaky graphite in the second principal plane.

IPC Classes  ?

  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials
  • B32B 5/26 - Layered products characterised by the non-homogeneity or physical structure of a layer characterised by the presence of two or more layers which comprise fibres, filaments, granules, or powder, or are foamed or specifically porous one layer being a fibrous or filamentary layer another layer also being fibrous or filamentary
  • C04B 35/83 - Carbon fibres in a carbon matrix
  • C04B 38/00 - Porous mortars, concrete, artificial stone or ceramic ware; Preparation thereof

78.

HEAT TRANSFER SUPPRESSION SHEET AND BATTERY PACK

      
Application Number JP2023043011
Publication Number 2024/117239
Status In Force
Filing Date 2023-11-30
Publication Date 2024-06-06
Owner IBIDEN CO., LTD. (Japan)
Inventor Takahashi Naoki

Abstract

Provided are: a heat transfer suppression sheet that has excellent heat transfer suppression performance when a battery is in a normal state or an abnormal state, and an excellent holding ability to prevent falling out from between battery cells, and is further capable of coping with changes in the spacing between the battery cells without deteriorating the heat transfer suppression performance; and a battery pack including the heat transfer suppression sheet. A heat transfer suppression sheet (1) has a layer containing a shrinkable organic material, on a surface of a base material (10) containing inorganic particles, and is curved at least in part in cross-sectional shape, and, in the curved part, the amount of shrinkage in a surface direction of a surface of an inner arc face (5) is greater than the amount of shrinkage in a surface direction of a surface of an outer arc face (6).

IPC Classes  ?

  • F16L 59/04 - Arrangements using dry fillers, e.g. using slag wool
  • F16L 59/12 - Arrangements for supporting insulation from the wall or body insulated, e.g. by means of spacers between pipe and heat-insulating material; Arrangements specially adapted for supporting insulated bodies
  • H01M 10/625 - Vehicles
  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding

79.

METHOD FOR MANUFACTURING PRINTED WIRING BOARD AND LAMINATING SYSTEM USED FOR IMPLEMENTING THE METHOD

      
Application Number 18441702
Status Pending
Filing Date 2024-02-14
First Publication Date 2024-06-06
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kadowaki, Yuji
  • Kano, Tomomi

Abstract

A method for manufacturing a printed wiring board includes forming a seed layer on a surface of a resin insulating layer, applying a dry film onto the seed layer using a laminating roll device, cutting the dry film applied onto the seed layer to a predetermined size, applying pressure and heat to the dry film, forming a plating resist on the seed layer from the dry film using photographic technology, forming an electrolytic plating film on part of the seed layer exposed from the resist, removing the resist from the seed layer, and removing the part of the seed layer exposed from the electrolytic plating film. The applying of the pressure and heat includes applying the pressure and heat to the dry film applied onto the seed layer such that the pressure and heat are applied to the entire surface of the dry film cut to the predetermined size simultaneously.

IPC Classes  ?

  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
  • H05K 3/14 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material

80.

COIL SUBSTRATE, MOTOR COIL SUBSTRATE, AND MOTOR

      
Application Number 18431255
Status Pending
Filing Date 2024-02-02
First Publication Date 2024-05-30
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Hirasawa, Takahisa
  • Furuno, Takayuki

Abstract

A coil substrate includes a flexible substrate, and a coil including a first wiring formed on a first surface of the flexible substrate and a second wiring formed on a second surface of the flexible substrate on the opposite side with respect to the first surface of the flexible substrate. The coil is formed such that an inter-wiring distance of the first wiring formed on the first surface of the flexible substrate is larger than an inter-wiring distance of the second wiring formed on the second surface of the flexible substrate.

IPC Classes  ?

  • H02K 3/04 - Windings characterised by the conductor shape, form or construction, e.g. with bar conductors
  • H02K 3/32 - Windings characterised by the shape, form or construction of the insulation
  • H02K 7/00 - Arrangements for handling mechanical energy structurally associated with dynamo-electric machines, e.g. structural association with mechanical driving motors or auxiliary dynamo-electric machines

81.

WIRING SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18519524
Status Pending
Filing Date 2023-11-27
First Publication Date 2024-05-30
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kagohashi, Susumu
  • Sakai, Jun

Abstract

A wiring substrate includes an insulating layer including inorganic particles and resin, a seed layer formed on a surface of the insulating layer, and a conductor layer including a conductor pattern and formed on the seed layer. The surface of the insulating layer is a roughened surface formed such that the roughened surface of the insulating layer has exposed portions of the inorganic particles and resin with gaps at interfaces where the inorganic particles and the resin are in contact, and the seed layer is formed on the roughened surface of the insulating layer such that the seed layer is formed along the exposed portions of the inorganic particles and resin exposed on the roughened surface of the insulating layer and is not formed in the gaps at the interfaces where the inorganic particles and the resin are in contact.

IPC Classes  ?

  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
  • H05K 3/42 - Plated through-holes

82.

MAT MATERIAL, EXHAUST GAS PURIFICATION DEVICE, AND METHOD FOR PRODUCING MAT MATERIAL

      
Application Number 18396709
Status Pending
Filing Date 2023-12-27
First Publication Date 2024-05-23
Owner IBIDEN CO., LTD. (Japan)
Inventor Kogo, Yuta

Abstract

A mat material including: a base mat containing inorganic fibers and having a first main surface and a second main surface; and a sheet material disposed on at least one of the first main surface or the second main surface, wherein the sheet material is a stacked sheet material in which longitudinally oriented fibers and transversely oriented fibers are stacked, the sheet material has openings surrounded by the longitudinally oriented fibers and the transversely oriented fibers, and an average opening area of the sheet material is more than 0 mm2/piece and 0.7 mm2/piece or less.

IPC Classes  ?

  • B32B 5/12 - Layered products characterised by the non-homogeneity or physical structure of a layer characterised by structural features of a layer comprising fibres or filaments characterised by the relative arrangement of fibres or filaments of adjacent layers
  • B01D 46/24 - Particle separators, e.g. dust precipitators, using rigid hollow filter bodies
  • B01D 53/94 - Chemical or biological purification of waste gases of engine exhaust gases by catalytic processes
  • B32B 5/02 - Layered products characterised by the non-homogeneity or physical structure of a layer characterised by structural features of a layer comprising fibres or filaments
  • B32B 29/02 - Layered products essentially comprising paper or cardboard next to a fibrous or filamentary layer

83.

HEAT TRANSFER SUPPRESSION SHEET AND BATTERY PACK

      
Application Number JP2023040660
Publication Number 2024/101455
Status In Force
Filing Date 2023-11-10
Publication Date 2024-05-16
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kumano Keiji
  • Ido Takahiko

Abstract

Provided are: a heat transfer suppression sheet including an elastic body, said sheet being able to handle swelling of a battery cell caused by normal charging/discharging, and being able to demonstrate elastic performance at the time of thermal runaway; and a battery pack including this heat transfer suppression sheet. The heat transfer suppression sheet (10) includes an elastic body (1) that is in a compressed state at less than 90°C and is released from the compressed state at 90°C or greater. The compressed state of the elastic body (1) is maintained by a binder substance. An insulation material (5) may be layered thereon, and in such a case, the compressed state may be maintained by a heat shrinkable enclosure (20). Furthermore, the elastic body (1) may be configured from a plurality of elastic body fragments (1A).

IPC Classes  ?

  • F16L 59/04 - Arrangements using dry fillers, e.g. using slag wool
  • F16L 59/05 - Arrangements using dry fillers, e.g. using slag wool in prefabricated shells or covers
  • H01M 10/625 - Vehicles
  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding

84.

WIRING BOARD

      
Application Number JP2023039116
Publication Number 2024/095967
Status In Force
Filing Date 2023-10-30
Publication Date 2024-05-10
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Hurutani, Toshiki
  • Kuwahara, Miyabi

Abstract

A wiring board according to an embodiment of the present invention comprises: a first wiring board 11 including first insulating layers 111, first conductor layers 112, and first via conductors 113; and a second wiring board 12 including second insulating layers 211, second conductor layers 212, and second via conductors 213. The second wiring board 12 is mounted on the first wiring board 11. The minimum value of the wire width of wires FW2 included in the second conductor layers 212 is smaller than the minimum value of the wire line width of wires FW1 included in the first conductor layers 112. The minimum value of the wire spacing of the wires FW2 is smaller than the minimum value of the wire spacing of the wires FW1. The wire width of the wires FW2 is 3 μm or less, and the aspect ratio of the wires FW2 is 2.0-4.0.

IPC Classes  ?

  • H05K 3/46 - Manufacturing multi-layer circuits
  • H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
  • H05K 1/02 - Printed circuits - Details
  • H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material

85.

PRINTED WIRING BOARD

      
Application Number 18502209
Status Pending
Filing Date 2023-11-06
First Publication Date 2024-05-09
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Sakai, Jun
  • Yoshikawa, Kyohei

Abstract

A printed wiring board includes a conductor layer including a pad, a first resin insulating layer laminated on the conductor layer, a first conductor layer formed on the first resin insulating layer and including a first seed layer and a first electrolytic plating layer, a second resin insulating layer laminated on the first insulating layer such that the second resin insulating layer is covering the first conductor layer, and a second conductor layer formed on the second resin insulating layer and including a second seed layer and a second electrolytic plating layer. The first conductor layer is formed such that the first seed layer is an electroless plating layer and the first electrolytic plating layer formed on the first seed layer, and the second conductor layer is formed such that a second seed layer is a sputtering layer and the second electrolytic plating layer formed on the second seed layer.

IPC Classes  ?

  • H05K 3/42 - Plated through-holes
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits

86.

HEAT TRANSFER SUPPRESSION SHEET FOR BATTERY PACK, AND BATTERY PACK

      
Application Number 18272758
Status Pending
Filing Date 2022-01-14
First Publication Date 2024-05-02
Owner Ibiden Co., Ltd. (Japan)
Inventor
  • Ando, Hisashi
  • Takahashi, Naoki

Abstract

A heat transfer suppression sheet for a battery pack, the heat transfer suppression sheet being used in a battery pack in which battery cells are connected in series or in parallel and being interposed between the battery cells, the heat transfer suppression sheet containing: a heat-insulating material containing at least one of inorganic particles or inorganic fibers; and a covering material covering at least a part of the heat-insulating material, in which a gap is formed between the heat-insulating material and the covering material, and the gap communicates with the outside of the heat-insulating material and the covering material.

IPC Classes  ?

  • H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding
  • F16L 59/02 - Shape or form of insulating materials, with or without coverings integral with the insulating materials

87.

MOTOR COIL SUBSTRATE, AND MOTOR

      
Application Number JP2022038929
Publication Number 2024/084625
Status In Force
Filing Date 2022-10-19
Publication Date 2024-04-25
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Hirasawa Takahisa
  • Furuno Takayuki

Abstract

Provided are: a motor coil substrate whereby a high-torque, high-performance motor can be obtained; and a motor formed by using the motor coil substrate. The motor coil substrate according to an embodiment of the present invention comprises: a flexible substrate having a first surface and a second surface on the reverse side from the first surface; and a plurality of coils formed by wiring provided on the first surface and the second surface. Said motor coil substrate is formed into a cylindrical shape by being wound in the circumferential direction about an axis extending in an orthogonal direction that is orthogonal to the longitudinal direction of the flexible substrate, starting from a first end of the flexible substrate in the longitudinal direction. The percentage of the wiring that accounts for the total weight of the motor coil is 80.0% to 99.9%.

IPC Classes  ?

  • H02K 3/26 - Windings characterised by the conductor shape, form or construction, e.g. with bar conductors consisting of printed conductors

88.

COIL SUBSTRATE FOR MOTOR, AND MOTOR

      
Application Number JP2022038928
Publication Number 2024/084624
Status In Force
Filing Date 2022-10-19
Publication Date 2024-04-25
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Hirasawa Takahisa
  • Furuno Takayuki

Abstract

Provided are a coil substrate for a motor with which a motor having high torque and high performance can be obtained, and a motor formed by using the coil substrate for a motor. A coil substrate for a motor according to the present embodiment has a flexible substrate having a first surface and a second surface on the side opposite the first surface, and a plurality of coils formed by wiring provided to the first surface and the second surface, the coil substrate for a motor being formed into a cylindrical shape by being wound in a circumferential direction with a first longitudinal-direction end of the flexible substrate as a starting point, centered on an axis extending in an orthogonal direction that is orthogonal to the longitudinal direction. The occupancy ratio of the coil in a cross-section of the coil substrate for a motor is 50-99%.

IPC Classes  ?

  • H02K 3/26 - Windings characterised by the conductor shape, form or construction, e.g. with bar conductors consisting of printed conductors

89.

COIL SUBSTRATE FOR MOTOR, AND MOTOR

      
Application Number JP2022038930
Publication Number 2024/084626
Status In Force
Filing Date 2022-10-19
Publication Date 2024-04-25
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Hirasawa Takahisa
  • Furuno Takayuki

Abstract

Provided are: a coil substrate for motors with which a motor having stable performance is obtained, and a motor formed by using the coil substrate for motors. This coil substrate for motors according to an embodiment has: a flexible substrate that has a first surface and a second surface on the side opposite to the first surface; and a plurality of coils formed with wires provided on the first surface and the second surface. Using a first end in the longitudinal direction of the flexible substrate as a starting point, a cylindrical shape is formed by winding the flexible substrate in the circumferential direction around a shaft that extends in an orthogonal direction orthogonal to the longitudinal direction. The cylindricity of the outer circumferential surface is greater than 0.0 mm and no more than 0.3 mm.

IPC Classes  ?

  • H02K 3/26 - Windings characterised by the conductor shape, form or construction, e.g. with bar conductors consisting of printed conductors
  • H02K 3/47 - Air-gap windings, i.e. iron-free windings

90.

ASSEMBLED BATTERY AND BATTERY PACK

      
Application Number 18275098
Status Pending
Filing Date 2022-01-31
First Publication Date 2024-04-18
Owner IBIDEN CO., LTD. (Japan)
Inventor Tange, Keisuke

Abstract

An assembled battery in which a plurality of battery cells is connected serially or in parallel, the battery cells each having an electrode surface having an electrode and a peripheral surface orthogonal to the electrode surface and being disposed such that the peripheral surfaces face each other. The assembled battery contains the battery cells, a flameproof material covering the peripheral surface of the battery cells, and a heat dissipation member covering the peripheral surface of the battery cells which is covered with the flameproof material.

IPC Classes  ?

  • H01M 50/213 - Racks, modules or packs for multiple batteries or multiple cells characterised by their shape adapted for cells having curved cross-section, e.g. round or elliptic
  • H01M 10/613 - Cooling or keeping cold
  • H01M 10/6235 - Power tools
  • H01M 10/653 - Means for temperature control structurally associated with the cells characterised by electrically insulating or thermally conductive materials
  • H01M 10/6555 - Rods or plates arranged between the cells
  • H01M 50/474 - Spacing elements inside cells other than separators, membranes or diaphragms; Manufacturing processes thereof characterised by their position inside the cells
  • H01M 50/477 - Spacing elements inside cells other than separators, membranes or diaphragms; Manufacturing processes thereof characterised by their shape
  • H01M 50/486 - Organic material

91.

OPTICAL WAVEGUIDE

      
Application Number JP2023033609
Publication Number 2024/075496
Status In Force
Filing Date 2023-09-14
Publication Date 2024-04-11
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kawai, Kouhei
  • Furumachi, Haruka

Abstract

This optical waveguide includes: a core 51 provided with a first surface 511 and a second surface 512 on the side opposite the first surface 511; a first cladding layer 521 formed so as to adjoin the first surface 511; and a second cladding layer 522 formed so as to adjoin the second surface 512. One end of the optical waveguide 5 includes a first end surface F1 and a second end surface F2. The first end surface F1 is a surface which is substantially flush with the core 51 and the first cladding layer 521, and at which the core is exposed. The second end surface F2 is a surface of the second cladding layer 522 which extends from the first end surface F1.

IPC Classes  ?

  • G02B 6/122 - Basic optical elements, e.g. light-guiding paths
  • G02B 6/42 - Coupling light guides with opto-electronic elements

92.

CONNECTION STRUCTURE

      
Application Number JP2023033610
Publication Number 2024/075497
Status In Force
Filing Date 2023-09-14
Publication Date 2024-04-11
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kawai, Kouhei
  • Furumachi, Haruka

Abstract

This connection structure includes, on a wiring substrate 100, an optical waveguide 5 and an optical element E1. The optical waveguide 5 includes: a core 51 provided with a first surface 511 and a second surface 512 on the side opposite the first surface 511; a first cladding layer 521 formed so as to adjoin the first surface 511; and a second cladding layer 522 formed so as to adjoin the second surface 512. One end 5a of the optical waveguide 5 includes a first end surface F1 and a second end surface F2. The first end surface F1 is a surface which is substantially flush with the core 51 and the first cladding layer 521, and at which the core is exposed. The second end surface F2 is a surface of the second cladding layer 522 which extends from the first end surface F1. The optical element E1 includes an exposed light-receiving surface or light-emitting surface. The light-receiving surface or light-emitting surface of the optical element E1 faces a light transmission surface which is a part of the core 51 and which is exposed at the first end surface F1. The optical element is disposed on the second end surface F2.

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • G02B 6/122 - Basic optical elements, e.g. light-guiding paths

93.

BUS BAR AND METHOD FOR MANUFACTURING SAME, AND ELECTRIC POWER STORAGE DEVICE

      
Application Number JP2023035321
Publication Number 2024/071275
Status In Force
Filing Date 2023-09-27
Publication Date 2024-04-04
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kawasaki Hironori
  • Goto Shinnosuke

Abstract

Provided is a bus bar that can be protected from high temperature and flames from a battery cell in the case of a battery abnormality, as well as collisions with broken objects. Also provided is a method for manufacturing a bus bar, the method not requiring winding work such as that necessary for mica sheets, thereby being free from problems such as winding unevenness, formation of gaps between sheets, and separation of sheets, the method being easily applicable to the manufacturing of a bus bar that has a complicated shape. A bus bar (1) is used in an electric power storage device that includes a battery cell (110), the bus bar having a bus bar body (5) that includes an electrically conductive material, said bus bar body being covered by an insulating film that includes an insulating material and one or both of an organic fibrous material and an inorganic fibrous material. In addition, in the method for manufacturing the bus bar (1), the bus bar body (5) that includes an electrically conductive material is coated with a coating solution that includes the insulating material and one or both of the organic fibrous material and the inorganic fibrous material, and is then dried.

IPC Classes  ?

  • H01M 50/591 - Covers
  • H01M 50/507 - Interconnectors for connecting terminals of adjacent batteries; Interconnectors for connecting cells outside a battery casing comprising an arrangement of two or more busbars within a container structure, e.g. busbar modules

94.

MAT MATERIAL, EXHAUST GAS PURIFICATION DEVICE, AND METHOD FOR MANUFACTURING MAT MATERIAL

      
Application Number JP2023028877
Publication Number 2024/070251
Status In Force
Filing Date 2023-08-08
Publication Date 2024-04-04
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Matsunaga, Maki
  • Kogo, Yuta

Abstract

Provided is a mat material wherein, on at least one of first and second principal surfaces of a base material mat containing inorganic fibers and having the first and second principal surfaces, a network is formed by a plurality of base parts made up of organic matter and fibers extending in at least two directions from each of the plurality of base parts.

IPC Classes  ?

  • F01N 3/28 - Construction of catalytic reactors
  • B01J 33/00 - Protection of catalysts, e.g. by coating

95.

HEAT INSULATING MATERIAL

      
Application Number JP2023034876
Publication Number 2024/071096
Status In Force
Filing Date 2023-09-26
Publication Date 2024-04-04
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Ito, Toshiki
  • Ota, Yusuke
  • Nomura, Kenta
  • Orito, Akinori

Abstract

This heat insulating material covers a periphery of a heat generating body, and is characterized in that: the heat insulating material includes, in a thickness direction thereof, at least three layers having different specific gravities; each of the at least three layers includes carbon fibers; if the at least three layers are defined as a first heat insulating material layer, a second heat insulating material layer and a third heat insulating material layer, in order from the side closest to the heat generating body, and the specific gravities of the first heat insulating material layer, the second heat insulating material layer and the third heat insulating material layer are defined as S1, S2 and S3, respectively, then S1>S2>S3, and S1: 0.10 to 0.30 g/cm3, S2: 0.06 to 0.20 g/cm3, and S3: 0.03 to 0.10 g/cm3; and if thicknesses of the first heat insulating material layer, the second heat insulating material layer and the third heat insulating material layer are defined as T1, T2 and T3 respectively, then T1>T2>T3, and ratios of the thicknesses of each heat insulating material layer to the overall thickness of the heat insulating material are T1 ratio: 40% or more and 60% or less, T2 ratio: 20% or more and 40% or less, and T3 ratio: 10% or more and less than 30%.

IPC Classes  ?

  • F16L 59/14 - Arrangements for the insulation of pipes or pipe systems
  • B32B 5/26 - Layered products characterised by the non-homogeneity or physical structure of a layer characterised by the presence of two or more layers which comprise fibres, filaments, granules, or powder, or are foamed or specifically porous one layer being a fibrous or filamentary layer another layer also being fibrous or filamentary
  • B32B 9/00 - Layered products essentially comprising a particular substance not covered by groups
  • C04B 35/80 - Fibres, filaments, whiskers, platelets, or the like
  • C04B 35/83 - Carbon fibres in a carbon matrix

96.

PRINTED WIRING BOARD

      
Application Number 18475276
Status Pending
Filing Date 2023-09-27
First Publication Date 2024-03-28
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Sakai, Jun
  • Inishi, Takuya
  • Kagohashi, Susumu

Abstract

A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed and electrolytic plating layers and connecting the first and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second and third portions, and the insulating layer includes resin and inorganic particles including first particles forming the inner wall surface and second particles embedded in the insulating layer and having shapes different from shapes of the first particles.

IPC Classes  ?

  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering

97.

PRINTED WIRING BOARD

      
Application Number 18475288
Status Pending
Filing Date 2023-09-27
First Publication Date 2024-03-28
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kagohashi, Susumu
  • Sakai, Jun
  • Yoshikawa, Kyohei
  • Inishi, Takuya

Abstract

A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed layer and the electrolytic plating layer and connecting the first conductor and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second portion and the third portion, the second portion has a first film and a second film electrically connected to the first film, and a portion of the first film is formed on the second film.

IPC Classes  ?

  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
  • H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering

98.

WIRING BOARD

      
Application Number JP2023033607
Publication Number 2024/063015
Status In Force
Filing Date 2023-09-14
Publication Date 2024-03-28
Owner IBIDEN CO., LTD. (Japan)
Inventor Kunieda, Masatoshi

Abstract

A wiring board (1) according to an embodiment comprises an electric wiring portion (2) including insulating layers (21, 22, 32) and conductor layers (11, 12, 31); an optical wiring portion (3) disposed on one surface (2a) of the electric wiring portion (2); and a component area (CA) where it is possible to dispose a component (E1) on the optical wiring portion (3). The optical wiring portion (3) includes an optical waveguide (5) including a core portion (51) and a cladding portion (52); and a support substrate (6) that includes a conductor area (CA), which has a conductor, and a non-conductor area (NC), and that is provided with a first face (6b) on the side where the component (E1) is disposed and a second face (6a) on the electric wiring portion (2) side. The support substrate (6) has a thermal expansion coefficient lower than the thermal expansion coefficient of the optical waveguide (5). In the non-conductor area (NC), the optical waveguide (5) is formed on the first face (6b) of the support substrate (6). In the conductor area (CA), a through conductor (61) is included that passes between the first face (6b) of the support substrate (6) and the second face (6a) of the support substrate (6).

IPC Classes  ?

  • G02B 6/12 - Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/14 - Structural association of two or more printed circuits
  • H05K 3/36 - Assembling printed circuits with other printed circuits
  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
  • H05K 3/42 - Plated through-holes

99.

WIRING SUBSTRATE

      
Application Number 18469675
Status Pending
Filing Date 2023-09-19
First Publication Date 2024-03-21
Owner IBIDEN CO., LTD. (Japan)
Inventor Mizutani, Yoshio

Abstract

A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulating layer, and interlayer conductors formed along wall surfaces surrounding the through holes such that each interlayer conductor has a film-like shape and is connecting the first and second conductor layers. The interlayer conductors include first conductors formed in first region of the insulating layer and second conductors formed in second region of the insulating layer at density higher than density of the first conductors, and a thickness of each first interlayer conductor in its end part is substantially same as or larger than a thickness of each second conductor in its end part and a thickness of each first conductor in its center part is larger than a thickness of each second conductor in its center part.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits

100.

PRINTED WIRING BOARD

      
Application Number 18307886
Status Pending
Filing Date 2023-04-27
First Publication Date 2024-03-21
Owner IBIDEN CO., LTD. (Japan)
Inventor
  • Kagohashi, Susumu
  • Sakai, Jun
  • Yoshikawa, Kyohei

Abstract

A printed wiring board includes a first conductor layer, a resin insulating layer laminated on the first conductor layer and including resin material and inorganic particles, a second conductor layer formed on a first surface of the insulating layer such that the first conductor layer is facing a second surface of the insulating layer, and a via conductor formed in an opening extending through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the inorganic particles include first inorganic particles partially embedded in the resin and second inorganic particles completely embedded in the resin, the first inorganic particles have first portions protruding from the resin and second portions embedded in the resin respectively, and the first surface of the resin insulating layer includes a surface of the resin and surfaces of the first portions exposed from the surface of the resin.

IPC Classes  ?

  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/02 - Printed circuits - Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
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