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2023
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Invention
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Low latency memory access.
A memory device includes receivers that use CMOS signaling levels (or... |
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Invention
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Energy efficient storage of error-correction-detection information.
Data and error correction in... |
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Invention
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High capacity, high performance memory system.
Memory devices and a memory controller that contr... |
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Invention
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Protocol for memory power-mode control.
In one embodiment, a memory device includes a memory cor... |
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Invention
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Dedicated cache-related block transfer in a memory system.
A memory system includes a dynamic ra... |
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Invention
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Memory module with programmable command buffer.
A memory module includes a plurality of memory i... |
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Invention
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Efficient storage of error correcting code information.
Multiple independent point-to-point memo... |
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Invention
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Data destruction.
A block of dynamic memory in a DRAM device is organized to share a common set ... |
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Invention
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High capacity memory system using standard controller component.
The embodiments described herei... |
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Invention
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Methods and apparatus for testing inaccessible interface circuits in a semiconductor device.
A s... |
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Invention
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Area-efficient, width-adjustable signaling interface.
A lateral transfer path within an adjustab... |
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Invention
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High performance persistent memory.
The embodiments described herein describe technologies for n... |
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Invention
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Pattern detection based parameter adaptation.
An integrated circuit that includes a feedback loo... |
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Invention
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Hybrid memory module.
A hybrid memory includes cache of relatively fast and durable dynamic, ran... |
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Invention
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Strobe-offset control circuit.
A method of operation in a memory controller is disclosed. The me... |
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Invention
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Buffer circuit with data bit inversion.
A buffer circuit includes a primary interface, a seconda... |
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Invention
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Baud-rate clock recovery lock point control.
A baud-rate phase detector uses two error samplers.... |
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Invention
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Variable resolution digital equalization.
A receiver includes a variable resolution analog-to-di... |
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2022
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Invention
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Memory controller with transaction-queue-dependent power modes.
A memory controller component of... |
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Invention
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Memory and system supporting parallel and serial access modes.
A memory module can be programmed... |
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Invention
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Memory system design using buffer(s) on a mother board.
A mother board topology including a proc... |
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Invention
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Protocol for refresh between a memory controller and a memory device.
The present embodiments pr... |
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Invention
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Communication channel calibration for drift conditions.
A method and system provides for executi... |
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Invention
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Power management integrated circuit device having multiple initialization/power up modes.
Disclo... |
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Invention
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Low overhead refresh management of a memory device. A system and method for performing a low over... |
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Invention
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Multi-processor device with secure processor-controlled access to memory.
A multi-processor devi... |
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Invention
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Buffer circuit with adaptive repair capability. A buffer circuit is disclosed. The buffer circuit... |
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Invention
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Managing memory maintenance operations in a memory system having backing storage media.
Memory c... |
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Invention
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Clock buffer.
A phase-locked loop or delay locked loop provides a coarse alignment between an in... |
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Invention
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Failover methods and systems in three-dimensional memory device.
Described are memory systems an... |
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Invention
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Matched digital-to-analog converters. A voltage ladder is used to generate reference voltages. Th... |
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Invention
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Error coalescing.
A programmable crossbar matrix or an array of steering multiplexors (MUXs) coa... |
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Invention
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Cache memory that supports tagless addressing.
The disclosed embodiments relate to a computer sy... |
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Invention
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Secure key exchange in a multi-processor device.
An integrated circuit comprises an interface co... |
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Invention
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High performance, high capacity memory modules and systems.
Described are memory modules that in... |
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Invention
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Implementing a buck converter supporting automatic continuous conduction mode and discontinuous c... |
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Invention
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Logging burst error information of a dynamic random access memory (dram) using a buffer structure... |
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Invention
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Partial response receiver.
A signaling system is described. The signaling system comprises a tra... |
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Invention
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Power efficient circuits and methods for phase alignment.
A timing-calibration circuit uses an a... |
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Invention
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Multi-processor device with external interface failover.
A multi-processor device is disclosed. ... |
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Invention
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Redundant data log retrieval in multi-processor device.
A device includes interface circuitry to... |
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Invention
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Systems and methods for bidirectional polarization signaling.
A photonic communication system in... |
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Invention
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Edge based partial response equalization.
A method is disclosed. The method includes sampling a ... |
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Invention
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Fragmented periodic timing calibration.
Periodic signal timing calibration is implemented in tim... |
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Invention
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Signal receiver with skew-tolerant strobe gating. A gating signal for masking overhead transition... |
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Invention
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Low-power multi-domain synchronizer. A latency controller within an integrated circuit device ret... |
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2021
|
Invention
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Signal receiver with skew-tolerant strobe gating. A first-in-first-out (FIFO) storage structure w... |
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Invention
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Data-buffer controller/control-signal redriver.
In a memory system having multiple memory socket... |
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Invention
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Entropy generation for use in cryptographic random number generation.
The embodiments described ... |
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Invention
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Stacked-die neural network with integrated high-bandwidth memory.
A neural-network accelerator d... |
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2015
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G/S
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Computer hardware; integrated circuits; computer chips; microprocessors; computer memories; compu... |
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2014
|
G/S
|
Scientific, nautical, surveying, electric, photographic, cinematographic, optical, weighing, meas... |
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G/S
|
computer hardware and software for electronic design interface validation and testing; computer h... |
|
|
G/S
|
Electronic components, electronic circuits, integrated
circuits, microcircuits, printed circuits... |
|
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G/S
|
Electronic components, electronic circuits, integrated circuits, microcircuits, printed circuits,... |
|
|
G/S
|
Computer hardware and software for validation and testing of electronic circuitry and chips; comp... |
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2012
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G/S
|
Light emitting diode (LED) light controls; light emitting diode (LED) displays; light emitting di... |
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2011
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G/S
|
Appareils et instruments pour l'enregistrement, la transmission, le traitement, le stockage et l'... |
|
|
G/S
|
Apparatus and instruments for recording, transmitting,
processing, storing and exchanging data, ... |
|
|
G/S
|
Apparatus and instruments for the recording, transmission, processing, storage and exchange of da... |
|
2008
|
G/S
|
Computers; computer hardware; computer memories; application-specific integrated circuits and gra... |
|
2007
|
G/S
|
Electronic components and systems, namely, computer hardware, integrated circuits, hybrid circuit... |
|
2004
|
G/S
|
Computers; computer hardware; computer memories; memory devices; memory controllers; memory syste... |
|
|
G/S
|
Computer memories; memory devices, namely, [ dynamic random access memories (DRAMS), ] memory sys... |
|
2003
|
G/S
|
Semiconductor devices and integrated circuits |
|
|
G/S
|
Licensing of intellectual property and technology; patent licensing |
|
|
G/S
|
Computer hardware; computer software; computer peripherals; computer memory components; microproc... |
|
2002
|
G/S
|
LICENSING OF INTELLECTUAL PROPERTY AND PATENTED TECHNOLOGY TO OTHERS |
|
|
G/S
|
Licensing of intellectual property and technology |
|
|
G/S
|
COMPUTER HARDWARE; COMPUTER SOFTWARE FOR PREVENTING UNAUTHORIZED ACCESS TO COMPUTER NETWORKS AND ... |
|
|
G/S
|
Computer software and hardware, especially in the field of encrypted and secure communication as ... |
|
1995
|
G/S
|
microprocessor components, peripheral controller components and computer memory components, namel... |
