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2024
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G/S
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Semiconductor devices; Semiconductor chipsets; integrated circuits and integrated circuit modules |
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2023
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Invention
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Methods for forming multi-layer vertical nor-type memory string arrays.
A method for forming 3-d... |
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Invention
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Methods for reducing disturb errors by refreshing data alongside programming or erase operations.... |
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Invention
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Three-dimensional memory string array of thin-film ferroelectric transistors.
Thin-film Ferroele... |
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Invention
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Multi-gate nor flash thin-film transistor strings arranged in stacked horizontal active strips wi... |
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Invention
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Fabrication method for a three-dimensional memory array of thin-film ferroelectric transistors fo... |
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Invention
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Memory centric computational memory system.
A memory structure including three-dimensional NOR m... |
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Invention
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Dynamic random-access memory (dram) configured for block transfers and method thereof.
A method ... |
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Invention
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Wear-level control circuit for memory module.
A memory device includes: (a) one or more memory c... |
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Invention
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Memory controller for a high capacity memory circuit with large number of independently accessibl... |
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Invention
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Three-dimensional vertical nor flash thin film transistor strings.
A memory structure, includes ... |
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Invention
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Memory controller for a high capacity memory circuit using virtual bank addressing.
A memory sys... |
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Invention
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Three-dimensional vertical nor flash thin-film transistor strings.
A memory structure, includes ... |
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G/S
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Semiconductor devices; semiconductor chips; semiconductor chipsets; integrated circuits and integ... |
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Invention
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Device with embedded high-bandwidth, high-capacity memory using wafer bonding.
An electronic dev... |
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Invention
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High capacity memory circuit with low effective latency.
A first circuit formed on a first semic... |
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Invention
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Memory structure including high density three-dimensional nor memory strings of junctionless ferr... |
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Invention
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Memory structure including three-dimensional nor memory strings and method of fabrication.
A mem... |
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G/S
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Semiconductor devices; semiconductor chipsets; integrated circuits and integrated circuit modules |
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Invention
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Memory device and method for manufacturing therefor.
A memory device includes a stacked body of ... |
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Invention
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Memory structure including three-dimensional nor memory strings of junctionless ferroelectric sto... |
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2022
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Invention
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Quasi-volatile system-level memory.
A high-capacity system memory may be built from both quasi-v... |
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Invention
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Memory system implementing write abort operation for reduced read latency. A memory system includ... |
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Invention
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Memory system implementing write abort operation for reduced read latency.
A memory system inclu... |
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Invention
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Memory device including arrangement of independently and concurrently operable tiles of memory tr... |
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Invention
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Memory circuit, system and method for rapid retrieval of data sets. A 3-dimensional array of NOR ... |
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Invention
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Process for preparing a channel region of a thin-film transistor in a 3-dimensional thin-film tra... |
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Invention
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Staggered word line architecture for reduced disturb in 3-dimensional nor memory arrays.
A stagg... |
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Invention
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Cool electron erasing in thin-film storage transistors.
A storage transistor has a tunnel dielec... |
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Invention
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Memory centric system incorporating computational memory. Semiconductor memory systems and archit... |
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Invention
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Memory structure including three-dimensional nor memory strings of junctionless ferroelectric mem... |
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Invention
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Memory structure of three-dimensional nor memory strings of junctionless ferroelectric memory tra... |
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Invention
|
Memory circuit, system and method for rapid retrieval of data sets.
A 3-dimensional array of NOR... |
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Invention
|
Three-dimensional memory string array of thin-film ferroelectric transistors formed with an oxide... |
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Invention
|
Three-dimensional nor memory string arrays of thin-film ferroelectric transistors.
A memory stru... |
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Invention
|
Three-dimensional nor memory string arrays of thin-film ferroelectric transistors. A memory struc... |
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Invention
|
3-dimensional memory string array of thin-film ferroelectric transistors. Thin-film Ferroelectric... |
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Invention
|
Methods for forming multilayer horizontal nor-type thin-film memory strings.
Various methods ove... |
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Invention
|
Process for forming a vertical thin-film transistor that serves as a connector to a bit-line of a... |
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Invention
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Thin film storage transistor with silicon oxide nitride charge trapping layer.
A thin-film stora... |
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Invention
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Three-dimensional memory structure fabricated using repeated active stack sections.
A method for... |
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Invention
|
Three-dimensional memory structure fabrication using channel replacement.
A process for fabricat... |
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Invention
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Methods for fabrication of 3-dimensional nor memory arrays.
Carbon has many advantageous uses as... |
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Invention
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Semiconductor memory device with write disturb reduction.
A semiconductor memory device implemen... |
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Invention
|
Semiconductor memory device with write disturb reduction. A semiconductor memory device implement... |
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Invention
|
Thin-film storage transistor with ferroelectric storage layer. According to one embodiment of the... |
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Invention
|
Memory interface with configurable high-speed serial data lanes for high bandwidth memory. A memo... |
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2021
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Invention
|
Process for a 3-dimensional array of horizontal nor-type memory strings. In the highly efficient ... |
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Invention
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Methods for fabricating a 3-dimensional memory structure of nor memory strings. A process for bui... |
|
2020
|
G/S
|
Semiconductors, namely, semiconductor memory and storage
chips; interfaces for computers, mobile... |
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G/S
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Semiconductors, namely, semiconductor memory and storage chips; Electronic display interfaces for... |
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2019
|
G/S
|
Semiconductors, namely, memory and storage chips. Licensing of technology and intellectual proper... |
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G/S
|
Semiconductors, namely, semiconductor memory and storage chips |
