2023
|
Invention
|
Power supply with intergrated voltage regulator and current limiter and method.
Disclosed is a p... |
|
Invention
|
Planar transistor device comprising at least one layer of a two-dimensional (2d) material.
A pla... |
2022
|
Invention
|
Implanted isolation for device integration on a common substrate.
Structures including devices, ... |
|
Invention
|
Metamaterial edge couplers in the back-end-of-line stack of a photonics chip.
Structures for an ... |
|
Invention
|
Semiconductor structure with semiconductor-on-insulator region and method.
Disclosed are semicon... |
|
Invention
|
Bipolar junction transistors with a base layer participating in a diode.
Structures for a bipola... |
|
Invention
|
Lateral bipolar transistor with emitter and collector regions including portions within in-insula... |
|
Invention
|
Lateral bipolar junction transistors with a back-gate.
Structures for a bipolar junction transis... |
|
Invention
|
Bipolar transistor with collector contact.
The present disclosure relates to semiconductor struc... |
|
Invention
|
Lateral bipolar junction transistors with an airgap spacer.
Structures for a bipolar junction tr... |
|
Invention
|
Pic die and package with cover for multiple level and multiple depth connections of fibers to on-... |
|
Invention
|
Lateral heterojunction bipolar transistor with improved breakdown voltage and method.
Disclosed ... |
|
Invention
|
Bipolar transistor structure on semiconductor fin and methods to form same.
Embodiments of the d... |
|
Invention
|
Multi-port register file for partial-sum accumulation. Embodiments of the present disclosure prov... |
2021
|
Invention
|
Bipolar transistors.
The present disclosure relates to semiconductor structures and, more partic... |
|
Invention
|
Bipolar junction transistors with duplicated terminals.
Structures for a bipolar junction transi... |
|
Invention
|
Semiconductor structure including sectioned well region.
Disclosed is a semiconductor structure ... |
|
Invention
|
Avalanche photodetectors with a multiple-thickness charge sheet.
Structures for an avalanche pho... |
|
Invention
|
Stacked field-effect transistors with a shielded output.
Structures including stacked field-effe... |
|
Invention
|
High electron mobility transistors having barrier liners and integration schemes.
A transistor s... |
|
Invention
|
Field-effect transistors with a crystalline body embedded in a trench isolation region.
Structur... |
|
Invention
|
Bragg reflector for photonic chip security structure.
The present disclosure relates to semicond... |
|
Invention
|
Photonic chip security structure.
The present disclosure relates to semiconductor structures and... |
|
Invention
|
Symmetric bi-directional silicon-controlled rectifier for electrostatic discharge protection.
Di... |
|
Invention
|
Optical couplers with diagonal light transfer.
Structures for an optical coupler and methods of ... |
|
Invention
|
Transistor with faceted, raised source/drain region.
The present disclosure relates to semicondu... |
|
Invention
|
Low-dropout voltage regulator (ldo) having overshoot/undershoot capacitor.
An apparatus includes... |
|
Invention
|
Transistor with self-aligned gate and self-aligned source/drain terminal(s) and methods.
Disclos... |
|
Invention
|
Logic cell layout design for high density transistors.
The present disclosure relates to semicon... |
|
Invention
|
Optical components undercut by a sealed cavity. Structures including an optical component, such a... |
|
Invention
|
Wavelength division multiplexing filters including a subwavelength grating.
Structures for a wav... |
|
Invention
|
Integrated circuit structure with spacer sized for gate contact and methods to form same.
Embodi... |
|
Invention
|
Pic die and package with multiple level and multiple depth connections of fibers to on-chip optic... |
|
Invention
|
Photonics chips and semiconductor products having angled optical fibers.
The disclosed subject m... |
|
Invention
|
Contact-over-active-gate transistor structures with contacts landed on enlarged gate portions.
S... |
|
Invention
|
Memory structure with self-adjusting capacitive coupling-based read and write assist.
Disclosed ... |
|
Invention
|
Device with dual isolation structure.
The present disclosure relates to semiconductor structures... |
|
Invention
|
High electron mobility transistor devices having a silicided polysilicon layer.
The present disc... |
|
Invention
|
Low-leakage row decoder and memory structure incorporating the low-leakage row decoder.
Disclose... |
|
Invention
|
Pic die with optical deflector for ambient light.
A photonic integrated circuit (PIC) die includ... |
|
Invention
|
Semiconductor structure with shared well.
The present disclosure relates to semiconductor struct... |
|
Invention
|
Ic structure including porous semiconductor layer under trench isolations adjacent source/drain r... |
|
Invention
|
Ic structure including porous semiconductor layer under trench isolation.
An integrated circuit ... |
|
Invention
|
Contact-free biosensor.
A structure includes a first layer having a recess. The structure furthe... |
|
Invention
|
Edge couplers with confining features.
Structures including an edge coupler and methods of fabri... |
|
Invention
|
Extended-drain metal-oxide-semiconductor devices with a silicon-germanium layer beneath a portion... |
|
Invention
|
Photonic integrated circuit structure with at least one tapered sidewall liner adjacent to a wave... |
|
Invention
|
Transistor with air gap under raised source/drain region in bulk semiconductor substrate.
A tran... |
|
Invention
|
Semiconductor device having a gate contact over an active region.
A semiconductor device compris... |
|
Invention
|
Optical polarizer with varying waveguide core thickness and methods to form same.
Embodiments of... |