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H05K 1/18 - Printed circuits structurally associated with non-printed electric components 113
H05K 1/02 - Printed circuits - Details 100
H05K 3/46 - Manufacturing multi-layer circuits 88
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1.

Package having component carrier with cavity and electronic component as well as functional filling medium therein

      
Application Number 18479944
Status Pending
Filing Date 2023-10-03
First Publication Date 2024-04-04
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor
  • Weis, Gerald
  • Papperi Devarajulu Deenadayalan, Janagan

Abstract

A package includes a component carrier having a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a cavity in the stack, an active electronic component in the cavity, and a functional filling medium filling at least part of the cavity. The functional filling medium extends to an external surface of the stack for defining an output surface and configured to transmit at least one output of the active electronic component toward the output surface.

IPC Classes  ?

  • H01L 23/552 - Protection against radiation, e.g. light
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/498 - Leads on insulating substrates

2.

Electronic Device With Connected Component Carrier and Fluid Cooling Member

      
Application Number 18537287
Status Pending
Filing Date 2023-12-12
First Publication Date 2024-04-04
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Weis, Gerald

Abstract

An electronic device includes a component carrier having a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, an electronic component on and/or in the stack, and a cooling member with a fluid cooling unit at least partially therein. The component carrier and the cooling member are connected by a connection structure. The connection structure comprises thermal interface material which contributes to a heat removal from the electronic component to the cooling unit.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

3.

Component Carrier With an Embedded Thermally Conductive Block and Manufacturing Method

      
Application Number 18518724
Status Pending
Filing Date 2023-11-24
First Publication Date 2024-03-14
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Schlaffer, Erich
  • Sattler, Sebastian

Abstract

A component carrier includes: i) a first layer stack (comprising at least one first electrically conductive layer structure and/or at least one first electrically insulating layer structure, ii) a component embedded in the first layer stack, where a main surface of the component is essentially flush with an outer main surface of the first layer stack iii) a second layer stack comprising at least one second electrically conductive layer structure and/or at least one second electrically insulating layer structure, and iv) a thermally conductive block embedded in the second layer stack. The layer stacks are connected with each other so that a thermal path from the embedded component via the thermally conductive block up to an exterior surface of the component carrier has a minimum thermal conductivity of at least 7 W/mK, in particular at least 40 W/mK. Further, a method of manufacturing the component carrier is described.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/30 - Assembling printed circuits with electric components, e.g. with resistor

4.

Electronic Package Comprising a Decoupling Layer Structure

      
Application Number 18473775
Status Pending
Filing Date 2023-09-25
First Publication Date 2024-01-25
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Tuominen, Mikael Andreas
  • Tay, Seok Kim
  • Stahr, Johannes
  • Zluc, Andreas
  • Schwarz, Timo
  • Weidinger, Gerald
  • Schober, Mario

Abstract

An electronic package having a base structure; a layer stack formed over the base structure; and a component embedded at least partially within the base structure and/or within the layer stack. The layer stack has a decoupling layer structure, the decoupling layer structure with a decoupling material having a Young Modulus being smaller than 1 GPa.

IPC Classes  ?

  • H01L 23/373 - Cooling facilitated by selection of materials for the device
  • H01L 23/492 - Bases or plates
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings

5.

Component Carrier With Electronic Components and Thermally Conductive Blocks on Both Sides

      
Application Number 18251875
Status Pending
Filing Date 2021-11-05
First Publication Date 2024-01-11
Owner AT&S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT (Austria)
Inventor
  • Morianz, Mike
  • Stahr, Johannes
  • Pressler, Simon
  • Prutti, Maria

Abstract

A component carrier which includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a first electronic component and a second electronic component arranged in the stack, a first block and a second block arranged in the stack below the first electronic component and the second electronic component, and a third block and a fourth block arranged in the stack above the first electronic component and the second electronic component, wherein said blocks are thermally conductive.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices
  • H01L 23/373 - Cooling facilitated by selection of materials for the device

6.

Component Carrier For Waveguide Applications

      
Application Number 18253341
Status Pending
Filing Date 2021-11-11
First Publication Date 2023-12-21
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor
  • Trischler, Heinrich
  • Schlaffer, Erich
  • Leitgeb, Markus
  • Sattler, Sebastian
  • Pressler, Simon

Abstract

A component carrier which includes a stack having at least one electrically conductive layer structure, at least one electrically insulating layer structure, and a recess being at least partially formed in the stack, optionally having an electrically conductive coating, and being configured as waveguide, wherein a plurality of edges delimiting the recess are formed by electrically conductive material of the at least one electrically conductive layer structure and/or of the optional electrically conductive coating.

IPC Classes  ?

7.

Component Carrier Having Dielectric Layer With Conductively Filled Through Holes Tapering in Opposite Directions

      
Application Number 18460632
Status Pending
Filing Date 2023-09-04
First Publication Date 2023-12-21
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Wilfing, Roland

Abstract

A component carrier includes a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure. At least one of the at least one electrically insulating layer structure(s) has at least partly tapered through holes filled substantially completely with an electrically conductive filling. The at least one electrically conductive layer structure and the electrically conductive filling are made of the same material. Different ones of the through holes of one electrically insulating layer structure are tapering in opposite directions.

IPC Classes  ?

  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

8.

Component With Dielectric Layer for Embedding in Component Carrier

      
Application Number 18357236
Status Pending
Filing Date 2023-07-24
First Publication Date 2023-11-16
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Weidinger, Gerald
  • Zluc, Andreas

Abstract

A component carrier includes a stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, and a component having one or more pads and at least one dielectric layer on at least one main surface of the component. The at least one dielectric layer does not extend beyond the main surface in a lateral direction. The dielectric layer at least partially covers one or more pads of the component. In addition, at least one electrically conductive contact extends through at least one opening in the dielectric layer up to at least one of the pads.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/373 - Cooling facilitated by selection of materials for the device
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings

9.

Carrier assembly and method for producing a carrier assembly

      
Application Number 18124431
Status Pending
Filing Date 2023-03-21
First Publication Date 2023-11-02
Owner AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AG (Austria)
Inventor Gavagnin, Marco

Abstract

Described herein is a component carrier, wherein the component carrier comprises a stack comprising a plurality of electrically conductive layer structures and at least one electrically insulating layer structure, wherein a first of said electrically conductive layer structures comprises a first surface where a first plurality of conductive nanowires is connected and a second of said electrically conductive layer structures comprises a second surface where a second plurality of conductive nanowires is connected, wherein said first and second surfaces and said first and second pluralities of nanowires are configured to at least partially connect the nanowires of the first plurality of nanowires with the respective nanowires of the second plurality of nanowires.

IPC Classes  ?

10.

Component Carrier and Method of Manufacturing the Same

      
Application Number 18338287
Status Pending
Filing Date 2023-06-20
First Publication Date 2023-10-19
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Mayr, Günther

Abstract

A component carrier includes a laminated stack having electrically insulating layer structures and electrically conductive layer structures; and an electrically insulating cap structure selectively covering an optical waveguide at an exterior surface of the laminated stack. A method for manufacturing a component carrier is also disclosed.

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements

11.

Component Carrier

      
Application Number 18124414
Status Pending
Filing Date 2023-03-21
First Publication Date 2023-10-05
Owner AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AG (Austria)
Inventor Gavagnin, Marco

Abstract

Described herein are a component carrier, wherein the component carrier comprises: a stack comprising a plurality of electrically conductive layer structures and at least one electrically insulating layer structure, wherein at least two of said electrically conductive layer structures are connected through a plurality of (electrical) conductive nanowires.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

12.

Interconnection of printed circuit boards with nanowires

      
Application Number 18124450
Status Pending
Filing Date 2023-03-21
First Publication Date 2023-10-05
Owner AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AG (Austria)
Inventor
  • Haimlinger, Klaus
  • Hoelzl, Christian
  • Gavagnin, Marco

Abstract

A carrier assembly may include a first carrier sub-assembly, said first carrier sub-assembly having an elongated shape and comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, said at least one electrically conductive layer structure extending up to a first area provided on one of two extremities of the elongated shape, wherein a first plurality of conductive nanowires is provided on said first area, and a second carrier sub-assembly, said second carrier sub-assembly comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, said at least one electrically conductive layer structure comprising a second area, wherein a second plurality of conductive nanowires is provided on that second area.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/14 - Structural association of two or more printed circuits
  • H05K 3/46 - Manufacturing multi-layer circuits

13.

Inlay With Exposed Porous Layer, Component Carrier and Manufacturing Methods

      
Application Number 18188401
Status Pending
Filing Date 2023-03-22
First Publication Date 2023-09-28
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor
  • Paller, Stefanie
  • Grober, Gernot

Abstract

An inlay for a component carrier includes a gas-permeable porous layer structure, an upper layer structure, arranged on the gas-permeable porous layer structure, the upper layer structure defining a cavity such that a portion of the gas-permeable porous layer structure is exposed and an upper metal layer structure arranged on the upper layer structure. A component carrier with the inlay and manufacturing methods of the inlay and the component carrier are described.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/02 - Printed circuits - Details
  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits

14.

Inductor Inlay for a Component Carrier and a Method of Manufacturing the Same

      
Application Number 18182272
Status Pending
Filing Date 2023-03-10
First Publication Date 2023-09-21
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor
  • Weis, Gerald
  • Kastelic, Markus
  • Weidinger, Gerald
  • Alothman Alterkawi, Ahmad Bader
  • Stahr, Johannes

Abstract

An inductor inlay, a component carrier, and methods for manufacturing the inductor inlay and the component carrier. The inductor inlay has a magnetic layer stack of interconnected magnetic layers and an electrically conductive structure embedded in the magnetic stack. The electrically conductive structure is configured as an inductor element with a coil-like shape. A component carrier includes a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure and the inductor inlay with the magnetic layer stack with interconnected magnetic layers and the electrically conductive structure embedded in the magnetic layer stack. Methods for manufacturing the inductor inlay and component carrier are further described.

IPC Classes  ?

15.

Component Carrier With Embedded Magnetic Inlay and Integrated Coil Structure

      
Application Number 18325799
Status Pending
Filing Date 2023-05-30
First Publication Date 2023-09-21
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor
  • Salkovic, Ivan
  • Weidinger, Gerald
  • Stahr, Johannes

Abstract

A component carrier includes a stack with electrically conductive layer structures, at least one electrically insulating layer structure, and a magnetic inlay embedded in the stack. The electrically conductive layer structures form at least part of an electrically conductive coil structure surrounding at least part of the magnetic inlay. The coil structure includes at least one vertical segment with at least one plated slot filled with electrically conductive material.

IPC Classes  ?

16.

Component Carrier with Surface Mounted Components Connected By High Density Connection Region

      
Application Number 17655160
Status Pending
Filing Date 2022-03-16
First Publication Date 2023-09-21
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Leitgeb, Markus
  • Freydl, Gerhard

Abstract

A component carrier includes a stack with electrically conductive layer structures and at least one electrically insulating layer structure. The electrically conductive layer structures have a higher density connection region and a lower density connection region, and a first component and a second component which are surface-mounted on the stack. The first component and the second component are electrically coupled with each other by the higher density connection region.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices

17.

Component Carrier with Stack-Stack Connection for Connecting Components

      
Application Number 17655162
Status Pending
Filing Date 2022-03-16
First Publication Date 2023-09-21
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Leitgeb, Markus
  • Grober, Gernot

Abstract

A component carrier includes a stack with at least one electrically insulating layer structure and electrically conductive layer structures some of which have a first density of trace structures and a second density of connection structures, and a further stack with at least one further electrically insulating layer structure and further electrically conductive layer structures some of which have a third density of further trace structures and a fourth density of further connection structures. A first component is applied to the stack and a second component is embedded in the further stack. The connection structures are respectively connected to the further connection structures. The first density of trace structures is lower than the third density of further trace structures. The stack and the further stack are connected with each other by the connection structures and by the further connection structures. The first component is connected to the second component.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/42 - Plated through-holes
  • H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering

18.

Component Carrier With Protruding Portions and Manufacturing Method

      
Application Number 18156736
Status Pending
Filing Date 2023-01-19
First Publication Date 2023-08-17
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor Lee, Minwoo

Abstract

A coreless component carrier includes a stack with at least two electrically conductive layer structures and at least one electrically insulating layer structure, vias that vertically interconnect the electrically conductive layer structures in the stack, and protruding portions that protrude from the outermost electrically conductive layer structure of the stack beyond the upper main surface of the stack. The vias include an electrically conductive material and taper in the same direction. Methods for manufacturing the coreless component carrier are also disclosed.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/02 - Printed circuits - Details
  • H05K 3/46 - Manufacturing multi-layer circuits

19.

Metal Body Formed on a Component Carrier by Additive Manufacturing

      
Application Number 18301244
Status Pending
Filing Date 2023-04-16
First Publication Date 2023-08-10
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor
  • Gavagnin, Marco
  • Silvano De Sousa, Jonathan

Abstract

A component carrier includes a carrier body formed of a plurality of electrically conductive layer structures and/or electrically insulating layer structures, a metal surface structure coupled to the carrier body and a metal body directly on the metal surface structure formed by additive manufacturing. The metal body is arranged directly on the metal surface structure without material and layers in between.

IPC Classes  ?

  • B22F 10/28 - Powder bed fusion, e.g. selective laser melting [SLM] or electron beam melting [EBM]
  • B22F 10/47 - Structures for supporting workpieces or articles during manufacture and removed afterwards characterised by structural features
  • B22F 10/64 - Treatment of workpieces or articles after build-up by thermal means
  • B33Y 80/00 - Products made by additive manufacturing
  • B33Y 10/00 - Processes of additive manufacturing

20.

Component Carrier and Method of Manufacturing the Same

      
Application Number 18301938
Status Pending
Filing Date 2023-04-17
First Publication Date 2023-08-10
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor
  • Silvano De Sousa, Jonathan
  • Schlaffer, Erich

Abstract

A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a component including a terminal made of a first electrically conductive material and being embedded in the stack, a recess in the stack exposing at least a part of the terminal, an interface structure on the at least partially exposed terminal and an electrically conductive structure on the interface structure made of a second electrically conductive material.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
  • H05K 3/30 - Assembling printed circuits with electric components, e.g. with resistor
  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits

21.

Component Carrier With Embedded IC Substrate Inlay, and Manufacturing Method

      
Application Number 18160229
Status Pending
Filing Date 2023-01-26
First Publication Date 2023-08-03
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor
  • Baftiri, Artan
  • Mok, Jeesoo

Abstract

A component carrier, including a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure, a cavity in the stack, an inlay substrate at least partially embedded in the cavity. The inlay substrate includes a component and an IC substrate stacked one above the other, a first redistribution structure that electrically connects the component to a first component carrier main surface, and a second redistribution structure that electrically connects the IC substrate to a second component carrier main surface opposed to the first component carrier main surface.

IPC Classes  ?

  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01R 12/52 - Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

22.

Module Comprising a Semiconductor-based Component and Method of Manufacturing the Same

      
Application Number 18160406
Status Pending
Filing Date 2023-01-27
First Publication Date 2023-08-03
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor Mok, Jeesoo

Abstract

A module includes a component carrier including a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure. A semiconductor-based bridging component having a redistribution structure is embedded in the stack. An electronic component is mounted on the component carrier and being partially electrically connected with the semiconductor-based component and partially electrically connected with another element of the component carrier or the module.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/498 - Leads on insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups

23.

Component Carrier With Connected Component Having Redistribution Layer at Main Surface

      
Application Number 18156373
Status Pending
Filing Date 2023-01-18
First Publication Date 2023-07-20
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor
  • Baftiri, Artan
  • Mok, Jeesoo

Abstract

A component carrier includes a stack including at least one electrically conductive layer structure and at least one electrically insulating layer structure and a component connected to the stack. The component has a planar redistribution layer at a main surface thereof.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/30 - Assembling printed circuits with electric components, e.g. with resistor

24.

Antenna Layer Structures Separated by Fluid-Filled Cavity, an Antenna Inlay, and a Component Carrier

      
Application Number 18154161
Status Pending
Filing Date 2023-01-13
First Publication Date 2023-07-13
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor
  • Vockenberger, Christian
  • Alothman Alterkawi, Ahmad Bader

Abstract

An antenna radiation module for assembling to an antenna inlay for a component carrier or to a component carrier. The module includes a dielectric layer structure and an antenna radiation layer structure. The antenna radiation layer structure is embedded in the first dielectric layer structure. Further, an antenna inlay, a component carrier, and a manufacturing method are described.

IPC Classes  ?

  • H01Q 1/52 - Means for reducing coupling between antennas; Means for reducing coupling between an antenna and another structure
  • H01Q 9/04 - Resonant antennas
  • H01Q 1/40 - Radiating elements coated with, or embedded in, protective material

25.

Method for Making Contact with a Component Embedded in a Printed Circuit Board

      
Application Number 18055759
Status Pending
Filing Date 2022-11-15
First Publication Date 2023-06-15
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Weidinger, Gerald
  • Zluc, Andreas
  • Stahr, Johannes

Abstract

The invention pertains to a method for the bonding of a component embedded into a printed circuit board exhibiting the following steps: Provision of a core exhibiting at least one insulating layer and at least one conductor layer applied to the insulating layer, Embedding of at least one component into a recess of the insulating layer, wherein the contacts of the component are essentially situated in the plane of an outer surface of the core exhibiting the at least one conductor layer, Application of a photoimageable resist onto the one outer surface of the core on which the component is arranged, while filling the spaces between the contacts of the component, Clearing of end faces of the contacts and of the areas of the conductor layer covered by the photoimageable resist by exposing and developing the photoimageable resist, by application of a semi-additive process, deposition of a layer of conductor material onto the cleared end faces of the contacts and the cleared areas of the conductor layer and formation of a conductor pattern on at least the one outer surface of the core on which the component is arranged, as well as the interconnecting paths between the contacts and the conductor pattern, and Removal of the areas of the conductor layer not belonging to the conductor pattern.

IPC Classes  ?

  • H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits

26.

Method of Manufacturing a Component Carrier Metal Trace and a Component Carrier

      
Application Number 18061989
Status Pending
Filing Date 2022-12-05
First Publication Date 2023-06-08
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Lee, Minwoo
  • Baftiri, Artan

Abstract

A method for manufacturing a component carrier includes i) providing a metal layer, in particular a copper layer; ii) forming a film on the metal layer; iii) patterning the film in order to expose a part of the metal layer; iv) carrying out a first etch, thereby thinning the film and removing a further part of the exposed metal layer; and thereafter v) carrying out a second etch, thereby forming at least one metal trace that is spatially separated from the metal layer. A component carrier made by the method is further described.

IPC Classes  ?

  • H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
  • H05K 1/02 - Printed circuits - Details

27.

Component Carrier With a Via Containing a Hardened Filling Material

      
Application Number 18053716
Status Pending
Filing Date 2022-11-08
First Publication Date 2023-05-18
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Yao, Shuying
  • Ifis, Abderrazzaq
  • Riedler, Jens
  • Blanco, Vanesa López

Abstract

A component carrier having a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure; an opening located at least partially in the stack; and a fill material which is located within the opening. The fill material is a photosensitive material, wherein at least a part of the photosensitive material has undergone a hardening treatment with electromagnetic radiation. A method for manufacturing such a component carrier is further described.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process

28.

Component Carrier for Microwave Applications With Stack Pieces Interconnected at an Electrically Conductive Connection Interface

      
Application Number 18049604
Status Pending
Filing Date 2022-10-25
First Publication Date 2023-05-04
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Sattler, Sebastian
  • Pressler, Simon
  • Trischler, Heinrich

Abstract

A component carrier includes a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure, and a microwave structure embedded at least partially in the stack. The microwave structure configured for exciting a microwave propagation mode and having at least two stack pieces being interconnected with each other at an electrically conductive connection interface.

IPC Classes  ?

29.

Component Embedded in Component Carrier and Having an Exposed Side Wall

      
Application Number 18147276
Status Pending
Filing Date 2022-12-28
First Publication Date 2023-05-04
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor
  • Schuster, Bettina
  • Silvano De Sousa, Jonathan
  • Zluc, Andreas
  • Leitgeb, Markus
  • Stahr, Hannes

Abstract

A method for manufacturing a component carrier includes i) providing a metal layer, in particular a copper layer; ii) forming a film on the metal layer; iii) patterning the film in order to expose a part of the metal layer; iv) carrying out a first etch, thereby thinning the film and removing a further part of the exposed metal layer; and thereafter v) carrying out a second etch, thereby forming at least one metal trace that is spatially separated from the metal layer. A component carrier made by the method is further described.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 31/0203 - Containers; Encapsulations
  • H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
  • G02B 6/42 - Coupling light guides with opto-electronic elements

30.

Coreless Component Carrier With Embedded Components

      
Application Number 18049826
Status Pending
Filing Date 2022-10-26
First Publication Date 2023-04-27
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Zhao, Allen

Abstract

A coreless component carrier includes (a) a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure; and (b) a component embedded in the stack. At least one electrically insulating layer structure includes a reinforced layer structure, which is arranged at an outer main surface of the stack. Further described is a method for manufacturing such a coreless component carrier and preferably simultaneously a further coreless component carrier of the same type.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/498 - Leads on insulating substrates
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H05K 1/03 - Use of materials for the substrate
  • H05K 3/46 - Manufacturing multi-layer circuits

31.

Component Carrier With Partially Metallized Hole Using Anti-Plating Dielectric Structure and Electroless Plateable Separation Barriers

      
Application Number 18046609
Status Pending
Filing Date 2022-10-14
First Publication Date 2023-04-20
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Zhou, Jiangfeng

Abstract

A component carrier includes a stack with at least one electrically conductive layer structure, at least one electrically insulating layer structure, and a hole in the stack having a first hole portion covered with metal and having a second hole portion not covered with metal, wherein the second hole portion is defined by an anti-plating dielectric structure and an electroless plateable separation barrier.

IPC Classes  ?

  • H05K 3/42 - Plated through-holes
  • H01L 23/498 - Leads on insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
  • H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern

32.

Partially Filling a Component Carrier Opening in a Controlled Manner

      
Application Number 17934243
Status Pending
Filing Date 2022-09-22
First Publication Date 2023-04-06
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Wulz, Thomas
  • Schlick, Daniel
  • Lackner, Sebastian
  • Wilding, Dominik

Abstract

A component carrier includes a layer stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, at least one opening in the layer stack, a first curable dielectric element arranged at least partially on the opening, and a second curable dielectric element arranged adjacent to the first curable dielectric element, so that there is an interface region in between. A part of the first curable dielectric element extends partially into the opening.

IPC Classes  ?

33.

Electronic Package with Components Mounted at Two Sides of a Layer Stack

      
Application Number 17933069
Status Pending
Filing Date 2022-09-16
First Publication Date 2023-03-23
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Leitgeb, Markus
  • Schrems, Martin

Abstract

A method includes forming a layer stack with at least one electrically insulating layer structure and at least one patterned electrically conductive layer structure on a temporary carrier, the layer stack includes a lower surface adjoining the temporary carrier and an upper surface opposite to the lower surface; mounting a first component at the upper surface; placing a first frame structure at the upper surface, the first frame structure surrounding at least partially the first component; covering the first component with a first coating material, the first coating material spatially extending at least partially into voids at or within the first frame structure and into voids at or within the layer stack; and removing the temporary carrier. The lower surface of the layer stack is an even surface. The opposite upper surface of the layer stack is an uneven surface. An electronic package can be manufactured with the described method.

IPC Classes  ?

  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/498 - Leads on insulating substrates
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body

34.

Forming Through Hole in Component Carrier by Laser Drilling Blind Hole and Extending the Latter by Etching

      
Application Number 17932864
Status Pending
Filing Date 2022-09-16
First Publication Date 2023-03-16
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Ifis, Abderrazzaq
  • Riedler, Jens
  • Herres, Lukas
  • Skrivanek, Felix
  • Platzer, Julia

Abstract

A method of manufacturing a component carrier includes laser drilling a blind hole in a layer stack, and subsequently extending the blind hole to a through hole by etching. A component carrier includes an electrically insulating layer structure, an electrically conductive layer structure directly on an electrically insulating layer structure, and a tapering through hole extending through the electrically conductive layer structure and through the electrically insulating layer structure with a lateral overhang of the electrically conductive layer structure beyond the electrically insulating layer structure at the tapering through hole of not more than 20% of a maximum diameter of the tapering through hole.

IPC Classes  ?

  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 3/42 - Plated through-holes
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits

35.

Component Carrier With Embedded Semiconductor Component and Embedded Highly-Conductive Block Which are Mutually Coupled

      
Application Number 18045256
Status Pending
Filing Date 2022-10-10
First Publication Date 2023-02-23
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Stahr, Johannes
  • Zluc, Andreas
  • Morianz, Mike
  • Moitzi, Heinz

Abstract

A component carrier includes a stack having at least one horizontal electrically conductive layer structure, at least one electrically insulating layer structure, a semiconductor component embedded in the stack, and at least one vertical via being laterally offset from the semiconductor component. The at least one horizontal electrically conductive layer structure electrically connects the vertical via to a bottom main surface of the semiconductor component. The component carrier is configured for a current flow from the vertical via to the horizontal electrically conductive layer structure, from the horizontal electrically conductive layer structure to the bottom main surface of the semiconductor component, from the bottom main surface of the semiconductor component to an upper main surface of the semiconductor component, and from the upper surface of the semiconductor component to the outside of the component carrier.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/02 - Printed circuits - Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits

36.

Laminated Component Carrier With a Thermoplastic Structure

      
Application Number 18045376
Status Pending
Filing Date 2022-10-10
First Publication Date 2023-02-23
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Krivec, Thomas

Abstract

A component carrier for carrying at least one electronic component includes (a) a plurality of electrically conductive layers; (b) a plurality of electrically insulating layers; and (c) a thermoplastic structure. The electrically conductive layers, the electrically insulating layers, and the thermoplastic structure form a laminate. Further, a method for manufacturing such a component carrier and an electronic apparatus including such a component carrier are provided.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 3/46 - Manufacturing multi-layer circuits

37.

Component Carrier and Method of Manufacturing a Component Carrier

      
Application Number 17816819
Status Pending
Filing Date 2022-08-02
First Publication Date 2023-02-09
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Sattler, Sebastian
  • Vockenberger, Christian
  • Alothman Alterkawi, Ahmad Bader

Abstract

A component carrier includes a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. The at least one electrically conductive layer structure includes a first trace. A tapering trench is formed in the at least one electrically insulating layer structure beside and below the first trace. A method of manufacturing the component carrier is also described.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
  • H01L 23/498 - Leads on insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01P 3/08 - Microstrips; Strip lines

38.

Manufacturing Component Carrier With Cavity By Trimming Poorly Adhesive Structure Before Removing Stack Material

      
Application Number 17817003
Status Pending
Filing Date 2022-08-02
First Publication Date 2023-02-09
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Jiang, Jeffrey
  • Zhao, Allen
  • Baftiri, Artan

Abstract

A method of manufacturing a component carrier includes forming a poorly adhesive structure on at least one layer structure, thereafter removing part of the poorly adhesive structure to thereby define a lateral limit of the poorly adhesive structure, thereafter attaching at least one further layer structure to the at least one layer structure and to the poorly adhesive structure, and forming a cavity by removing material of the at least one further layer structure above the poorly adhesive structure.

IPC Classes  ?

  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/02 - Printed circuits - Details
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 3/30 - Assembling printed circuits with electric components, e.g. with resistor

39.

Component carrier having dielectric layer with conductively filled through holes tapering in opposite directions

      
Application Number 17444266
Grant Number 11784115
Status In Force
Filing Date 2021-08-02
First Publication Date 2023-02-02
Grant Date 2023-10-10
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Wilfing, Roland

Abstract

A component carrier includes a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure. At least one electrically insulating layer structure has at least partly tapering through holes filled substantially completely with an electrically conductive filling. The at least one electrically conductive layer structure and the electrically conductive filling are made of the same material. In addition, different ones of the through holes of one electrically insulating layer structure are tapering in opposite directions.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H01L 23/498 - Leads on insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups

40.

Component Carrier Interconnection and Manufacturing Method

      
Application Number 17804079
Status Pending
Filing Date 2022-05-25
First Publication Date 2022-12-01
Owner AT&S Austria Technologie & Systemtechnik Aktiengensellschaft (Austria)
Inventor
  • Ifis, Abderrazzaq
  • Riedler, Jens
  • Riegler, Eva

Abstract

A component carrier assembly includes a first component carrier having a first electrically insulating layer structure and a via in the first electrically insulating layer structure, where the via is at least partially filled with electrically conductive material and where an upper part of the via extends beyond an outer main surface of the first component carrier; and a second component carrier having a second electrically insulating layer structure, and an electrically conductive adhesive material that is at least partially embedded in the second electrically insulating layer structure. The first component carrier and the second component carrier are interconnected and the upper part of the via at least partially penetrates into the electrically conductive adhesive material.

IPC Classes  ?

  • H05K 1/14 - Structural association of two or more printed circuits
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/12 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using printing techniques to apply the conductive material
  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
  • H05K 3/36 - Assembling printed circuits with other printed circuits

41.

Method of Manufacturing Component Carrier and Component Carrier Intermediate Product

      
Application Number 17817256
Status Pending
Filing Date 2022-08-03
First Publication Date 2022-11-24
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Gavagnin, Marco
  • Schulz, Gernot

Abstract

A component carrier intermediate product includes a first electrically-insulating layer structure; an at least partially uncured and patterned second electrically-insulating layer structure having recesses, wherein the recesses are filled by an electrically-conductive material; and a component carrier section arranged on the at least partially uncured and patterned second electrically-insulating layer structure.

IPC Classes  ?

  • H05K 3/46 - Manufacturing multi-layer circuits

42.

Magnetic Inlay With An Adjustable Inductance Value for a Component Carrier and a Manufacturing Method

      
Application Number 17663386
Status Pending
Filing Date 2022-05-13
First Publication Date 2022-11-24
Owner AT & S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Weidinger, Gerald
  • Salkovic, Ivan
  • Kastelic, Markus

Abstract

A magnetic inlay for a component carrier includes a magnetic matrix and an electrically conductive structure embedded horizontally in the magnetic matrix. The electrically conductive structure is configured as an inductive element. The magnetic inlay is configured so that, depending on the geometrical properties of the electrically conductive structure, a specific inductance value is provided for the magnetic inlay.

IPC Classes  ?

  • H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
  • H01F 17/00 - Fixed inductances of the signal type
  • H01F 27/28 - Coils; Windings; Conductive connections
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/46 - Manufacturing multi-layer circuits

43.

Magnetic Inlay With Electrically Conductive Vertical Through Connections for a Component Carrier

      
Application Number 17663560
Status Pending
Filing Date 2022-05-16
First Publication Date 2022-11-24
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Salkovic, Ivan
  • Nickkholgh, Amin

Abstract

A magnetic inlay includes a magnetic matrix and a plurality of electrically conductive vertical through connections extending vertically through the magnetic matrix. Further, a component carrier including the magnetic inlay and a method of manufacturing said magnetic inlay are described.

IPC Classes  ?

  • H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
  • H01F 27/28 - Coils; Windings; Conductive connections
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils

44.

Component Carrier With Inductive Element Included in Layer Build-up, and Manufacturing Method

      
Application Number 17663965
Status Pending
Filing Date 2022-05-18
First Publication Date 2022-11-24
Owner AT&S Austria Technologies & Systemtechnik Aktiengesellschaft (Austria)
Inventor Mayr, Günther

Abstract

A component carrier includes a stack with at least one electrically insulating layer structure, a structured electrically conductive layer assembled to the stack, where a part of the structured electrically conductive layer is configured as an inductive element, and a magnetic matrix embedded in the stack. The magnetic matrix at least partially surrounds the inductive element. Further, a manufacturing method is described.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
  • H01F 27/28 - Coils; Windings; Conductive connections
  • H01F 27/32 - Insulating of coils, windings, or parts thereof
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils
  • H01F 41/12 - Insulating of windings

45.

Component Carrier With a Magnetic Element and a Manufacturing Method

      
Application Number 17663418
Status Pending
Filing Date 2022-05-13
First Publication Date 2022-11-24
Owner AT &S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Salkovic, Ivan
  • López Blanco, Vanesa

Abstract

A component carrier includes a stack including at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a magnetic element assembled to the stack, and a dielectric layer structure on the stack. The magnetic element includes an embedded inductive element. The dielectric layer structure at least partially surrounds the magnetic element. Further, a manufacturing method and a use of photo-imaging are described.

IPC Classes  ?

  • H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
  • H01F 17/00 - Fixed inductances of the signal type
  • H05K 1/09 - Use of materials for the metallic pattern
  • H05K 3/12 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using printing techniques to apply the conductive material

46.

Component Carrier With Magnetic Element, Magnetic Inlay, and Manufacturing Method

      
Application Number 17663717
Status Pending
Filing Date 2022-05-17
First Publication Date 2022-11-24
Owner AT&S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT (Austria)
Inventor
  • Stahr, Johannes
  • Weidinger, Gerald
  • Alothman Alterkawi, Ahmad Bader

Abstract

A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure and a magnetic element assembled to the stack. The magnetic element includes a magnetic matrix and an inductive element. The inductive element is at least partially enclosed by the magnetic matrix, so that an electric current flow direction through the inductive element is essentially in a horizontal direction with respect to the stack. Further, a magnetic inlay and a manufacturing method are described.

IPC Classes  ?

  • H05K 5/00 - Casings, cabinets or drawers for electric apparatus

47.

Component Carrier With Embedded Component Connected by Galvanic Connection Stack

      
Application Number 17660741
Status Pending
Filing Date 2022-04-26
First Publication Date 2022-11-03
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Schrittwieser, Wolfgang

Abstract

A component carrier includes a layer body with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a component embedded in the layer body, and at least one galvanic connection stack at least partially on at least part of at least one main surface of the layer body. At least one of a bottom main surface and a top main surface of the embedded component is electrically connected to the at least one galvanic connection stack.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/09 - Use of materials for the metallic pattern

48.

Component Carrier

      
Application Number 17660168
Status Pending
Filing Date 2022-04-21
First Publication Date 2022-10-27
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Ifis, Abderrazzaq
  • Opitz, Reinhard

Abstract

A component carrier includes (a) a base structure having a surface with a surface profile; (b) a first dielectric layer formed on the surface of the base structure and (c) a second dielectric layer formed on the first dielectric layer. The first dielectric layer has a first main surface with a first surface profile. The first main surface faces away from the surface of the base structure. The first surface profile corresponds to the surface profile of the base structure. The second dielectric layer includes a second main surface with a second surface profile. The second main surface faces away from the surface of the base structure. The second surface profile differs from the surface profile of the base structure. A manufacturing method uses an auxiliary sheet for pressing the first dielectric layer on the main surface. The auxiliary sheet is removed before pressing the second dielectric layer.

IPC Classes  ?

49.

Embedding Methods for Fine-Pitch Components and Corresponding Component Carriers

      
Application Number 17657541
Status Pending
Filing Date 2022-03-31
First Publication Date 2022-10-06
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Mok, Jeesoo
  • Baftiri, Artan

Abstract

A method of manufacturing a component carrier includes: (i) embedding a poorly adhesive structure in a stack, wherein the stack comprises at least one electrically conductive layer structure and/or at least one electrically insulating layer structure; (ii) forming a cavity in the stack by removing a stack piece, wherein the stack piece is in part delimited by the poorly adhesive structure; and (iii) selectively exposing a bottom of the cavity by partially removing the poorly adhesive structure. A corresponding component carrier includes analogous features.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering

50.

Component Carrier With Gap Around Component Core and Filled With First Material in Bottom Portion and With Second Material in Top Portion

      
Application Number 17655480
Status Pending
Filing Date 2022-03-18
First Publication Date 2022-09-29
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Baftiri, Artan

Abstract

A component carrier includes a core with a dielectric body, a component embedded at least partially in the core, a first dielectric layer being arranged at a bottom side of the core and of the component, and a second dielectric layer being arranged at a top side of the core and of the component. A gap around the component in the core is filled adjacent to the bottom side with material of the first dielectric layer and is filled adjacent to the top side with material of the second dielectric layer.

IPC Classes  ?

  • H01L 21/673 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components using specially adapted carriers
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

51.

Component Carrier with Embedded High-Frequency Component and Integrated Waveguide for Wireless Communication

      
Application Number 17654658
Status Pending
Filing Date 2022-03-14
First Publication Date 2022-09-22
Owner AT &S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Goessler, Michael
  • Sattler, Sebastian

Abstract

A component carrier which includes a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a high-frequency component embedded in the stack. At least one waveguide is integrated in the stack. A transmission line and a coupling element configured transmit a signal between the high-frequency component and the at least one waveguide. A transmission and/or reception unit wirelessly transmits and/or receives one or more signals.

IPC Classes  ?

  • G01S 7/03 - RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES - Details of systems according to groups , , of systems according to group - Details of HF subsystems specially adapted therefor, e.g. common to transmitter and receiver
  • H05K 1/02 - Printed circuits - Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • G01S 7/02 - RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES - Details of systems according to groups , , of systems according to group

52.

Heat Removal Architecture for Stack-Type Component Carrier With Embedded Component

      
Application Number 17650405
Status Pending
Filing Date 2022-02-09
First Publication Date 2022-08-25
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Ifis, Abderrazzaq

Abstract

A component carrier including a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A component embedded in the stack, and a heat removal body configured for removing heat from the component is connected to the stack and preferably to the component. The heat removal body including a component-sided first heat removal structure thermally coupled with the component, and a second heat removal structure thermally coupled with the first heat removal structure and facing away from the component.

IPC Classes  ?

53.

Electronic device with connected component carrier and fluid cooling member

      
Application Number 17650309
Grant Number 11889622
Status In Force
Filing Date 2022-02-08
First Publication Date 2022-08-11
Grant Date 2024-01-30
Owner AT&S Austria Technologie & Systemtechnik AG (Austria)
Inventor Weis, Gerald

Abstract

An electronic device includes a component carrier having a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, an electronic component on and/or in the stack, and a cooling member with a fluid cooling unit at least partially therein. The component carrier and the cooling member are connected by a connection structure.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 3/36 - Assembling printed circuits with other printed circuits
  • H01R 12/52 - Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

54.

Component Carriers Connected by Staggered Interconnect Elements

      
Application Number 17650361
Status Pending
Filing Date 2022-02-08
First Publication Date 2022-08-11
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Ifis, Abderrazzaq
  • Riedler, Jens
  • Hermann, Christopher

Abstract

An electronic device includes a first component carrier having a first stack with at least one first electrically conductive layer structure and/or at least one first electrically insulating layer structure, a second component carrier having a second stack with at least one second electrically conductive layer structure and/or at least one second electrically insulating layer structure, and an intermediate structure including at least three staggered electrically conductive and coupled vertical interconnect elements in an at least partially dielectric sheet and being directly connected between the first component carrier and the second component carrier for electrically coupling the first component carrier with the second component carrier.

IPC Classes  ?

  • H05K 1/14 - Structural association of two or more printed circuits
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/03 - Use of materials for the substrate
  • H05K 3/46 - Manufacturing multi-layer circuits

55.

Component Carrier With Cavity Accommodating at Least Part of Driven Body Being Magnetically Drivable to Move

      
Application Number 17650388
Status Pending
Filing Date 2022-02-09
First Publication Date 2022-08-11
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Weis, Gerald
  • Weidinger, Gerald
  • Sattler, Sebastian
  • Fleischhacker, Patrick

Abstract

A drive device includes a component carrier with a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure and a cavity formed in the stack. A driven body is arranged at least partially in the cavity and configured for being drivable to move relative to the component carrier. At least one drive coil for creating a magnetic drive field and at least one drive magnet interacts with the magnetic drive field created by the at least one drive coil to generate a force for moving the driven body relative to the component carrier. One of the at least one drive magnet and the at least one drive coil forms part of the component carrier and the other one of the at least one drive magnet and the at least one drive coil forms part of the driven body.

IPC Classes  ?

  • H01F 7/02 - Permanent magnets
  • H01F 41/02 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets

56.

Opposing Planar Electrically Conductive Surfaces Connected for Establishing a Two-Dimensional Electric Connection Area Between Component Carrier Stacks

      
Application Number 17660258
Status Pending
Filing Date 2022-04-22
First Publication Date 2022-08-04
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Reitmaier, Bernhard
  • Sattler, Sebastian
  • Schlaffer, Erich

Abstract

A component carrier includes a first stack having at least one first electrically insulating layer structure and at least one first electrically conductive layer structure, and a second stack with at least one second electrically insulating layer structure and at least one second electrically conductive layer structure. The first stack and the second stack are connected with each other so that a vertical two-dimensional electrically conductive connection is established. The first stack has a first cavity and the second stack has a second cavity, the first cavity and the second cavity being separated by at least one further electrically insulating layer structure. At least one of the first cavity and the second cavity is delimited by a wall being at least partially lined with an electrically conductive coating.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 3/32 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

57.

Component carrier and method of manufacturing the same

      
Application Number 17247883
Grant Number 11412618
Status In Force
Filing Date 2020-12-29
First Publication Date 2022-06-30
Grant Date 2022-08-09
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Liebfahrt, Sabine
  • Lutschounig, Ferdinand
  • Reitmaier, Bernhard
  • Platzer, Julia
  • Frewein, Markus

Abstract

A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A cavity is formed in the stack. A component in the cavity has a stepped profile at at least one of its main surfaces. A resin clamping structure laterally engages the component and extends up to a step of the stepped profile. A method of manufacturing such a component carrier is also provided.

IPC Classes  ?

  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/46 - Manufacturing multi-layer circuits

58.

Component carrier and method of manufacturing the same

      
Application Number 17247884
Grant Number 11439018
Status In Force
Filing Date 2020-12-29
First Publication Date 2022-06-30
Grant Date 2022-09-06
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Liebfahrt, Sabine
  • Lutschounig, Ferdinand
  • Reitmaier, Bernhard
  • Platzer, Julia
  • Frewein, Markus

Abstract

A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A cavity is formed in the stack and has a non-polygonal outline. A component is in the cavity. A method of manufacturing such a component carrier is also provided.

IPC Classes  ?

  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/46 - Manufacturing multi-layer circuits

59.

Component Carrier Having at Least a Part Formed as a Three-Dimensionally Printed Structure Forming an Antenna

      
Application Number 17653628
Status Pending
Filing Date 2022-03-04
First Publication Date 2022-06-16
Owner AT&S AUSTRIA TECHNOLIGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT (Austria)
Inventor
  • Gavagnin, Marco
  • Leitgeb, Markus
  • Alothman Alterkawi, Ahmad Bader
  • Lutschounig, Ferdinand
  • Moitzi, Heinz
  • Krivec, Thomas
  • Grober, Gernot
  • Schlaffer, Erich
  • Morianz, Mike
  • Frauwallner, Rainer
  • Haidinger, Hubert
  • Schulz, Gernot
  • Gmunder, Gernot

Abstract

A component carrier and a method for manufacturing a component carrier are disclosed. The component carrier comprises a carrier body having a plurality of electrically conductive layer structures and/or electrically isolating layer structures and a three-dimensionally printed structure forming at least a part of an antenna on the carrier body.

IPC Classes  ?

  • H01Q 1/22 - Supports; Mounting means by structural association with other equipment or articles
  • H05K 1/02 - Printed circuits - Details
  • B33Y 80/00 - Products made by additive manufacturing
  • B33Y 10/00 - Processes of additive manufacturing
  • H01Q 9/04 - Resonant antennas

60.

Component Carrier With a Photoimageable Dielectric Layer and a Structured Conductive Layer Being Used as a Mask for Selectively Exposing the Photoimageable Dielectric Layer With Electromagnetic Radiation

      
Application Number 17652300
Status Pending
Filing Date 2022-02-24
First Publication Date 2022-06-09
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Gavagnin, Marco
  • Preiner, Erich
  • Park, Hyung

Abstract

A method for manufacturing a component carrier is disclosed. The method includes the steps of providing a layer stack having at least one component carrier material, forming a photoimageable dielectric layer structure on the layer stack, forming a spatial pattern of an electrically conductive layer structure on the photoimageable dielectric layer structure, wherein the spatial pattern defines openings formed within the electrically conductive layer structure, and exposing the photoimageable dielectric layer structure to electromagnetic radiation, where the spatial pattern of the electrically conductive layer structure represents a mask for selectively exposing predefined regions of the photoimageable dielectric layer structure. Furthermore, the method includes selectively removing material from the photoimageable dielectric layer depending on the spatial pattern.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • G03F 7/095 - Photosensitive materials - characterised by structural details, e.g. supports, auxiliary layers having more than one photosensitive layer
  • G03F 7/11 - Photosensitive materials - characterised by structural details, e.g. supports, auxiliary layers having cover layers or intermediate layers, e.g. subbing layers
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits

61.

Semi-Flex Component Carrier With Dielectric Material Having High Elongation and Low Young Modulus

      
Application Number 17649996
Status Pending
Filing Date 2022-02-04
First Publication Date 2022-05-19
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Tuominen, Mikael
  • Xin, Nick
  • Tay, Seok Kim

Abstract

A semi-flex component carrier includes a stack having at least one electrically insulating layer structure, at least one electrically conductive layer structure and a stress propagation inhibiting barrier. The stack defines at least one rigid portion and at least one semi-flexible portion. The stress propagation inhibiting barrier includes a plurality of stacked vias filled at least partially with electrically conductive material in an interface region between the at least one rigid portion and the at least one semi-flexible portion and configured to inhibit stress propagation between the at least one rigid portion and the at least one semi-flexible portion during bending.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/46 - Manufacturing multi-layer circuits

62.

Component carrier-based device with antenna coupling of electronic component and thermal coupling on opposing sides

      
Application Number 17453153
Grant Number 11799198
Status In Force
Filing Date 2021-11-01
First Publication Date 2022-05-05
Grant Date 2023-10-24
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Schober, Mario
  • Stahr, Johannes

Abstract

An electronic device includes a first component carrier with a first stack having at least one first electrically conductive layer structure forming an antenna structure and at least one first electrically insulating layer structure; at least one electronic component, and a second component carrier having at least one second electrically conductive layer structure and/or at least one second electrically insulating layer structure. The second component carrier further includes a heat removal structure. The first component carrier and the second component carrier are connected so that the antenna structure is positioned at one side of the electronic device for emitting and/or receiving electromagnetic radiation and the heat removal structure is positioned at an opposing other side of the electronic device.

IPC Classes  ?

  • H03M 1/38 - Analogue value compared with reference values sequentially only, e.g. successive approximation type
  • H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support
  • H01Q 1/02 - Arrangements for de-icing; Arrangements for drying-out
  • H01Q 1/22 - Supports; Mounting means by structural association with other equipment or articles
  • H01Q 1/42 - Housings not intimately mechanically associated with radiating elements, e.g. radome

63.

Component Carrier With Low-Solvent Fiber-Free Dielectric Layer

      
Application Number 17446741
Status Pending
Filing Date 2021-09-02
First Publication Date 2022-03-10
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Tay, Seok Kim
  • Tuominen, Mikael
  • Liu, Kim

Abstract

A method of manufacturing a component carrier is described. The method includes forming a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure, and reducing an amount of solvent in a fiber-free dielectric layer, which is directly connected to a metal layer, so that the dielectric layer with reduced amount of solvent remains at least partially uncured.

IPC Classes  ?

  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01L 23/498 - Leads on insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups

64.

Expansion Coefficient Determination with Deformation Measurement and Simulation

      
Application Number 17461595
Status Pending
Filing Date 2021-08-30
First Publication Date 2022-03-03
Owner AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AG (Austria)
Inventor
  • Frewein, Markus
  • Sagerer, Maike
  • Zuendel, Julia
  • Krivec, Thomas

Abstract

A method for determining an expansion coefficient of a test material comprises: receiving first image data of a compound material, wherein the compound material comprises a plate and a layer of the test material, which is attached to the plate; receiving second image data of the compound material, which has been exposed to an environmental condition, before the second image data has been recorded; determining a measured deformation of the compound material by comparing the first image data and the second image data; and performing a simulated deformation of a model of the compound material exposed to the environmental condition and determining the expansion coefficient of the test material by varying the expansion coefficient until the simulate deformation conforms to the measured deformation.

IPC Classes  ?

  • G06T 7/00 - Image analysis
  • G06T 7/593 - Depth or shape recovery from multiple images from stereo images
  • G06K 9/62 - Methods or arrangements for recognition using electronic means
  • G06T 7/60 - Analysis of geometric attributes
  • G06F 30/23 - Design optimisation, verification or simulation using finite element methods [FEM] or finite difference methods [FDM]
  • G01N 25/16 - Investigating or analysing materials by the use of thermal means by investigating thermal coefficient of expansion

65.

Component Carrier Structure Connectable by Electrically Conductive Connection Medium in Recess With Cavity Having Surface Profile

      
Application Number 16948106
Status Pending
Filing Date 2020-09-03
First Publication Date 2022-03-03
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Ifis, Abderrazzaq

Abstract

A component carrier with a first component carrier structure including a first stack which has at least one first electrically conductive layer structure and at least one first electrically insulating layer structure is disclosed. The at least one first electrically conductive layer structure has a first contact element which extends up to a first contact surface of the first stack. An electrically conductive connection medium is directly connected to the first contact element at the first contact surface by filling at least one recess of the first contact element. The at least one recess having a larger dimensioned cavity delimited by a smaller dimensioned surface profile.

IPC Classes  ?

  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/498 - Leads on insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups

66.

Embedding Component in Component Carrier by Component Fixation Structure

      
Application Number 17453029
Status Pending
Filing Date 2021-11-01
First Publication Date 2022-02-17
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Schwarz, Timo
  • Zluc, Andreas
  • Schober, Mario

Abstract

A method of manufacturing a component carrier, includes providing a base structure having a main surface that is at least partially covered by a component fixation structure; providing a component, the component intrinsically comprising warpage; mounting the component on a surface provided on a plate structure and/or on the base structure to remove the warpage of the component at least partially; and fixating the component to the component carrier through the component fixation structure.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 3/30 - Assembling printed circuits with electric components, e.g. with resistor
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

67.

AI-Based Determination of Action Plan for Manufacturing Component Carriers

      
Application Number 17443927
Status Pending
Filing Date 2021-07-28
First Publication Date 2022-02-10
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Lu, Tim
  • Wang, Peter

Abstract

A method of planning the manufacture of component carriers includes defining a set of final product parameters as a target for component carriers to be manufactured, ranking the process parameters concerning their impact on the final product parameters, selecting a subset of higher ranked process parameters, inputting the selected subset of process parameters for processing by an artificial intelligence module, and determining an action plan for the manufacturing based on an output of the artificial intelligence module, where the product parameters are influenceable by a set of process parameters settable during the manufacturing method.

IPC Classes  ?

  • G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control (DNC), flexible manufacturing systems (FMS), integrated manufacturing systems (IMS), computer integrated manufacturing (CIM)
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • G05B 13/02 - Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric

68.

Component with dielectric layer for embedding in component carrier

      
Application Number 17451012
Grant Number 11749613
Status In Force
Filing Date 2021-10-15
First Publication Date 2022-02-03
Grant Date 2023-09-05
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Weidinger, Gerald
  • Zluc, Andreas

Abstract

A method for manufacturing a component carrier includes forming a stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, providing a component having one or more pads and at least one dielectric layer on at least one main surface of the component such that the dielectric layer at least partially covers one or more pads of the component, placing the component on a temporary carrier, and embedding the component between the temporary carrier and the at least one insulating layer structure by pressing the component into the at least one insulating layer structure.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/373 - Cooling facilitated by selection of materials for the device
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings

69.

Component carrier with embedded component connected in cavity by anchored first and second polymers

      
Application Number 17304458
Grant Number 11683884
Status In Force
Filing Date 2021-06-21
First Publication Date 2021-12-23
Grant Date 2023-06-20
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Souli, Imane
  • Preiner, Erich
  • Schrei, Martin
  • López Blanco, Vanesa

Abstract

A component carrier having a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure and having a cavity delimited at least partially by a first polymer, and a component embedded in the cavity of the stack and being at least partially covered by a second polymer, wherein an anchoring interface is formed at an interface between the first polymer and the second polymer at which the first polymer and the second polymer are mechanically anchored with each other.

IPC Classes  ?

  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

70.

Component carrier and method of manufacturing the same

      
Application Number 17301756
Grant Number 11622443
Status In Force
Filing Date 2021-04-13
First Publication Date 2021-10-21
Grant Date 2023-04-04
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Baftiri, Artan

Abstract

A component carrier includes a stack having a first electrically insulating layer structure and a first electrically conductive layer structure arranged on the first electrically insulating layer structure. The first electrically insulating layer structure has at least one first covered portion, which is covered by the first electrically conductive layer structure, and at least one first non-covered portion, which is not covered by the first electrically conductive layer structure. The first electrically insulating layer structure defines a recess at the at least one first non-covered portion.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/14 - Structural association of two or more printed circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 3/02 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
  • H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
  • H05K 3/46 - Manufacturing multi-layer circuits

71.

Interposer-type component carrier and method of manufacturing the same

      
Application Number 17304724
Grant Number 11784132
Status In Force
Filing Date 2021-06-24
First Publication Date 2021-10-14
Grant Date 2023-10-10
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Leitgeb, Markus
  • Freydl, Gerhard

Abstract

An interposer-type component carrier includes a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure; a cavity formed in an upper portion of the stack; an active component embedded in the cavity and having at least one terminal facing upwards; and a redistribution structure having only one electrically insulating layer structure above the component. A method of manufacturing an interposer-type component carrier is also disclosed.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 21/52 - Mounting semiconductor bodies in containers
  • G02B 6/12 - Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind

72.

Component carrier with a dielectric element placed in a cavity and a manufacturing method

      
Application Number 17249750
Grant Number 11445612
Status In Force
Filing Date 2021-03-11
First Publication Date 2021-09-30
Grant Date 2022-09-13
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Lenhardt, Patrick
  • Sattler, Sebastian Wolfgang

Abstract

A component carrier including: i) a layer stack with at least one electrically insulating layer structure and at least one electrically conductive layer structure, ii) a cavity formed in the layer stack, iii) a dielectric element at least partially placed in the cavity, wherein the dielectric element and the layer stack are electromagnetically couple-able, and iv) an electrically insulating connection material between the dielectric element and the layer stack.

IPC Classes  ?

  • H05K 1/00 - Printed circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/02 - Printed circuits - Details
  • H05K 3/46 - Manufacturing multi-layer circuits

73.

Heat removal mechanism for stack-based electronic device with process control component and processing components

      
Application Number 17249493
Grant Number 11450587
Status In Force
Filing Date 2021-03-03
First Publication Date 2021-09-09
Grant Date 2022-09-20
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Gavagnin, Marco
  • Weis, Gerald
  • Leitgeb, Markus
  • Grober, Gernot
  • Jung, Young Hy

Abstract

An electronic device includes a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a plurality of processing components on and/or in the stack, a process control component coupled with at least part of the processing components for transmitting signals and configured for controlling processes executed by the processing components and/or by the process control component, and a heat removal structure on or above which at least one of the process control component and the processing components is arranged.

IPC Classes  ?

  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/373 - Cooling facilitated by selection of materials for the device
  • H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
  • H01L 23/498 - Leads on insulating substrates

74.

Component carrier with a stepped cavity and a stepped component assembly embedded within the stepped cavity

      
Application Number 17303264
Grant Number 11749573
Status In Force
Filing Date 2021-05-25
First Publication Date 2021-09-09
Grant Date 2023-09-05
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Stahr, Johannes
  • Weidinger, Gerald
  • Schmid, Gerhard
  • Zluc, Andreas

Abstract

Described are component carriers including a stepped cavity into which a stepped component assembly is embedded. The component carriers have (a) fully cured electrically insulating material originating from at least one electrically insulating layer structure of the component carrier and circumferentially surrounding the stepped component assembly and/or (b) an undercut in a transition region between a narrow recess and a wide recess of the stepped cavity. Further described are methods for manufacturing such component carriers.

IPC Classes  ?

  • H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
  • H01L 23/498 - Leads on insulating substrates
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

75.

Cooling profile integration for embedded power systems

      
Application Number 17249084
Grant Number 11523496
Status In Force
Filing Date 2021-02-19
First Publication Date 2021-08-26
Grant Date 2022-12-06
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Frauwallner, Rainer
  • Drofenik, Dietmar
  • Fleischhacker, Patrick

Abstract

A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A component is embedded in the stack. A first thermally conductive block is located above and thermally connected with the component, and a second thermally conductive block is located below and thermally coupled with the component. Heat generated by the component during operation is removed via at least one of the first thermally conductive block and the second thermally conductive block.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/02 - Printed circuits - Details
  • H05K 3/46 - Manufacturing multi-layer circuits

76.

Component carrier with embedded component exposed by blind hole

      
Application Number 17248502
Grant Number 11617259
Status In Force
Filing Date 2021-01-27
First Publication Date 2021-08-05
Grant Date 2023-03-28
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Tuominen, Mikael
  • Tay, Seok Kim

Abstract

The present invention relates to an embedded printed circuit board including: an insulation substrate including a cavity; a sensor device disposed on the cavity; an insulating layer disposed on the insulation substrate, having an opening part exposing the sensor device; and a pad part disposed on the lower surface of the opening part exposing the sensor device.

IPC Classes  ?

  • H05K 1/09 - Use of materials for the metallic pattern
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
  • H05K 3/30 - Assembling printed circuits with electric components, e.g. with resistor
  • H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 27/146 - Imager structures
  • H05K 1/02 - Printed circuits - Details
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits

77.

Substantially Annular Magnetic Member With Magnetic Particles in Non-Magnetic Matrix For Component Carrier

      
Application Number 17248582
Status Pending
Filing Date 2021-01-29
First Publication Date 2021-08-05
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Weidinger, Gerald
  • Weis, Gerald
  • Salkovic, Ivan

Abstract

A magnetic member having a substantially annular structure includes a non-magnetic matrix and magnetic particles embedded in the matrix. The magnetic member may be arranged on or in a component carrier.

IPC Classes  ?

  • H01F 1/37 - Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials characterised by their coercivity of soft-magnetic materials non-metallic substances, e.g. ferrites in the form of particles in a bonding agent
  • H01F 1/28 - Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials characterised by their coercivity of soft-magnetic materials metals or alloys in the form of particles, e.g. powder dispersed or suspended in a bonding agent
  • H01L 23/552 - Protection against radiation, e.g. light
  • H01F 27/28 - Coils; Windings; Conductive connections

78.

Component carrier with an etching neck connecting back drill hole with vertical through connection

      
Application Number 17248109
Grant Number 11399432
Status In Force
Filing Date 2021-01-08
First Publication Date 2021-07-15
Grant Date 2022-07-26
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Kastelic, Markus
  • Sebastian, Lackner

Abstract

A component carrier includes a stack with a plurality of electrically conductive layer structures and at least one electrically insulating layer structure. The electrically conductive layer structures include an electrically conductive vertical through-connection and a horizontally extending electrically conductive trace electrically coupled with an end portion of the vertical through-connection. A back-drill hole extends through at least part of the at least one electrically insulating layer structure towards the end portion of the vertical through-connection. An etching neck connects the back-drill hole with the end portion of the vertical through-connection.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/42 - Plated through-holes

79.

Component carrier and method of manufacturing a component carrier

      
Application Number 17247832
Grant Number 11445601
Status In Force
Filing Date 2020-12-24
First Publication Date 2021-07-01
Grant Date 2022-09-13
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Tuominen, Mikael
  • Tay, Seok Kim

Abstract

A component carrier includes a stack having at least one electrically conductive layer structure, a first electrically insulating layer structure and a second electrically insulating layer structure. The first electrically insulating layer structure is made of a material which has first physical properties. The second electrically insulating layer structure is made of another material which has second physical properties differing from the first physical properties. The first electrically insulating layer structure and the second electrically insulating layer structure are at least partially in direct physical contact with each other. A method of manufacturing a component carrier is also disclosed.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/498 - Leads on insulating substrates

80.

Component Carrier With Embedded Interposer Laterally Between Electrically Conductive Structures of Stack

      
Application Number 17247430
Status Pending
Filing Date 2020-12-10
First Publication Date 2021-06-24
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Lee, Minwoo

Abstract

A component carrier and a method of manufacturing a component carrier are disclosed. The component carrier includes a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, an interposer embedded in the stack and having a plurality of vertically extending electrically conductive through connections, and electrically conductive structures in the stack laterally on both sides of the interposer.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/36 - Assembling printed circuits with other printed circuits

81.

Component carrier and method of manufacturing the same

      
Application Number 16949407
Grant Number 11551989
Status In Force
Filing Date 2020-10-28
First Publication Date 2021-06-24
Grant Date 2023-01-10
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Moitzi, Heinz

Abstract

A component carrier includes a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure; a barrier structure; and a component. The component has at least one pad embedded in the stack and/or in the barrier structure. At least a portion of one of the electrically conductive layer structure and the at least one pad includes copper in contact with the barrier structure.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
  • H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
  • H05K 1/03 - Use of materials for the substrate

82.

Compact laminated component carrier with front end chip and impedance matching circuitry for antenna communication

      
Application Number 17247394
Grant Number 11394105
Status In Force
Filing Date 2020-12-09
First Publication Date 2021-06-24
Grant Date 2022-07-19
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Weis, Gerald

Abstract

A component carrier has a laminated stack including at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a front-end chip on and/or in the stack and extending at least up to a main surface of the stack, an antenna interface on an opposing other main surface of the stack, and an impedance matching circuitry in the stack and arranged vertically between the front-end chip and the antenna interface.

IPC Classes  ?

  • H01Q 1/24 - Supports; Mounting means by structural association with other equipment or articles with receiving set
  • H01Q 1/22 - Supports; Mounting means by structural association with other equipment or articles
  • H01Q 5/335 - Individual or coupled radiating elements, each element being fed in an unspecified way using frequency dependent circuits or components, e.g. trap circuits or capacitors at the feed, e.g. for impedance matching
  • H01Q 23/00 - Antennas with active circuits or circuit elements integrated within them or attached to them
  • H04B 1/04 - Circuits

83.

Overhang-compensating annular plating layer in through hole of component carrier

      
Application Number 17249339
Grant Number 11510316
Status In Force
Filing Date 2021-02-26
First Publication Date 2021-06-17
Grant Date 2022-11-22
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Ifis, Abderrazzaq

Abstract

A component carrier with an electrically insulating layer having a front side and a back side, a first and a second electrically conductive layer covering the front side and the back side of the electrically insulating layer, respectively. A through hole extends through both electrically conductive layers and the electrically insulating layer. An overhang is formed along one of the electrically conductive layers and sidewalls of the electrically insulating layer structure delimiting the through hole. An annular plating layer covers the sidewalls and fills part of the overhang such that a horizontal extension of the overhang after plating is less than 20 μm and/or such that a ratio between a horizontal extension of the overhang after plating and a width of a first window through the first electrically conductive layer and/or a width of a second window through the second electrically conductive layer is smaller than 20%.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/42 - Plated through-holes
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits

84.

Compensating misalignment of component carrier feature by modifying target design concerning correlated component carrier feature

      
Application Number 17247151
Grant Number 11778751
Status In Force
Filing Date 2020-12-01
First Publication Date 2021-06-10
Grant Date 2023-10-03
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Ifis, Abderrazzaq
  • Leitgeb, Markus

Abstract

A method of compensating misalignment during manufacturing laminate-type component carriers is disclosed. The method includes detecting an image of a region of interest of a component carrier structure during manufacturing the component carriers based on the component carrier structure, identifying a structural feature in the image of the region of interest showing misalignment with respect to a target design, and at least partially compensating the identified misalignment of the structural feature by modifying the target design of at least one correlated structural feature to be manufactured subsequently, wherein the at least one correlated structural feature is correlated to said structural feature showing misalignment.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • H05K 3/30 - Assembling printed circuits with electric components, e.g. with resistor
  • G06T 7/00 - Image analysis
  • H05K 3/46 - Manufacturing multi-layer circuits

85.

Component carrier with electrically reliable bridge with sufficiently thick vertical thickness in through hole of thin dielectric

      
Application Number 17248671
Grant Number 11483927
Status In Force
Filing Date 2021-02-02
First Publication Date 2021-05-27
Grant Date 2022-10-25
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Ismail, Ismadi Bin
  • Chung, Valerian Yun Khim
  • Dou, Alex Yucun
  • Tay, Seok Kim

Abstract

A component carrier includes an electrically insulating layer structure having a first main surface and a second main surface with a through hole extending through the electrically insulating layer structure between the first main surface and the second main surface. An electrically conductive bridge structure connects opposing sidewalls of the electrically insulating layer structure delimiting the through hole. A vertical thickness of the electrically insulating layer structure is not more than 200 μm and a narrowest vertical thickness of the bridge structure is at least 20 μm.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/09 - Use of materials for the metallic pattern
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 3/42 - Plated through-holes

86.

Component carrier with exposed layer

      
Application Number 16949211
Grant Number 11277907
Status In Force
Filing Date 2020-10-20
First Publication Date 2021-05-13
Grant Date 2022-03-15
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Leitgeb, Markus
  • Reitmaier, Bernhard

Abstract

A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, and a partially exposed layer in a central region of the stack being exposed with regard to an upper side and a lower side by a respective blind hole formed in the stack, wherein each of opposing main surfaces of the exposed layer is partially covered by a respective adhesive layer.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/46 - Manufacturing multi-layer circuits

87.

Component carrier and method of manufacturing the same

      
Application Number 16948937
Grant Number 11324122
Status In Force
Filing Date 2020-10-06
First Publication Date 2021-04-15
Grant Date 2022-05-03
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Moitzi, Heinz
  • Stahr, Johannes
  • Morianz, Mike

Abstract

A component carrier includes a stack having at least one electrically insulating layer structure and/or at least one electrically conductive layer structure; a heat removing and electrically conductive base structure; a component which is connected to the base structure so as to at least partially protrude from the base structure and so as to be laterally at least partially covered by an electrically insulating material of the stack; and an electrically conductive top structure on or above a top main surface of the component. A method of manufacturing such a component carrier is disclosed.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/05 - Insulated metal substrate
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/44 - Manufacturing insulated metal core circuits

88.

Method and apparatus for performing immersion tin process or copper plating process in the production of a component carrier

      
Application Number 16948969
Grant Number 11408076
Status In Force
Filing Date 2020-10-08
First Publication Date 2021-04-15
Grant Date 2022-08-09
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Trischler, Heinrich

Abstract

A method of performing an immersion tin process in the production of a component carrier is provided which includes immersing at least a part of a copper surface of the component carrier in a composition containing Sn(II) in an immersion tin unit, while passing a non-oxidizing gas through the immersion tin unit, wherein at least part of the non-oxidizing gas is recycled. In addition, an apparatus for performing an immersion tin process in the production of a component carrier, a method of performing a copper plating process in the production of a component carrier and an apparatus for performing a copper plating process in the production of a component carrier are provided.

IPC Classes  ?

  • C23C 18/16 - Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, i.e. electroless plating
  • C23C 18/31 - Coating with metals
  • C25D 3/38 - Electroplating; Baths therefor from solutions of copper
  • H05K 3/22 - Secondary treatment of printed circuits

89.

Component carrier with through hole extending through multiple dielectric layers

      
Application Number 17028618
Grant Number 11160165
Status In Force
Filing Date 2020-09-22
First Publication Date 2021-04-01
Grant Date 2021-10-26
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Tuominen, Mikael
  • Tay, Seok Kim
  • Sun, Sally
  • Zhang, Robin

Abstract

A component carrier and a method of manufacturing a component carrier are provided. The component carrier includes a stack having a front side and a back side, the stack including a plurality of stacked electrically insulating layer structures, a through hole being narrower in its inner portion compared to its exterior portions and extending through the plurality of electrically insulating layer structures so that sidewalls of each of the electrically insulating layer structures delimit respective parts of the through hole, and an electrically conductive filling medium filling at least a part of the through hole.

IPC Classes  ?

  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits

90.

Electronic module with single or multiple components partially surrounded by a thermal decoupling gap

      
Application Number 16569429
Grant Number 11452199
Status In Force
Filing Date 2019-09-12
First Publication Date 2021-03-18
Grant Date 2022-09-20
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Schrems, Martin
  • Leitgeb, Markus
  • Anderson, Steve

Abstract

An electronic device including a first component carrier, a second component carrier connected with the first component carrier so that a thermal decoupling gap is formed between the first component carrier and the second component carrier, a first component on and/or in the second component carrier, and a second component having a first main surface mounted in the thermal decoupling gap so that at least part of an opposing second main surface and an entire sidewall of the second component is exposed with respect to material of the first component carrier and with respect to material of the second component carrier.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/14 - Structural association of two or more printed circuits
  • H05K 3/46 - Manufacturing multi-layer circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering

91.

Electronic device having first and second component carrier parts with cut-outs therein and adhesively joined to form a cavity that supports an electronic component therein

      
Application Number 16977115
Grant Number 11527807
Status In Force
Filing Date 2018-03-07
First Publication Date 2021-02-25
Grant Date 2022-12-13
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Gentili, Fabrizio
  • Sattler, Sebastian
  • Bösch, Wolfgang
  • Schlaffer, Erich
  • Kastelic, Markus
  • Reitmaier, Bernhard

Abstract

An electronic device and a method for manufacturing such an electronic device are described. The electronic device includes an electronic component, and a component carrier in which the electronic component is embedded. The component carrier includes a first component carrier part having a first cut-out portion and a second component carrier part having a second cut-out portion, the first cut-out portion and the second cut-out portion facing opposite main surfaces of the electronic component. An electrically conductive material is provided on the surface of the first cut-out portion and on the surface of the second cut-out portion. The first cut-out portion and the second cut-out portion respectively form a first cavity and a second cavity on opposite sides of the electronic component.

IPC Classes  ?

  • H01P 3/08 - Microstrips; Strip lines
  • H05K 1/02 - Printed circuits - Details
  • H05K 3/38 - Improvement of the adhesion between the insulating substrate and the metal
  • H05K 3/46 - Manufacturing multi-layer circuits
  • H01P 11/00 - Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type

92.

Inductor Made of Component Carrier Material Comprising Electrically Conductive Plate Structures

      
Application Number 16949573
Status Pending
Filing Date 2020-11-04
First Publication Date 2021-02-18
Owner AT&S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT (Austria)
Inventor
  • Stahr, Johannes
  • Weidinger, Gerald
  • Moitzi, Heinz

Abstract

An inductor component includes a plurality of stacked layer structures made of component carrier material with electrically conductive plate structures, and a plurality of electrically conductive interconnect structures connecting the electrically conductive plate structures to thereby form an inductance with multiple windings.

IPC Classes  ?

  • H01F 27/28 - Coils; Windings; Conductive connections
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils
  • H01F 17/00 - Fixed inductances of the signal type
  • H01F 27/24 - Magnetic cores

93.

Semi-flex component carrier with dielectric material having high elongation and low young modulus

      
Application Number 16947417
Grant Number 11284508
Status In Force
Filing Date 2020-07-31
First Publication Date 2021-02-11
Grant Date 2022-03-22
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Tuominen, Mikael
  • Xin, Nick
  • Tay, Seok Kim

Abstract

A semi-flex component carrier includes a stack having at least one electrically insulating layer structure and/or at least one electrically conductive layer structure. The stack defines at least one rigid portion and at least one semi-flexible portion. The at least one electrically insulating layer structure forms at least part of the semi-flexible portion and includes a material having an elongation of larger than 3% and a Young modulus of less than 5 GPa.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/46 - Manufacturing multi-layer circuits

94.

Component Carrier, Method of Manufacturing the Same and Method of Shielding a Structural Feature in a Component Carrier

      
Application Number 16535419
Status Pending
Filing Date 2019-08-08
First Publication Date 2021-02-11
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Mayr, Günther

Abstract

A component carrier, a method of manufacturing the same and a method of shielding a structural feature in a component carrier are disclosed. The component carrier includes a laminated stack with a plurality of electrically conductive layer structures and a plurality of electrically insulating layer structures; an electrically insulating cap structure selectively covering a structural feature at an exterior surface of the laminated stack; and a shielding structure on the cap structure for shielding the structural feature.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process

95.

Protection layer for panel handling systems

      
Application Number 16534459
Grant Number 11682600
Status In Force
Filing Date 2019-08-07
First Publication Date 2021-02-11
Grant Date 2023-06-20
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Leitgeb, Markus
  • Gavagnin, Marco
  • Habenbacher, Heinz

Abstract

An arrangement includes a panel configured as a pre-form for manufacturing a plurality of component carriers; a protection layer covering a surface portion of a main surface of the panel, wherein the protection layer is detachable from the surface portion without leaving residues on the panel. A handling tool for handling the panel includes a surface onto which the panel is arrangeable. The panel includes a handling surface, with which the panel is arrangeable onto the handling tool, wherein the handling surface comprises at least part of the surface portion covered by the protection layer.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/32 - Holders for supporting the complete device in operation, i.e. detachable fixtures
  • H01L 23/498 - Leads on insulating substrates

96.

Component carrier and method of manufacturing the same

      
Application Number 16535474
Grant Number 11350520
Status In Force
Filing Date 2019-08-08
First Publication Date 2021-02-11
Grant Date 2022-05-31
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Mayr, Günther

Abstract

A component carrier and a method of manufacturing the same are disclosed. The component carrier includes a stack having a plurality of electrically conductive layer structures and a plurality of electrically insulating layer structures and a coax structure with an electrically conductive substantially horizontally extending central trace and an electrically conductive surrounding structure at least partially surrounding the central trace with electrically insulating material in between. The coax structure is formed by material of the layer structures of the stack.

IPC Classes  ?

  • H05K 1/02 - Printed circuits - Details
  • H05K 1/09 - Use of materials for the metallic pattern
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/42 - Plated through-holes
  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
  • H05K 3/46 - Manufacturing multi-layer circuits

97.

Component carrier with opposed stacks having respective connection bodies and a method for manufacturing the component carrier

      
Application Number 16946053
Grant Number 11322482
Status In Force
Filing Date 2020-06-04
First Publication Date 2021-01-14
Grant Date 2022-05-03
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Reitmaier, Bernhard
  • Sattler, Sebastian
  • Schlaffer, Erich

Abstract

A component carrier with a first stack and a second stack. The first stack includes at least one first electrically insulating layer structure and at least one first electrically conductive layer structure having a first connection body with a first exposed planar electrically conductive surface. The second stack includes at least one second electrically insulating layer structure and at least one second electrically conductive layer structure having a second connection body with a second exposed planar electrically conductive surface. The first stack and the second stack are connected with each other so that the first exposed planar electrically conductive surface and the second exposed planar electrically conductive surface are connected to establish a vertical two-dimensional electrically conductive connection.

IPC Classes  ?

  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 21/50 - Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/64 - Impedance arrangements

98.

Anisotropic etching using photopolymerizable compound

      
Application Number 15929753
Grant Number 11266022
Status In Force
Filing Date 2020-05-20
First Publication Date 2020-12-03
Grant Date 2022-03-01
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor Klocek, Jolanta

Abstract

A method of etching an electrically conductive layer structure during manufacturing a component carrier is provided. The method includes carrying out a first etching of at least one exposed region of an electrically conductive layer structure by a first etching composition having a photo-hardenable compound to thereby form a recess in the electrically conductive layer structure, hardening the photo-hardenable compound by irradiation with photons selectively on an upper side wall portion of the recess to thereby cover the upper side wall portion with a photo-hardened compound, carrying out a second etching by a second etching composition selectively on a side wall portion and/or bottom portion of the recess being not covered with the photo-hardened compound, and subsequently removing the photo-hardened compound from the side wall portion. In addition, a component carrier is provided.

IPC Classes  ?

  • H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
  • C23F 1/16 - Acidic compositions
  • H05K 1/09 - Use of materials for the metallic pattern
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/26 - Cleaning or polishing of the conductive pattern

99.

Hermetic optical component package having organic portion and inorganic portion

      
Application Number 15929340
Grant Number 11682661
Status In Force
Filing Date 2020-04-27
First Publication Date 2020-11-19
Grant Date 2023-06-20
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Zluc, Andreas
  • Stahr, Johannes

Abstract

A hermetic package includes a base body, wherein dielectric material of a bottom of the base body is made of an organic material, an optical component mounted on the base body, and inorganic material hermetically enclosing the optical component along all surrounding sides.

IPC Classes  ?

  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
  • H01L 31/0203 - Containers; Encapsulations
  • H01L 31/0232 - Optical elements or arrangements associated with the device
  • H01L 31/18 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
  • H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
  • H01L 33/58 - Optical field-shaping elements
  • H01L 33/60 - Reflective elements
  • H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

100.

Component Carrier With Surface-Contactable Component Embedded in Laminated Stack

      
Application Number 15929600
Status Pending
Filing Date 2020-05-12
First Publication Date 2020-11-19
Owner AT&S Austria Technologie & Systemtechnik Aktiengesellschaft (Austria)
Inventor
  • Moitzi, Heinz
  • Stahr, Johannes
  • Zluc, Andreas

Abstract

A component carrier which includes a laminated stack having at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, and a component having at least one electrically conductive connection structure and embedded in the stack, wherein the at least one electrically conductive connection structure of the component is exposed with respect to the stack so that a free exposed end of the at least one electrically conductive connection structure of the component is flush with or extends beyond an exterior main surface of the stack.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/58 - Structural electrical arrangements for semiconductor devices not otherwise provided for
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