Abstract

The present invention relates to a processing apparatus (100) for processing component carrier structures (210). The processing apparatus (100) comprises a handler (110) configured for loading a component carrier structure (210), for supplying the component carrier structure (210) to a processing chamber (101), and for unloading the component carrier structure (210) after processing in the processing chamber (101); and the processing chamber (101) configured for processing the component carrier structure (210) and having an integrated dryer device (102) for drying the component carrier structure (210) before the handler (110) removes the component carrier structure (210) from the processing chamber (101).

IPC Classes  ?

• H05K 3/00 - Apparatus or processes for manufacturing printed circuits
• H05K 3/22 - Secondary treatment of printed circuits

Abstract

A method for a reliability assessment of an electronic component carrier or a package comprising an electronic component carrier (1). The method comprises: providing a global simulation model of the component carrier or package (1), wherein a predetermined number of geometric properties of the component carrier or package (1) and of its constituent parts made of different materials and of physical properties of materials used in said constituent parts are defined as independent variables in a parameter space of the global simulation model; and wherein the global simulation model is configured to receive input data including a point in the parameter space and is configured to output data indicative of resulting geometric and/or physical properties within a global volume of the resulting component carrier or package (1). The method comprises running a simulation of the global simulation model and identifying, in its output data, boundary conditions for a plurality of local sub-portions (2) of the component carrier or package (1). The method further comprises providing at least one data-based local model for said local sub- portions (2), each data-based local model being trained to receive said boundary conditions as input data and provide a criticality value indicative of a reliability of the respective local sub-portion (2) as output data; running the at least one local data-based model for each of said local sub-portions (2) and identifying, in the respective output data, those local sub-portions (2) whose criticality value is above at least one predetermined threshold.

IPC Classes  ?

• G06F 30/17 - Mechanical parametric or variational design
• G06F 30/23 - Design optimisation, verification or simulation using finite element methods [FEM] or finite difference methods [FDM]
• G06F 30/27 - Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
• G06F 119/02 - Reliability analysis or reliability optimisation; Failure analysis, e.g. worst case scenario performance, failure mode and effects analysis [FMEA]
• G06F 113/18 - Chip packaging
• G06F 115/12 - Printed circuit boards [PCB] or multi-chip modules [MCM]

Abstract

There is described a component carrier (100), wherein the component carrier (100) comprises: i) a stack (101) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (102), ii) an electronic component (110) embedded in the stack (101); and iii) a thermal structure (120), configured to dissipate thermal energy produced by the electronic component (110) towards and beyond a main surface (105) of the stack (101), wherein the thermal structure (120) comprises: iiia) a base structure (121) mounted on and/or at least partially embedded in the stack (101), in particular flush with one of the layer structures (102, 104) of the stack (101), and iiib) a plurality of protrusions (125), protruding from the base structure (121), and extending beyond the main surface (105) of the stack (101).

IPC Classes  ?

• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/433 - Auxiliary members characterised by their shape, e.g. pistons
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/00 - Apparatus or processes for manufacturing printed circuits
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
• H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
• H01L 23/498 - Leads on insulating substrates
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

Abstract

An electronic device (100) which comprises a three-dimensionally non-planar mold body (102) defining at least part of one of a non-planar side surface (104) and an opposed non-planar side surface (106) of the electronic device (100), an electrically conductive structure (114) provided on one of said non-planar side surface (104) and said opposing non-planar side surface (106), and at least one electric entity (108) at least partially inside of the three-dimensionally non-planar mold body (102).

IPC Classes  ?

• H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
• H05K 5/06 - Hermetically-sealed casings
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings

Abstract

The present invention relates to a packing apparatus (100), a method of automatically packing component carriers (201) in a packing apparatus (100), a component carrier pack and a system. The packing apparatus (100) comprises a gating arrangement (110) configured for allowing only component carriers (201) to proceed with packing which meet at least one predefined gating criterion; a tracing arrangement (120) configured for tracing the component carriers (201) during processing by the packing apparatus (100); and a packing unit (130) for packing the traced component carriers (201), which meet the at least one predefined gating criterion, to a component carrier pack (102).

IPC Classes  ?

• G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control (DNC), flexible manufacturing systems (FMS), integrated manufacturing systems (IMS), computer integrated manufacturing (CIM)

Abstract

There is described an integrated circuit, IC, substrate (100), comprising: i) a reinforced fiber-free dielectric material (110); ii) a bridge element (120) comprising: iia) at least two electrically conductive terminals (121a, 121b), iib) an electrical interconnection (125) that electrically interconnects the at least two electrically conductive terminals (121a, 121b), and iic) a dielectric protection material (122) that encapsulates the electrical interconnection (125), wherein the bridge element (120) is embedded in the reinforced fiber-free dielectric material (110), so that at least two components (140a, 140b), when surface mounted to a first main surface (101) of the IC substrate (100), are electrically connected to the at least two electrically conductive terminals (121a, 121b), respectively; and iii) a redistribution layer, RDL, structure (130), arranged at a second main surface (102) of the IC substrate (100) being opposite to the first main surface (101), and electrically connectable by further electrical interconnections (105) to the at least two components (140a, 140b).

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H05K 3/46 - Manufacturing multi-layer circuits

Abstract

There is described a method of processing a metal-containing fluid (101), the method comprising: i) providing the metal-containing fluid (101) that comprises at least one metal in a first oxidation state; ii) performing a membrane electrolysis (110), thereby oxidizing the metal from the first oxidation state to a second oxidation state to obtain an oxidized metal-containing fluid (102); and thereafter iii) streaming the oxidized metal-containing fluid (102) through an ion exchange device (120), thereby separating the metal in the second oxidation state from the oxidized metal-containing fluid (102) to obtain a processed metal-containing fluid (105).

IPC Classes  ?

• C02F 1/42 - Treatment of water, waste water, or sewage by ion-exchange
• C02F 1/467 - Treatment of water, waste water, or sewage by electrochemical methods by electrolysis by electrochemical disinfection
• C22B 3/42 - Treatment or purification of solutions, e.g. obtained by leaching by ion-exchange extraction
• C25C 1/06 - Electrolytic production, recovery or refining of metals by electrolysis of solutions of iron group metals, refractory metals or manganese
• C02F 101/20 - Heavy metals or heavy metal compounds
• C02F 101/22 - Chromium or chromium compounds, e.g. chromates
• C02F 103/16 - Nature of the water, waste water, sewage or sludge to be treated from metallurgical processes, i.e. from the production, refining or treatment of metals, e.g. galvanic wastes

Abstract

The invention relates to a method for estimating a conversion degree value (α) of a polymeric material, wherein the method comprises the steps of: heating the polymeric material with a predetermined heating rate (β); acquisition of at least one first measured value from the polymeric material at a current temperature (T), the first measured value relating to a specific kind of the conversion degree; determination of a fixed value (QI) associated with the reciprocal temperature (1/T) and the heating rate (β), the fixed value (QI) being independent from the conversion degree value (α) of said polymeric material; and estimation of the conversion degree value (α) of the polymeric material based on the first measured value and the fixed value (QI).

IPC Classes  ?

• G01N 25/48 - Investigating or analysing materials by the use of thermal means by investigating the development of heat, i.e. calorimetry, e.g. by measuring specific heat, by measuring thermal conductivity on solution, sorption, or a chemical reaction not involving combustion or catalytic oxidation
• G01N 33/44 - Resins; Plastics; Rubber; Leather

Abstract

The invention relates to a method for estimating a viscosity curve of a polymeric material, the method comprising: acquiring viscosity values of the polymeric material at different temperatures (T) under different heating rates (0); determining at least one viscosity curve of the polymeric material depending on the measured viscosities for each heating rate (0); splitting the viscosity curves into at least one determined melting curve and at least one determined curing curve per determined viscosity curve; determining at least one fitted melting curve per determined melting curve; determining at least one fitted curing curve per determined curing curve; and estimating the viscosity curve of the polymeric material by combining the fitted melting curve and the fitted curing curve.

IPC Classes  ?

• G01N 11/00 - Investigating flow properties of materials, e.g. viscosity or plasticity; Analysing materials by determining flow properties
• G01N 33/44 - Resins; Plastics; Rubber; Leather

Abstract

The invention relates to a method for estimating a conversion degree value (α) of a polymeric material, wherein the method comprises the steps of: heating the polymeric material with a predetermined heating rate (β); acquisition of at least one first measured value from the polymeric material at a current temperature (T), the first measured value relating to a specific kind of the conversion degree; determination of a fixed value (QI) associated with the reciprocal temperature (1/T) and the heating rate (β), the fixed value (QI) being independent from the conversion degree value (α) of said polymeric material; and estimation of the conversion degree value (α) of the polymeric material based on the first measured value and the fixed value (QI).

IPC Classes  ?

• G01N 25/48 - Investigating or analysing materials by the use of thermal means by investigating the development of heat, i.e. calorimetry, e.g. by measuring specific heat, by measuring thermal conductivity on solution, sorption, or a chemical reaction not involving combustion or catalytic oxidation
• G01N 33/44 - Resins; Plastics; Rubber; Leather

Abstract

The invention relates to a method to define a production and/or application and/or use of a polymeric material, comprising the steps of: estimation of a convention degree value (α) of the polymeric material based on at least one first measured value from the polymeric material relating to the kind of conversion degree and based on a fixed value (QI) associated with a respective reciprocal temperature (1/T) and a heating rate (β) of the specific polymeric material, the fixed value (QI) being independent from the conversion degree value (α) of the polymeric material, and definition of the production and/or the application and/or the use of the polymeric material use based on the estimated conversion degree value (α).

IPC Classes  ?

• G16C 60/00 - Computational materials science, i.e. ICT specially adapted for investigating the physical or chemical properties of materials or phenomena associated with their design, synthesis, processing, characterisation or utilisation

Abstract

There is described a method of manufacturing component carriers in a component carrier manufacture plant (100), the method comprising: i) providing a process fluid (101) to a component carrier manufacture process (HO); ii) manufacturing the component carriers (110), thereby producing a heavy metal waste fluid (102); and iii) processing the heavy metal waste fluid (102) by at least one treatment step to a) obtain a processed fluid (101, 105) with drinking water quality and/or b) stream the processed fluid (105) as the process fluid (101) back to the component carrier manufacture process (100), thereby providing a closed process water cycle.

IPC Classes  ?

• C02F 9/00 - Multistage treatment of water, waste water or sewage
• C02F 1/28 - Treatment of water, waste water, or sewage by sorption
• C02F 1/42 - Treatment of water, waste water, or sewage by ion-exchange
• C02F 1/68 - Treatment of water, waste water, or sewage by addition of specified substances, e.g. trace elements, for ameliorating potable water
• C02F 101/20 - Heavy metals or heavy metal compounds
• C02F 103/16 - Nature of the water, waste water, sewage or sludge to be treated from metallurgical processes, i.e. from the production, refining or treatment of metals, e.g. galvanic wastes
• C02F 103/34 - Nature of the water, waste water, sewage or sludge to be treated from the chemical industry not provided for in groups

Abstract

A carrier assembly (100) is provided, which comprises (i) a component carrier (101); (ii) a component (110) in or on the component carrier (101); (iii) a signal conductive element (120) provided on a component surface (111) of said component (110); and (iv) a shielding conductive structure 130, which is at least partially embedded in the component carrier (101) and which at least partially surrounds said signal conductive element (120).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

There is described a component carrier (100), comprising: i) a stack (101) comprising at least one electrically insulating layer structure (102) and/or at least one electrically conductive layer structure (104); ii) a cavity (120), at least partially provided in the stack (101) and delimited by a plurality of sidewalls (121), iii) a metallic shielding structure (125) in the cavity (120), wherein the metallic shielding structure (125) at least partially covers the plurality of sidewalls (121); and iv) a dielectric element (150) arranged in the cavity (120), wherein the dielectric element (150) comprises a material having a dielectric constant, Dk, of two or more.

IPC Classes  ?

• H01P 3/06 - Coaxial lines
• H01P 3/12 - Hollow waveguides
• H01P 3/16 - Dielectric waveguides, i.e. without a longitudinal conductor

Abstract

A component carrier (100) which comprises a stack (102) comprising at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106), wherein the at least one electrically insulating layer structure (106) comprises at least one design layer structure (108, 110) having a stamped surface profile, and a component (112) being embedded in the stack (102) and being at least partially covered by the at least one design layer structure (108, 110).

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/46 - Manufacturing multi-layer circuits

Abstract

A package (100), wherein the package (100) comprises a component carrier (102) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (106), and an optical chip (108) and an electric chip (110) being functionally coupled with each other and being embedded side-by-side in the component carrier (102) so that a signal path (112) between the optical chip (108) and the electric chip (110) is within a horizontal plane.

IPC Classes  ?

• G02B 6/42 - Coupling light guides with opto-electronic elements
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/16 - Fillings or auxiliary members in containers, e.g. centering rings
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits

Abstract

The invention provides a package (100) with a component carrier, an interposer and a component and a method of manufacturing the same, the package (100) which comprises a component carrier (102), an interposer (104) arranged on the component carrier (102) and having a laminated interposer stack comprising electrically conductive vertical through connections (108) and electrically conductive horizontal structures (110) in a dielectric matrix (112), and at least one component (114) arranged on the interposer (104), wherein at least one of the component carrier (102) and the at least one component (114) is directly connected to exposed horizontal structures (110) of the interposer (104).

IPC Classes  ?

• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates

Abstract

The disclosure relates to a device and a computer implemented method for identifying a contaminant in a printed circuit board (PCB) production line using an elemental analysis technique, preferably energy-dispersive X-ray spectroscopy (EDX) by comparing the elemental composition and carbon-oxygen ratio of the contaminant to the elemental composition and carbon-oxygen ratios of reference samples. In the comparison, the elemental composition is expressed as a first and a second value and the ratio of carbon-oxygen ratios as a third value. The method also comprises calculating a similarity score between the contaminant and each of the reference samples based on the first, second and third values. The aim is to trace the source of contamination in the production line and to take corrective action.

IPC Classes  ?

• G16C 20/20 - Identification of molecular entities, parts thereof or of chemical compositions

Abstract

The present application provides a package (100) and its manufacturing method. The package (100) comprises a core (102) having at least one through hole (104) delimited by a wall surface which is at least partially covered with at least one electrically conductive plating material (106), a first layer stack (108) on one main surface of the core (102), and a second layer stack (110) on an opposing other main surface of the core (102), wherein the first layer stack (108) has electrically conductive elements (112) with a higher integration density than further electrically conductive elements (114) with a lower integration density of the second layer stack (110), and wherein the further electrically conductive elements (114) comprise at least one cylindrical vertical electrically conductive connection element (116) for contributing to the formation of an electrically conductive connection interface (118) at a main surface of the second layer stack (110) facing away from the core (102).

IPC Classes  ?

• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
• H01L 23/498 - Leads on insulating substrates
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

It is described a component carrier (100), wherein the component carrier (100) comprises: i) a stack (101) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (102); ii) a first electronic switch component (110) and a second electronic switch component (120) embedded side-by-side in the stack (101); and iii) a capacitor device (130), electrically connected in parallel to the first electronic switch component (110) and the second electronic switch component (120); wherein the capacitor device (130) is assembled, in particular surface-mounted, to the stack (101), so that the first electronic switch component (110) and the second electronic switch component (120) are at least partially arranged below the capacitor device (130) in a direction (z) perpendicular to the directions of main extension (x, y) of the component carrier (100).

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 1/02 - Printed circuits - Details
• H05K 1/11 - Printed elements for providing electric connections to or between printed circuits

Abstract

A package (100) which comprises an inorganic core (102) having at least one through hole (104), and at least one organic board (108) comprising an at least partially organic dielectric matrix (106) and at least one electrically conductive vertical through connection (110) extending vertically through the at least partially organic dielectric matrix (106), wherein the at least one organic board (108) is at least partially embedded in the at least one through hole (104), and wherein an electric connection between a top side and a bottom side of the inorganic core (102) is established by the at least one vertical through connection (110).

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H05K 3/00 - Apparatus or processes for manufacturing printed circuits

Abstract

There is described a radio frequency, RF, module (100), comprising: i) a stack (101) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (102); and ii) a RF front-end functionality (115) that is integrated in the stack (101). Further, an RF arrangement, a manufacture method and a use are described.

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 1/03 - Use of materials for the substrate
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/46 - Manufacturing multi-layer circuits

Abstract

There is described a component carrier (100), comprising: i) a stack (101) comprising at least one electrically insulating layer structure (102) and/or at least one electrically conductive layer structure (104); ii) at least one signal element (150), wherein the signal element (150) protrudes from the outermost layer structure (102, 104) of the stack (101); and iii) a surrounding material (140) arranged on the outermost layer structure (102, 104) of the stack (101) and at least partially surrounding the at least one signal element (150). The signal element (150) comprises a dielectric material and comprises a permittivity that is different, in particular higher, than a permittivity of a medium that directly surrounds the at least one signal element (150).

IPC Classes  ?

• H01Q 9/04 - Resonant antennas
• H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart

Abstract

A package (100) which comprises an integrated circuit substrate (102) having an exposed substrate pad (104) and having an exposed substrate dielectric (106), and an electronic component (108) having an integrated circuit (136), having an exposed component pad (110) and having an exposed component dielectric (112), wherein the integrated circuit substrate (102) is connected with the electronic component (108) so that there is a direct physical contact between the substrate pad (104) and the component pad (110) and so that there is a direct physical contact between the substrate dielectric (106) and the component dielectric (112).

IPC Classes  ?

• H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
• H01L 23/498 - Leads on insulating substrates
• H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation

Abstract

An integrated circuit substrate (100) for surface mounting an integrated circuit component (102) thereon, wherein the integrated circuit substrate (100) comprises a support structure (104) having at least one hole, and at least two functional inlays (108) placed inside said at least one hole side by side, wherein a pitch (D) at an integrated circuit component mounting side (140) of the integrated circuit substrate (100) is not more than 150 μm.

IPC Classes  ?

• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
• H01L 23/498 - Leads on insulating substrates
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

An integrated circuit substrate (100) for surface mounting an integrated circuit component (102) thereon, wherein the integrated circuit substrate (100) comprises a central section (104), and at least two vertically stacked functional volume sections (106) in the central section (104), wherein a pitch (D) at an integrated circuit component mounting side (108) of the integrated circuit substrate (100) is not more than 150 μm.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates

Abstract

The present invention provides a component carrier (1) comprising a stack (2) comprising at least one electrically conductive layer structure (3) and at least one electrically insulating layer structure (4); a first component (5) embedded in the stack (2); a second component (6) mounted on the first component (5) and in a cavity (7) which is delimited by an interface surface (8) of the stack (2); and an electrically insulating filling (9) which at least partially fills the cavity (7) and extends up to the interface surface (8) and thereby forms an interface with at least one of the at least one electrically insulating layer structure (4).

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

There is described a component carrier (100) comprising: i) a stack (110) comprising at least one electrically insulating layer structure (102) and at least one electrically conductive layer structure (104); ii) a cavity (120) formed in the stack (110); iii) an electrically insulating material layer (130) arranged in the stack (110), at least partially defining the bottom of the cavity (120); and iv) a metal layer (140) arranged in the stack (110) below the electrically insulating material layer (130); The bottom of the cavity (120) comprises a bottom surface encircled by the sidewalls (121) of the cavity (120), and a peripheral recess (131) is formed on the bottom of the cavity (120).

IPC Classes  ?

• H05K 3/46 - Manufacturing multi-layer circuits
• H05K 3/00 - Apparatus or processes for manufacturing printed circuits
• H05K 1/14 - Structural association of two or more printed circuits
• H05K 1/02 - Printed circuits - Details
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

It is described a method of manufacturing a component carrier, the method comprising: i) providing a component carrier (100) with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure; ii) forming a protection layer (150) on the component carrier (100), so that a first portion (130) of the surface of the component carrier (100) is covered with the protection layer (150), and a second portion (140) of the surface of the component carrier (100) is not covered with the protection layer (150); iii) performing a component carrier manufacture step with respect to the second portion (140); and afterwards iv) removing the protection layer (150) from the first portion (130) using a pressurized fluid.

IPC Classes  ?

• H05K 3/00 - Apparatus or processes for manufacturing printed circuits
• H05K 3/28 - Applying non-metallic protective coatings

Abstract

It is described a component carrier (100) comprising: i) a stack comprising at least one electrically insulating layer structure (102) and at least one electrically conductive layer structure (104); ii) a first metal trace (110) comprising a rough surface (111); and iii) a second metal trace (120) arranged adjacent to the first metal trace (110), comprising a smooth surface (121). The component carrier (100) is configured to guide high-frequency, HF, and or high speed signals through the second metal trace (120).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 3/38 - Improvement of the adhesion between the insulating substrate and the metal
• H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
• H05K 3/28 - Applying non-metallic protective coatings

Abstract

A package (100) which comprises an inorganic carrier body (102) having a cavity (104), an organic integrated circuit substrate (106) embedded in the cavity (104) of the carrier body (102), and a redistribution structure (108) formed partially on and/or above the carrier body (102) and partially on and/or in the integrated circuit substrate (106).

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

A method of manufacturing a component carrier (100), wherein the method comprises stamping a surface profile in a design layer (102), forming an electrically conductive seed layer (118) on the stamped design layer (102), forming a patterned electroplating protection structure (106) on portions of the seed layer (118) apart from indentations (108) of the profiled design layer (102), and electroplating an electroplating structure (110) selectively on or above portions of the seed layer (118) exposed with respect to the electroplating protection structure (106).

IPC Classes  ?

• C25D 1/00 - Electroforming
• C23F 1/00 - Etching metallic material by chemical means
• C25D 5/02 - Electroplating of selected surface areas
• C25D 5/00 - Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
• B41K 1/00 - Portable hand-operated devices without means for supporting or locating the articles to be stamped, i.e. hand stamps; Inking devices or other accessories therefor
• B31F 1/07 - Embossing
• C25D 7/12 - Semiconductors
• C23F 1/02 - Local etching

Abstract

The present invention relates to a method of manufacturing a layer structure (101) for a component carrier (100). According to the method, a carrier layer (102) is provided. An imprint resist layer (104) is added onto the carrier layer (102) and predefined structures forming at least one recess (105) are stamped into the imprint resist layer (104) by a predefined stamp, wherein the recess (105) defines a filling structure (108) in or on the carrier layer (102). In the filling structure (108) at least one of an electrically insulating material (113) and an electrically conductive material (202) is filled.

IPC Classes  ?

• G03F 7/00 - Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern

Abstract

A method of manufacturing a component carrier (100), wherein the method comprises stamping a surface profile in a design layer (102), forming a metallic base structure (122, 122') in at least one indentation (108) of the profiled design layer (102) at least partially by electroplating, and electroplating an electroplating structure (110) in the at least one indentation (108) on or above the metallic base structure (122, 122'),

IPC Classes  ?

• H05K 3/46 - Manufacturing multi-layer circuits
• H05K 3/28 - Applying non-metallic protective coatings
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

A component carrier (100) which comprises a stack (102) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (106), and a photosensitive adhesion promoter (108) on or above the stack (102), wherein only a sub-portion (110) of the photosensitive adhesion promoter (108) is photoactivated, and electrically conductive material (112) selectively on said sub-portion (110) of the photosensitive adhesion promoter (108).

IPC Classes  ?

• H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
• H05K 3/38 - Improvement of the adhesion between the insulating substrate and the metal
• H05K 3/24 - Reinforcing of the conductive pattern

Abstract

It is described a method of processing an etching waste medium from circuit board and/or substrate manufacture, the method comprising: i) providing a medium to be processed (11), being the etching waste medium, in particular from an etching process (150), wherein the medium to be processed (11) comprises a metal salt to be processed and an acid (15); ii) processing the medium to be processed (11) in an ion exchange process (145), so that the metal salt to be processed is exchanged by a metal salt, and a metal salt containing medium (10) is obtained from the medium to be processed (11); hereby a) streaming a first process cycle (170) through the ion exchange process (145), wherein the first process cycle (170) is a first closed loop that yields substantially only elementary metal (50); and b) streaming a second process cycle (180) through the ion exchange process (140), wherein the second process cycle (180) is a second closed loop that yields substantially only purified water (188) and/or a metal-depleted salt concentrate (186b).

IPC Classes  ?

• C25D 21/18 - Regeneration of process solutions of electrolytes
• C25D 21/22 - Regeneration of process solutions by ion-exchange
• C25C 3/00 - Electrolytic production, recovery or refining of metals by electrolysis of melts
• C25D 21/14 - Controlled addition of electrolyte components
• C22B 3/42 - Treatment or purification of solutions, e.g. obtained by leaching by ion-exchange extraction
• C22B 7/00 - Working-up raw materials other than ores, e.g. scrap, to produce non-ferrous metals or compounds thereof
• C23F 1/46 - Regeneration of etching compositions
• C25C 1/02 - Electrolytic production, recovery or refining of metals by electrolysis of solutions of light metals
• C25C 1/08 - Electrolytic production, recovery or refining of metals by electrolysis of solutions of iron group metals, refractory metals or manganese of nickel or cobalt
• C25C 1/12 - Electrolytic production, recovery or refining of metals by electrolysis of solutions of copper
• C25C 1/14 - Electrolytic production, recovery or refining of metals by electrolysis of solutions of tin
• C25C 1/16 - Electrolytic production, recovery or refining of metals by electrolysis of solutions of zinc, cadmium or mercury
• C25C 1/20 - Electrolytic production, recovery or refining of metals by electrolysis of solutions of noble metals
• C25D 21/20 - Regeneration of process solutions of rinse-solutions
• C25D 3/38 - Electroplating; Baths therefor from solutions of copper

Abstract

A method of recovering metal from a chemical bath (100) for chemically treating a structure with metal, wherein the method comprises supplying a chemical composition comprising metal from the chemical bath (100) to a membrane distillation device (106), separating at least part of the metal in the membrane distillation device (106), and reintroducing the separated metal into the chemical bath (100).

IPC Classes  ?

• C25D 21/18 - Regeneration of process solutions of electrolytes
• C25D 21/20 - Regeneration of process solutions of rinse-solutions
• C02F 1/44 - Treatment of water, waste water, or sewage by dialysis, osmosis or reverse osmosis
• B01D 61/36 - Pervaporation; Membrane distillation; Liquid permeation
• C25D 17/00 - Constructional parts, or assemblies thereof, of cells for electrolytic coating
• C23C 18/16 - Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, i.e. electroless plating

Abstract

Component carrier (100) which comprises a stack (102) comprising at least one electrically conductive layer structure (41) and at least one electrically insulating layer structure (40), and a recess (43), in particular a cavity, being at least partially formed in the stack (102), optionally having an electrically conductive coating (44), and being configured as waveguide, wherein a plurality of edges (67) delimiting the recess (43) are formed by electrically conductive material of the at least one electrically conductive layer structure (41) and/or of the optional electrically conductive coating (44).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 3/00 - Apparatus or processes for manufacturing printed circuits
• H05K 3/46 - Manufacturing multi-layer circuits

Abstract

A component carrier (100) which comprises a stack (102) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (106), a first electronic component (108) and a second electronic component (110) arranged in the stack (102), a first block (112) and a second block (114) arranged in the stack (102) below the first electronic component (108) and the second electronic component (110), and a third block (116) and a fourth block (118) arranged in the stack (102) above the first electronic component (108) and the second electronic component (110), wherein said blocks are thermally conductive.

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/42 - Plated through-holes
• H05K 3/46 - Manufacturing multi-layer circuits

Abstract

Apparatus (100) for testing quality of a component carrier structure (102), wherein the apparatus (100) comprises a material removal unit (112) configured for removing material of the component carrier structure (102) for exposing a plane in an interior of the component carrier structure (102), a detection unit (162) configured for detecting component carrier structure specific data (in particular image data) of the exposed plane of the component carrier structure (102), a determining unit (114) configured for determining at least one pre-defined test target (116) of the component carrier structure (102) at the exposed plane based on the component carrier structure specific data, and an evaluation unit (118) configured for identifying and evaluating at least one defect of the at least one determined test target (116) for assessing quality of the component carrier structure (102).

IPC Classes  ?

• G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

Abstract

Apparatus (100) for carrying out a quality test of a component carrier structure (102), wherein the apparatus (100) comprises a handling unit (104) configured for handling the component carrier structure (102) at least along a portion between an inlet (106) and an outlet (108) of the apparatus (100), an identification unit (110) configured for identifying the component carrier structure (102) undergoing the quality test, a material removal unit (112) configured for removing material of the component carrier structure (102) for exposing an interior of the component carrier structure (102) undergoing the quality test, a determining unit (114) configured for determining at least one pre-defined test target (116) of the component carrier structure (102) after said material removal, and an evaluation unit (118) configured for evaluating a characteristic of the determined at least one test target (116) of the component carrier structure (102) for assessing the quality of the component carrier structure (102).

IPC Classes  ?

• G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

Abstract

A computer-implemented system (270) for designing a coupon (200) for carrying out a quality test concerning coupon-related component carriers (256), wherein the system (270) comprises a compliance input unit (272) configured for receiving compliance input data indicative of compliance conditions to be fulfilled by the coupon (200) to be designed, a product input unit (274) configured for receiving product input data indicative of properties of component carriers (256) to be manufactured to which the coupon (200) to be designed is related, and a coupon design unit (276) configured for designing the coupon (200) so as to fulfil said compliance conditions and/or said properties of the component carriers (256).

IPC Classes  ?

• G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control (DNC), flexible manufacturing systems (FMS), integrated manufacturing systems (IMS), computer integrated manufacturing (CIM)
• G06F 30/30 - Circuit design
• H05K 3/00 - Apparatus or processes for manufacturing printed circuits

Abstract

Apparatus (100) for processing a component carrier structure (102) for a quality test, wherein the apparatus (100) comprises a material removal unit (112) configured for removing material of the component carrier structure (102) for exposing at least one test target (116) in an interior of the component carrier structure (102) to be subjected to the quality test, a progress measuring unit (250) configured for measuring a progress of the removal of material of the component carrier structure (102), an analysis unit (252) configured for analyzing whether the measured progress meets requirements of a predefined material removal objective, and a control unit (254) configured for controlling, based on a result of the analysis, whether or not the sequence of removing material, measuring a progress thereof, and analyzing whether the measured progress meets the requirements of the predefined material removal objective has to be repeated.

IPC Classes  ?

• G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

Abstract

Coupon (200) for carrying out a quality test concerning related component carriers (256), wherein the coupon (200) comprises a base plate (202) configured as a layer stack of at least one electrically conductive layer structure (204) and/or at least one electrically insulating layer structure (206), a handling area (208) on a first portion of the base plate (202), configured for handling the coupon (200) by a robotic handling unit (104) and being free of test targets (116) for the quality test, and a test area (212) on and/or in a second portion of the base plate (202) and comprising test targets (116) for the quality test.

IPC Classes  ?

• G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

Abstract

An electronic device (1) and a method (500) for manufacturing such electronic device (1) are described. The electronic device comprises an electronic component (30), and a component carrier in which the electronic component is embedded, wherein the component carrier comprises a first component carrier part (10) having a first cut-out portion (12), and wherein the component carrier comprises a second component carrier part (20) having a second cut-out portion (22), the first cut-out portion and the second cut-out portion facing opposite main surfaces of the electronic component, wherein an electrically conductive material (13, 23) is provided on the surface of the first cut-out portion and on the surface of the second cut-out portion, and wherein the first cut-out portion and the second cut-out portion respectively form a first cavity (15) and a second cavity (25) on opposite sides of the electronic component.

IPC Classes  ?

• H05K 3/46 - Manufacturing multi-layer circuits
• H05K 1/02 - Printed circuits - Details
• H01P 3/08 - Microstrips; Strip lines

Abstract

A component carrier (100) which comprises a stack (102) comprising a plurality of electrically conductive layer structures (104) and/or electrically insulating layer structures (106), a cavity (108) in the stack (102), a high-frequency dielectric (110) forming part of the stack (102) and forming at least part of a bottom (112) of the cavity (108), and an antenna structure (114) arranged on the high-frequency dielectric (110) and within the cavity (108).

IPC Classes  ?

• H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support
• H01Q 1/52 - Means for reducing coupling between antennas; Means for reducing coupling between an antenna and another structure
• H01Q 1/22 - Supports; Mounting means by structural association with other equipment or articles
• H01Q 23/00 - Antennas with active circuits or circuit elements integrated within them or attached to them

Abstract

It is provided a component carrier (100-1100, 1400) with integrated magnetic field sensor, wherein the component carrier comprises: a plurality of electrically conductive layer structures and/or electrically insulating layer structures (101); an excitation coil (103) and sensor coils (105, 107) arranged on and/or in the layer structures; a first magnetic structure (109) above the excitation coil and sensor coils; a second magnetic structure (345) below the excitation coil and sensor coils.

IPC Classes  ?

• G01R 33/04 - Measuring direction or magnitude of magnetic fields or magnetic flux using the flux-gate principle

Abstract

A method of manufacturing a component carrier (100), wherein the method comprises applying a fluidic medium (102) selectively towards a recess (104) in a layer structure (106), and transferring at least part of the fluidic medium (102) into solid material (108) covering at least part of a surface of the recess (104).

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H01L 23/498 - Leads on insulating substrates
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H05K 3/24 - Reinforcing of the conductive pattern
• H05K 3/42 - Plated through-holes

Abstract

A manufacturing method of manufacturing a constituent (350) for a component carrier (300), wherein the method comprises providing an electrically conductive structure (100), forming a highly thermally conductive and electrically insulating or semiconductive structure (102) on the electrically conductive structure (100), and subsequently attaching a thermally conductive and electrically insulating structure (200), having a lower thermal conductivity than the highly thermally conductive and electrically insulating or semiconductive structure (102), on an exposed surface of the highly thermally conductive and electrically insulating or semiconductive structure (102).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 1/03 - Use of materials for the substrate
• H01L 23/373 - Cooling facilitated by selection of materials for the device
• H05K 3/02 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
• H05K 3/46 - Manufacturing multi-layer circuits

Abstract

A component carrier (100) for carrying at least one component (1400) and comprising a plurality of electrically conductive layer structures (102, 104), and a plurality of electrically insulating layer structures (106, 108), wherein the plurality of electrically conductive layer structures (102, 104) and the plurality of electrically insulating layer structures (106, 108) form a laminated stack, and wherein at least one of the electrically insulating layer structures (106, 108) is configured as a flame retardant structure (108) preventing propagation of fire along the component carrier (100).

IPC Classes  ?

• H05K 3/46 - Manufacturing multi-layer circuits
• H05K 1/02 - Printed circuits - Details
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

A component carrier ( 100) which comprises a heat absorbing and thermally conductive surface layer (102) configured for being heated by an external heat source (104), and a thermoelectric device (106) fully surrounded by material of the component carrier (100), thermally coupled with the surface layer (102) and configured for transferring thermal energy of the heated surface layer (102) into electric energy.

IPC Classes  ?

• H01L 35/32 - SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR - Details thereof operating with Peltier or Seebeck effect only characterised by the structure or configuration of the cell or thermocouple forming the device
• H05K 1/02 - Printed circuits - Details

Abstract

A component carrier (100) comprising component carrier material (130), and a heat spreading module (102) which comprises a carbon structure, in particular graphite structure (104), enclosed within a dielectric shell (106) for disabling contact between the carbon structure and the component carrier material (130).

IPC Classes  ?

• H05K 3/46 - Manufacturing multi-layer circuits
• H05K 1/02 - Printed circuits - Details
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

The invention refers to a component carrier (10) realized as a printed circuit board, an intermediate printed circuit board product or an IC-substrate, comprising at least one heat- passage component (30), said at least one heat-passage component (30) being realized in form of a heat-generating or a heat-absorbing component that is mounted on an outside surface layer (21, 22) or is embedded within at least one inner layer (23, 24) of the component carrier (10), and further comprising at least one latent-heat storage unit (40) with a phase-change material (45). The phase-change material (45) is laminated and integrated within at least one cavity (25) of the component carrier (10) and is directly thermoconductively coupled with the at least one heat-passage component (30). The invention also refers to a method for producing said component carrier (10).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• F28D 20/02 - Heat storage plants or apparatus in general; Regenerative heat-exchange apparatus not covered by groups or using latent heat
• H01L 23/373 - Cooling facilitated by selection of materials for the device

Abstract

It is described a component carrier (100) with a base structure (120); an antenna arrangement (140) having a at least a first antenna element (142) and a second antenna element (146), wherein both antennas elements (142, 146) are embedded within the base structure (120); and an electronic component (130), which is embedded within the base structure (120) and which is operatively connected both with the first antenna element (142) and the second antenna element (146). The electronic component (130) is an active electronic component which is capable of (i) providing a first transmit signal to the first antenna element (142) and a second transmit signal to the second antenna element (146) and/or (ii) processing a first receive signal received from the first antenna element (142) and a second receive signal received from the second antenna element (146). Further, an electronic apparatus (1070) comprising such a component carrier(100)and a manufacturing method for such a component carrier (100) are described.

IPC Classes  ?

• H01Q 21/00 - Antenna arrays or systems
• H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart

Abstract

A component carrier (890) for carrying at least one electronic component comprises (a) a plurality of electrically conductive layers (204, 206, 432, 434); (b) a plurality of electrically insulating layers (422, 424); and (c) a thermoplastic structure (102) comprising a thermoplastic material. The electrically conductive layers (204, 206, 432, 434), the electrically insulating layers (422, 424), and the thermoplastic structure (102) form a laminate. Further, it is provided a method for manufacturing such a component carrier (890) and an electronic apparatus comprising such a component carrier (890).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 3/46 - Manufacturing multi-layer circuits
• H05K 3/00 - Apparatus or processes for manufacturing printed circuits
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

A method of manufacturing an electronic device (100), wherein the method comprises providing a component carrier (102) comprising a laminate of at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106), providing a mounting base (132) for mounting an electronic component (108) on and/or in the component carrier (102), and integrally forming a wall structure (110) with the component carrier (102) prior to mounting an electronic component (108) on the mounting base (132), the integrally formed wall structure (110) at least partially surrounding the mounting base (132) for mounting the electronic component (108) on the mounting base (132) and protected by the wall structure (110).

IPC Classes  ?

• B81B 7/00 - Microstructural systems
• B81C 1/00 - Manufacture or treatment of devices or systems in or on a substrate

Abstract

A component carrier (100) for carrying an electronic component on and/or in the component carrier (100), wherein the component carrier (100) comprises an interconnected stack (102) composed of a plurality of electrically conductive layer structures (104) and a plurality of electrically insulating layer structures (106, 106'), wherein at least part of at least one of the electrically conductive layer structures (104) is configured as at least part of an integrated strain gauge (108) configured for detecting strain exerted on at least part of the component carrier (100).

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor

Abstract

An electronic device comprising an electronic component with electric terminals, a component carrier in which the electronic component is packaged, wherein the component carrier comprises a flexible layer structure interposed between an upper rigid layer structure and a lower rigid layer structure, wherein the upper rigid layer structure comprises an upper cut-out portion and the lower rigid layer structure comprises a lower cut-out portion, and wherein the upper cut-out portion and the lower cut-out portion are formed at at least partially opposing positions relative to the flexible layer structure.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

An electronic device (500) comprising an electronic component (100) with electric terminals (102) and a component carrier (200) in which the electronic component (100) is packaged, wherein the component carrier (200) comprises a shielding cage (400) surrounding all sides of the electronic component (100) at least partially.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/552 - Protection against radiation, e.g. light

Abstract

A method of manufacturing a component carrier (500), wherein the method comprises providing a first component carrier body (100) comprising at least one first electrically insulating layer structure (102) and at least one first electrically conductive layer structure (104), providing a second component carrier body (200) comprising at least one second electrically insulating layer structure (202) and at least one second electrically conductive layer structure (204), providing at least a part of at least one of the first component carrier body (100) and the second component carrier body (200) of an at least partially uncured material, and interconnecting the first component carrier body (100) with the second component carrier body (200) by curing the at least partially uncured material.

IPC Classes  ?

• H05K 3/46 - Manufacturing multi-layer circuits
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

A component carrier for carrying and cooling at least one heat generating electronic component (150; 251, 252, 351, 352, 353, 354, 451, 452), the component carrier comprising an outer layer structure (110, 115, 210, 215, 310, 315, 410, 415), an electrically insulating layer (120, 125, 220, 225, 320, 325, 420, 425) arranged adjacent to the outer layer structure, and a heat conducting structure (130, 230, 331, 332, 430) arranged adjacent to the electrically insulating layer on a side opposite to the outer layer structure, the heat conducting structure being adapted to be thermally coupled to the at least one heat generating electronic component, wherein the outer layer structure is adapted to receive thermal radiation irradiated by the heat conducting structure and to transport corresponding heat away from the component carrier via convection by a heat transfer medium surrounding the component carrier.

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details

Abstract

In a connection panel for electronic components (1) comprising a plurality of insulating layers (8, 9, 2, 11, 12) and conductive layers (13, 14, 15) and further comprising an electronic sensor (4), the sensor (4) is comprised of at least one flexure member (4') formed by a flexure layer (2), the flexure member (4') protruding from the flexure layer (2) and into a clearance (3) within the flexure layer (2) and carrying at least a part of a flexure sensing device (6).

IPC Classes  ?

• B81C 1/00 - Manufacture or treatment of devices or systems in or on a substrate
• H05K 3/00 - Apparatus or processes for manufacturing printed circuits
• B81B 7/00 - Microstructural systems

Abstract

An electronic device (200) comprising a component carrier which comprises a component carrier body, an electrically conductive layer (220), and an adhesive structure (230). The electronic device (200) further comprises an electronic component (250) which is arranged within the component carrier body. The adhesive structure (230) is formed between an surface of the electronic component (250) and the electrically conductive layer (220) and covers only a part of the surface of the electronic component (250). A remaining part of the surface of the electronic component (250) is covered with the component carrier body.

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

A method of manufacturing a stretchable electronic component carrier, the method comprising: a) providing a sheet of conductive foil material, b) providing a rigid support structure on a first part of a surface of the sheet of conductive foil material, c) providing a stretchable support structure on a second part of the surface of the sheet of conductive foil material, d) curing the first and second support structure to fasten them to the sheet of conductive foil material, and e) processing the sheet of conductive foil material to form a stretchable conductive layer structure.

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 3/02 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
• H05K 1/03 - Use of materials for the substrate

Abstract

The present invention relates to a carrier (2) with a passive cooling function for a semiconductor component (3), having a main body (6) with a top face (7) and a bottom face (8) and at least one electrical component (13, 13a, 13b) which is embedded into the main body (6), wherein the carrier (2) has a first thermal via (14) which extends from the top face (7) of the main body (6) to the at least one electrical component (13, 13a, 13b), wherein the carrier (2) has a second thermal via (15) which extends from the at least one electrical component (13, 13a, 13b) to the bottom face (8) of the main body (6), and wherein the first and the second thermal via (14, 15) make electrical contact with the at least one embedded electrical component (13, 13a, 13b).

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
• H05K 1/02 - Printed circuits - Details
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H01L 33/54 - Encapsulations having a particular shape
• H01L 33/64 - Heat extraction or cooling elements

Abstract

Disclosed is a device (100) for electrically connecting components, comprising at least one electrically insulating layer structure (102), at least one electroconductive layer structure (104) that is stacked together and consolidated with the at least one electrically insulating layer structure (102) such that a stack of layers is formed, and a deformation counteracting structure (106) which penetrates at least some layer structures (102, 104) of the stack of layers so as to stabilize the device (100) in such a way that deformations are prevented.

IPC Classes  ?

• H05K 3/42 - Plated through-holes
• H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

A printed circuit board is provided which comprises a core layer of a conductive metal having a thickness between 30 micrometer and 120 micrometer, an upper dielectric layer and a lower dielectric layer sandwiching the core layer; an upper conductive layer arranged above the upper dielectric layer and a lower conductive layer arranged below the lower dielectric layer; at least one via passing from the upper conductive layer to the lower conductive layer and filled at least partially with the dielectric material of the upper and/or lower dielectric layer; and at least one and blind via, connecting the upper conductive layer with the core layer.

IPC Classes  ?

• H05K 3/44 - Manufacturing insulated metal core circuits
• H05K 1/02 - Printed circuits - Details
• H05K 1/05 - Insulated metal substrate
• H05K 3/46 - Manufacturing multi-layer circuits

Abstract

It is provided an electronic assembly (100) comprising (a) a component carrier (110), which comprises at least one dielectric layer and a metallic layer, which is attached at the dielectric layer; (b) a wireless communication component (150), which is attached to the component carrier (110); and (c) an antenna structure (160), which is formed from a metallic material and which is electrically connected with the wireless communication component (150). An opening (130) is formed within the component carrier (110), which opening (110) extends from an upper surface of the component carrier (110) into the interior of the component carrier (110). The antenna structure (160) is formed at least partially at a wall of the opening (110). It is further described a method for fabricating such an electronic assembly (100).

IPC Classes  ?

• H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support
• H01Q 7/00 - Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
• H01Q 13/10 - Resonant slot antennas
• H01Q 13/02 - Waveguide horns
• H01Q 9/26 - Resonant antennas with feed intermediate between the extremities of the antenna, e.g. centre-fed dipole with folded element or elements, the folded parts being spaced apart a small fraction of operating wavelength

Abstract

A component carrier (100) for carrying electronic components (104), wherein the component carrier (100) comprises an at least partially electrically insulating core (102), at least one electronic component (104) embedded in the core (102), and a coupling structure (106, 202) with at least one electrically conductive through-connection (108) extending at least partially therethrough and having a component contacting end (112) and a wiring contacting end (114), wherein the at least one electronic component (104) is electrically contacted directly to the component contacting end (112), wherein at least an exterior surface portion of the coupling structure (106, 202) has homogeneous ablation properties and is patterned so as to have surface recesses filled with an electrically conductive wiring structure (110), and wherein the wiring contacting end (114) is electrically contacted directly to the wiring structure (110).

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/04 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
• H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
• H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
• H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
• H05K 3/24 - Reinforcing of the conductive pattern

Abstract

This document describes a printed circuit board and a method for producing a printed circuit board or two printed circuit boards, wherein the printed circuit board comprises (a) a dielectric layer (312), which has a planar extent parallel to an xy plane spanned by an x axis and a y axis perpendicular thereto and has a layer thickness along a z direction perpendicular to the x axis and to the y axis; (b) a metallic layer (336), which is applied areally on the dielectric layer; and (c) a component (120), which is embedded in the dielectric layer (312) and/or in a dielectric core layer (350) of the printed circuit board (300). The dielectric layer (312) comprises a dielectric material which has (i) a modulus of elasticity E in the range of between 1 and 20 GPa and (ii) a coefficient of thermal expansion along the x axis and along the y axis in the range of between 0 and 17 ppm/K.

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 3/46 - Manufacturing multi-layer circuits
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H05K 1/03 - Use of materials for the substrate
• C08J 5/24 - Impregnating materials with prepolymers which can be polymerised in situ, e.g. manufacture of prepregs

Abstract

The invention relates to a circuit board (200) having a layer structure with at least one dielectric layer (114) which has a planar extension parallel to an xy-plane that extends via an x-axis and a perpendicular y-axis, and has a layer thickness along a z-axis that is perpendicular to the x-axis and the y-axis, and with at least one metal layer (136) that is applied in a planar manner to the dielectric layer, wherein the layer composite is free from a symmetry plane along the z-axis, said symmetry plane being oriented in parallel to the xy-plane, and the dielectric layer (114) has a dielectric material which has an elastic modulus E in the region between 1 and 20 GPa, and has a thermal expansion coefficient in the region between 0 and 17 ppm/K along the x-axis and along the y-axis. The invention also relates to a method for producing a circuit board (200) of this type. The invention further relates to a method for producing a circuit board structure having two asymmetric circuit boards, and a method for producing two processed asymmetric circuit boards (500a, 500b) from a larger circuit board structure (505).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 1/03 - Use of materials for the substrate
• H05K 3/46 - Manufacturing multi-layer circuits
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• C08J 5/24 - Impregnating materials with prepolymers which can be polymerised in situ, e.g. manufacture of prepregs
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

A package (100) comprising a support structure (102) comprising an electrically insulating material, a microelectromechanical system (MEMS) component, a cover structure (108) comprising an electrically insulating material and mounted on the support structure (102) for at least partially covering the MEMS component (106), and an electronic component (104) embedded in one of the support structure (102) and the cover structure (108), wherein at least one of the support structure (102) and the cover structure (108) comprises an electrically conductive contact structure (110).

IPC Classes  ?

• B81B 7/00 - Microstructural systems

Abstract

The invention relates to a package comprising a base structure (102) which comprises an electrically insulating material and/or an electrically conductive contact structure (110), an electronic component (104) which is embedded in the base structure (102) or on the base structure (102), a microelectromechanical system (MEMS) component (106) and a cover structure (108) which is mounted on the base structure (102) to at least partially cover the MEMS component (106)

IPC Classes  ?

• B81C 1/00 - Manufacture or treatment of devices or systems in or on a substrate
• H04R 19/00 - Electrostatic transducers
• H04R 19/04 - Microphones

Abstract

An electronic device (200) which comprises a support structure (100) comprising electrically insulating material and/or electrically conductive material, and a heat pipe structure (202) synthesized during or after formation of the support structure (100), being integrated in and/or on the support structure (100) and comprising a thermally conductive shell (204) which fully surrounds and thereby hermetically seals a heat transporting medium, in particular a fluid (206), in an interior of the shell (204) with regard to a surrounding.

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H01L 23/427 - Cooling by change of state, e.g. use of heat pipes
• H01L 23/46 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids
• H01L 33/64 - Heat extraction or cooling elements
• H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
• F28D 15/02 - Heat-exchange apparatus with the intermediate heat-transfer medium in closed tubes passing into or through the conduit walls in which the medium condenses and evaporates, e.g. heat-pipes

Abstract

A circuit board (200), wherein the circuit board (200) comprises a plurality of connected layer structures (100, 102) of electrically insulating material and electrically conductive material, and a hermetically sealed prefabricated heat pipe (104) in contact with at least one of the layer structures (100, 102).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
• F28D 15/02 - Heat-exchange apparatus with the intermediate heat-transfer medium in closed tubes passing into or through the conduit walls in which the medium condenses and evaporates, e.g. heat-pipes

Abstract

In a printed circuit board (1) comprising a plurality of insulating layers and conductive layers, and comprising at least one cavity (7) at least one electromagnetic coil (8) is arranged on an outer layer (4) of the printed circuit board (1) and cooperates with a permanent magnet (6) arranged inside the at least one cavity (7).

IPC Classes  ?

• H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor

Abstract

A composite structure (100) for use as a constituent of a mounting device (300), wherein the composite structure (100) comprises an electrically conductive carrier (102), an intermediate layer (104) comprising adhesion promoting material and being arranged on the electrically conductive carrier (102), and a thermally conductive and electrically insulating layer (106) on the intermediate layer (104).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 3/02 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding

Abstract

A mounting device (100) for mounting electronic components, wherein the mounting device (100) comprises an electrically conductive structure (102) having a first value of thermal expansion in at least one pre-defined spatial direction, an electrically insulating structure (104) having a second value of thermal expansion in the at least one pre-defined spatial direction being different from, in particular smaller than,the first value and being arranged on the electrically conductive structure (102), and a thermal expansion adjustment structure (106), in particular in and/or on the electrically conductive structure (102), having a third value of thermal expansion in the at least one pre-defined spatial direction, wherein the third value is selected and the thermal expansion adjustment structure (106) is located so that thermally induced warpage of the mounting device (100) resulting from a difference between the first value and the second value is at least partially compensated by the thermal expansion adjustment structure (106).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 3/46 - Manufacturing multi-layer circuits

Abstract

Mounting device (100) for mounting electronic components, wherein the mounting device (100) comprises an electrically conductive structure (102), an adhesion promoting structure (104), which comprises carbon,on the electrically conductive structure (102), and a thermally conductive and electrically insulating structure (106) on the adhesion promoting structure (104).

IPC Classes  ?

• H01L 23/373 - Cooling facilitated by selection of materials for the device

Abstract

A mounting device (400) for mounting electronic components, wherein the mounting device (400) comprises a stack, in particular a layer stack (100) configured as alternating sequence of at least one support structure (102) for providing mechanical support and a plurality of thermally conductive and electrically insulating structures (104).

IPC Classes  ?

• H01L 23/373 - Cooling facilitated by selection of materials for the device
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 33/64 - Heat extraction or cooling elements

Abstract

A mounting device (100) for mounting electronic components, wherein the mounting device (100) comprises a carrier structure, in particular an electrically conductive structure (102), and a sliding structure (104) being at least partially embedded within the carrier structure, in particular the electrically conductive structure (102), and being made of a material which has non-adhesive properties on material of the carrier structure, in particular the electrically conductive structure (102), so that portions of the carrier structure, in particular the electrically conductive structure (102), are capable of sliding on the sliding structure (104) to thereby at least partially equilibrate mechanical stress within the mounting device (100).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 1/05 - Insulated metal substrate
• H05K 3/44 - Manufacturing insulated metal core circuits

Abstract

The invention relates to an electronic device (100) having an electrically insulating support structure (102), an electrically conductive conductor path (104) on a surface of the support structure (102), and an electrically conductive contact structure (106) which extends from the surface into the support structure (102) and is electrically connected to the conductor path (104) at a connection point (108), thereby forming a common conductor track (110). The conductor path (104) and the contact structure (106) transition into each other in an enlargement-free manner at the connection point (108).

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
• H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/12 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using printing techniques to apply the conductive material

Abstract

I In this document there is described an electronic assembly comprising (a) a base carrier structure (250) having a cavity (255) formed therein, (b) a cover carrier structure (110), and (c) an electronic component (100) being disposed within the cavity (255) and being connected electrically and/or thermally both with the cover carrier structure (110) and with the base carrier structure (250). The base carrier structure (250) is made at least partially from a printed circuit board (260). Preferably, also the cover carrier structure (110) is made at least partially from a further printed circuit board (120). It is further described an electronic device comprising such an electronic assembly and a method for manufacturing such an electronic assembly.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

The invention relates to a method for producing a circuit board having at least one optoelectronic component, which method is characterized by the following steps: a) applying a transparent curable adhesive layer (1) to a carrier layer (2), b) placing at least one optoelectronic component (3) onto the adhesive layer (1) by means of an optically relevant side (4) of the component, c) curing the adhesive layer (1) into a window element (1'), d) embedding the component (3) in a circuit-board composite, e) structuring the carrier layer (2) in order to at least partially expose the window element (1') and to contact the component (3).

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 1/02 - Printed circuits - Details
• G02B 6/43 - Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections

Abstract

A method of manufacturing a circuit board (600)or a circuit board intermedi- ate product(400), wherein the method comprises providing a carrier structure (100), applying a layer of flowable low-viscosity adhesive(300) on the carrier structure (100) over a surface area (302) of the carrier structure (100) which is larger than a mounting area (404) in which an electronic component (402) is to be mounted on the carrier structure (100), and pressing the electronic component (402) into a subsection of the layer of adhesive(300) in the mounting area (404) so that at least part of the electronic component (402) is immersed within the adhesive(300).

IPC Classes  ?

• H05K 3/00 - Apparatus or processes for manufacturing printed circuits
• H05K 3/30 - Assembling printed circuits with electric components, e.g. with resistor
• H05K 3/46 - Manufacturing multi-layer circuits

Abstract

Electronic apparatus (100), having an at least partially electrically insulating carrier structure (102) which has a resin matrix (104) and reinforcement structures (106) in the resin matrix (104), wherein the reinforcement structures (106) are at least partially provided with a thermal conductivity-increasing coating (108), and an electrically conductive structure (110) on and/or in the carrier structure (102), wherein, at least in a connection region between the carrier structure (102) and the electrically conductive structure (110), the carrier structure (102) is free from the reinforcement structures (106) which are provided with the coating (108), and therefore the electrically conductive structure (110) and the coating (108) are arranged in a contact-free manner in relation to one another.

IPC Classes  ?

• H05K 1/03 - Use of materials for the substrate
• C03C 25/10 - Coating
• H01B 3/08 - Insulators or insulating bodies characterised by the insulating materials; Selection of materials for their insulating or dielectric properties mainly consisting of inorganic substances vitreous enamels
• H05K 1/02 - Printed circuits - Details

Abstract

A method for producing a printed circuit board (10) with at least one embedded sensor chip (3), in which at least one sensor face (5) and connectors (4) are arranged on a face of the chip, comprising the following steps: a) providing an adhesive film (1), b) printing a conductor structure (2) made of a conductive paste onto a surface of the adhesive film, c) placing the at least one sensor chip (3) with the face having the at least one sensor face (5) and the connectors (4) onto the conductor structure (2) made of a conductive paste in a registered manner, d) curing the conductive paste, e) applying an insulation layer (6) with a conductor layer (7) lying thereabove onto the surface having the chip (3) of the structure created in the preceding steps, f) laminating the structure created in the preceding steps, g) structuring the conductor layer (7) and forming vias (9) from the conductor layer to the printed conductors (7b, 7c) of the conductor structure on the surface of the adhesive film and h) removing the adhesive film (1).

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
• H05K 3/20 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern

Abstract

Connection system (1) for electronic components, the connection system (1) comprising at least one electrically insulating layer (4a', 4a'', 4b', 4b'') and at least one electrically conductive layer (3a, 6a, 3b, 6b), wherein the connection system (1) further comprises a heat distributing layer (5a, 5b) arranged within the at least one electrically insulating layer (4a', 4a'', 4b', 4b''), wherein the at least one heat distributing layer (5a, 5b) is made of thermally conductive, and electrically insulating, matrix-free material.

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 1/03 - Use of materials for the substrate

Abstract

The invention relates to a method for making contact with a component (6) embedded in a printed circuit board (13), which method has the following steps: a) providing a core (1) which has at least one insulating layer (2) and at least one conductor layer (3, 4) applied to the insulating layer (2), b) embedding at least one component (6) in a depression (5) in the insulating layer (2), wherein the contact pins (8) of the component (6) are located substantially in the plane of an outer surface of the core (1) having the at least one conductor layer (4), c) applying a varnish (9) that can be photo-structured to the one outer surface of the core (1) on which the component (6) is arranged, filling the spaces between the contact pins (8) of the component (6), d) exposing end faces of the contact pins (8) and the regions of the conductor layer (4) covered by the varnish (9) that can be photo-structured, by illuminating and developing the varnish (9) that can be photo-structured, e) by applying a semi-additive process, depositing a layer (10) of conductor material on the exposed end faces of the contact pins (8) and the exposed regions of the conductor layer (4), and forming a conductor structure (12-12), at least on the one outer surface of the core (1) on which the component (6) is arranged, and on the connecting lines (11) between the contact pins (8) and the conductor structure (12-12), and f) removing the regions of the conductor layer (4+10) that do not belong to the conductor structure (12-12).

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

A connector device (600) for connection with a counter piece (1500) for establishing a mechanical and electric connection, wherein the connector device (600) comprises at least two printed circuit board elements (100) each comprising an electrically insulating core (102) and at least one comprising an electrically conductive structure (104) at least partially on the respective electrically insulating core (102), and at least one embedded component (106) embedded within the respective electrically insulating core (102) and electrically coupled to the respective electrically conductive structure (104), wherein the at least one electrically conductive structure (104) is arranged at least partially on an exposed surface of the connector device (600) and is configured for establishing the electric connection with the counter piece (1500) upon establishing the mechanical connection with the counter piece (1500).

IPC Classes  ?

• H05K 1/14 - Structural association of two or more printed circuits
• H01R 13/00 - ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS - Details of coupling devices of the kinds covered by groups  or
• H05K 1/11 - Printed elements for providing electric connections to or between printed circuits

Abstract

The invention relates to a method for producing a circuit board comprising at least one cavity for receiving an electronic component, the walls of said cavity having a reflective, in particular specular reflector layer. The method is characterised by the following steps: providing a circuit board (1); applying a temporary protective layer (7) to at least one portion of the surface of the circuit board (1); producing the cavity (9) by penetrating the protective layer (7) in the region of said cavity (9); applying the reflector layer (11); removing the temporary protective layer (7).

IPC Classes  ?

• H01L 33/60 - Reflective elements
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/00 - Apparatus or processes for manufacturing printed circuits

Abstract

A method for embedding a component in a printed circuit board or an intermediate printed circuit board product, wherein the printed circuit board or the intermediate printed circuit board product has at least one insulating layer of a prepreg material and the component is fixed by the resin of the prepreg material, is characterized by the following steps: a) providing a composite (100) of the layers of the printed circuit board or the intermediate printed circuit board product (200), wherein this composite includes at least one curable prepreg material, b) producing a clearance (4) in the composite (100) for receiving the component (6) to be embedded, c) covering at least the region of the clearance (4) with a first temporary carrier layer (5) on a first side of the composite, d) positioning the component (6) to be embedded in the clearance (4) by means of the first temporary carrier layer (5), e) covering at least the region of the clearance (4) on the second side of the composite (100) with a second temporary carrier layer (9), f) pressing the composite (100) to the component (6) while curing the curable prepreg material, g) removing the temporary carrier layers (5, 9).

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/46 - Manufacturing multi-layer circuits
• H05K 1/02 - Printed circuits - Details

Abstract

The invention relates to a circuit board structure (21, 22), comprising at least one insulating layer (10), at least one conducting layer (11, 12), and at least one embedded component (1, 23 - 26) having contact pads (5) having an outer barrier layer (4), wherein at least two conducting tracks/conducting layers (19, 20) are connected to at least two connections (8; 8d, 8g, 8s) by means of vias (9; 9d, 9g, 9s) and each via (9; 9d, 9g, 9s) extends from a conducting track/conducting layer (11, 12) directly to the barrier contact layer (4; 4d, 4g, 4s) of the corresponding connection (8; 8d, 8g, 8s) of the component (1, 23 - 26).

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

The invention relates to a printed circuit board structure (7) having at least one dielectric insulating layer (2, 5o, 5u) and at least one conducting layer (3, 4, 6o, 6u), wherein within the at least one insulating layer (5a), a layer (5) of a dielectric heat-conductive material is provided, which layer (5) is located in close proximity to or in contact with an inner conductor arrangement (3). In the immediate vicinity of or in contact with the layer (5) made of a dielectric heat-conductive material, a further heat-conductive layer (11), preferably an electrically conductive metal layer, can thereby be provided. Also, an at least heat-conductive, preferably electrically conductive, through-plating (9) can be guided from one conductor section (6om) located externally on the printed circuit board to the inside of the printed circuit board at least close to the layer (5) made of a dielectric heat-conductive material.

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H01R 12/52 - Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
• H05K 3/46 - Manufacturing multi-layer circuits

Abstract

The invention relates to a method for contacting and rewiring an electronic component (1) embedded into a printed circuit board (2), characterized by the following steps: applying a first permanent resist layer (9) onto a contact side (8) of the printed circuit board (2), structuring the first permanent resist layer (11) in order to produce recesses (10, 12) in the region of contacts (7) of the electronic component (1), applying a second permanent resist layer (11) onto the structured first permanent resist layer (9), structuring the second permanent resist layer (11) in order to expose the recesses (10) in the region of the contacts (7) and in order to produce recesses (12) corresponding to the desired conductor tracks (15), chemically coating the recesses (10, 12) with copper, galvanically filling the recesses (10, 12) with copper, and removing the excess copper in the regions between the recesses (10, 12).

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
• H05K 3/02 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

A power module having a printed circuit board core (1) that contains at least one electronic power component (7) embedded in an insulating layer (4), the core being arranged between two heat dissipation plates (2, 3), wherein each heat dissipation plate has a metal exterior layer (2a, 3a) and a metal interior layer (2i, 3i) that is electrically isolated from the latter by a thermally conductive, electrically insulating intermediate layer (2z, 3z), and electrode connections of the at least one power component are guided out of the core via connecting lines, wherein the printed circuit board core (1) has a conductor layer (5, 6) on both sides of the insulating layer (4), at least one conductor layer (5) is structured at least in sections and each conductor layer (5, 6) is connected, at least in sections, to a metal interior layer (2i, 3i) of the heat dissipation plate (2, 3) via a conductive, metal intermediate ply (16o, 16u), contacts (11) run from the structured conductor layer to the electrode connections of the at least one power component (7), and at least one power connection (7s) of the at least one power component (7) is connected to at least one section of the metal interior layer (2i) of the heat dissipation plate, which forms part of the connecting line to the electrode connection, via a contact (11), a section of a structured conductor layer (5) and the conductive, metal intermediate ply (16o).

IPC Classes  ?

• H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
• H01L 23/373 - Cooling facilitated by selection of materials for the device
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/498 - Leads on insulating substrates

Abstract

The invention relates to a method for producing a circuit board element having at least one electronic component (1), which component has a connection side defined by electrical contacts or a conductive layer and is connected to a temporary carrier (2) for positioning and embedded in an insulating material (9); the component (1) is attached in a specified position directly to a plastic film (2) as a temporary carrier (2), whereupon a composite layer (4, 4') having at least a carrier (7) and an electrical conductor (6), preferably also having an insulating material (5, 5A), is attached on the side of the component (1) opposite the plastic film (2), with the carrier (7) facing away from the component (1), and thereafter the plastic film (2) is removed; then the component (1) is embedded in insulating material (5A; 9). After the embedding of the component (1) in the insulating material (5A; 9), an additional composite layer (11) is preferably attached to the component (1) and the embedding of the component on the side opposite the first composite layer (4, 4').

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

A method for producing a printed circuit board (13, 15, 16) with multilayer subareas in sections, characterized by the following steps: a) providing at least one conducting foil (1, 1') and application of a dielectric insulating foil (3, 3') to at least one subarea of the conducting foil; b) applying a structure of conducting paths (4, 4') to the insulating layer (3, 3'); c) providing one further printed circuit board structure; d) joining of the further printed circuit board structure with the conducting foil (1, 1') plus insulating layer (3, 3') and conducting paths (4, 4') by interposing a prepreg layer (5, 85; 18, 18'), and e) laminating the parts joined in step d) under pressing pressure and heat; and a printed circuit board produced according to this method.

IPC Classes  ?

• H05K 1/02 - Printed circuits - Details
• H05K 1/14 - Structural association of two or more printed circuits
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/36 - Assembling printed circuits with other printed circuits
• H05K 3/46 - Manufacturing multi-layer circuits
• H01L 27/13 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body combined with thin-film or thick-film passive components

Abstract

In a semi-finished product (1) for the production of a printed circuit board, the semi-finished product (1) comprising a plurality of insulating layers (3) of a prepreg material and conductive layers (2, 2') of a conductive material and further comprising at least one electronic component (4) embedded in at least one insulating layer (3) the at least one electronic component (4) is attached to a corresponding conductive layer (2) by the aid of an Anisotropic Conductive Film (6) and the Anisotropic Conductive Film (6) as well as the prepreg material are in an unprocessed state. The method for producing a printed circuit board comprises the following steps: Providing at least one conductive layer (2), Applying an Anisotropic Conductive Film (6) on the conductive layer (2), Affixing at least one electronic component (4) on the Anisotropic Conductive Film (6), Embedding the electronic component (4) in at least one insulating layer (3) of prepreg material to obtain a semi-finished product (1), Laminating the semi-finished product (1) to process the prepreg material and the Anisotropic Conductive Film (6).

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/32 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
• H05K 3/46 - Manufacturing multi-layer circuits

Abstract

A multilayer printed circuit board (1) comprising conductive layers (2-7) separated by dielectric insulation layers (8-12), at least one conductive layer being patterned and parts of conducting layers being interconnected by means of vias (v10) traversing insulation layers, and at least one component (15, 16, 17) having terminals (15t, 16t) electrically connected with conducting layers is countersunk at least partly in a cavity (13) having a floor and side walls, whereby a first component (15) is completely countersunk in the cavity (13) with its terminals (15t) connected face-down directly with contacts (19) on the floor of the cavity and at least one further component (16, 17) is stacked above the first component, whereby an edge of the lower surface of the second component projecting over the upper surface area of the at least one further component is provided with terminals (16t, 17t) being connected directly face-down with contacts (19) of the circuit board arranged on a level higher than the floor of the cavity.

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 3/46 - Manufacturing multi-layer circuits